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1. 发明授权

US4516203A Improved apparatus for encaching data whose value does not change during execution of an instruction sequence 失效
标题翻译：改进了在执行指令序列期间其值不改变的数据的加密装置
公开(公告)号：US4516203A
公开(公告)日：1985-05-07
申请号：US302000
申请日：1981-09-11
申请人： David A. Farber , Brett Bachman , John F. Pilat , Walter A. Wallach, Jr.
发明人： David A. Farber , Brett Bachman , John F. Pilat , Walter A. Wallach, Jr.
IPC分类号： G06F12/08 , G06F9/30
CPC分类号： G06F12/0888
摘要： Apparatus in a digital computer system for encaching data stored in the computer system's memory in a cache internal to the computer system's processor. The processor executes procedures (sequences of instructions). Data processed during an execution of a procedure is represented by operands associated with the procedure. Certain of the operands designate encacheable data items associated with each execution of the procedure. The values of the encacheable data items do not change for the duration of the execution. The operands designating encacheable data do so by means of codes specifying the designated encacheable items. The processor includes a cache for storing the encacheable items. The cache responds to a code specifying an encacheable item by outputting the value of the encacheable item specified by the code. The processor further includes cache loading apparatus for loading the encacheable items into the cache. The operations executed by the processor include a call operation which commences an execution of a procedure. The cache loading apparatus responds to the call operation by loading the encacheable items for the execution being commenced into the cache. The encacheable items include pointers to arguments for each execution of a procedure. The pointers are stored in the frame corresponding to the execution at negative offsets from the frame pointer. The codes in the operands specify the negative offsets.
摘要翻译：数字计算机系统中的装置，用于将存储在计算机系统的存储器中的数据加密到计算机系统处理器内部的高速缓存器中。处理器执行程序（指令序列）。在执行过程期间处理的数据由与过程相关联的操作数表示。某些操作数指定与每个执行过程相关联的可附加数据项。可执行数据项的值在执行期间不会更改。指定可附加数据的操作数通过指定指定的可附加项目的代码进行。处理器包括用于存储可附加项目的缓存。高速缓存通过输出由代码指定的可包含项的值来响应指定可附加项的代码。处理器还包括用于将可加载项加载到高速缓存中的高速缓存加载装置。由处理器执行的操作包括开始执行过程的呼叫操作。高速缓存加载设备通过加载用于正在开始进入高速缓存的执行的可加载项来响应该呼叫操作。可附加项目包括每个执行过程的参数指针。指针被存储在与帧指针的负偏移处的执行对应的帧中。操作数中的代码指定负偏移量。

2. 发明授权

US4514800A Digital computer system including apparatus for resolving names representing data items and capable of executing instructions belonging to general instruction sets 失效
标题翻译：数字计算机系统包括用于解析表示数据项的名称并能够执行属于一般指令集的指令的装置
公开(公告)号：US4514800A
公开(公告)日：1985-04-30
申请号：US266525
申请日：1981-05-22
申请人： Ronald H. Gruner , Gerald F. Clancy , Craig J. Mundie , Steven J. Wallach , Stephen I. Schleimer , Walter A. Wallach, Jr. , John K. Ahlstrom , David H. Bernstein , Michael S. Richmond , David A. Farber , John F. Pilat , Richard A. Belgard , Richard G. Bratt
发明人： Ronald H. Gruner , Gerald F. Clancy , Craig J. Mundie , Steven J. Wallach , Stephen I. Schleimer , Walter A. Wallach, Jr. , John K. Ahlstrom , David H. Bernstein , Michael S. Richmond , David A. Farber , John F. Pilat , Richard A. Belgard , Richard G. Bratt
IPC分类号： G06F9/35 , G06F9/40 , G06F13/00
CPC分类号： G06F9/4425 , G06F9/35
摘要： A digital computer system including a memory and a processor. The memory operates in response to memory commands received from the processor. Items of data stored in the memory include instructions to which the processor responds. Each instruction contains an operation code which belongs to one of several sets of operation codes. The meaning of a given operation code is determined by the operation code set to which the instruction belongs. Some of the instructions also contain names representing items of data used in the operation specified by the operation code. The processor includes an operation code decoding system which decodes the operation code as required for the instruction set to which it belongs, a name resolution system for deriving the address of the data item represented by a name from the name using an architectural base address contained in the name resolution system, and a control system which controls the operation of the processor. The processor performs a call operation and a return operation. Only the call operation and the return operation may change the current architectural base address. The memory further contains name table entries associated with the names. Each name table entry contains information used by the name resolution system when it resolves a name.
摘要翻译：一种包括存储器和处理器的数字计算机系统。存储器响应于从处理器接收的存储器命令而工作。存储在存储器中的数据项包括处理器响应的指令。每条指令都包含一个操作码，它属于几组操作码之一。给定操作代码的含义由指令所属的操作代码集确定。一些指令还包含表示由操作代码指定的操作中使用的数据项的名称。该处理器包括操作码解码系统，该系统根据其所属的指令集的需要对操作码进行解码，一个名称解析系统，用于从名称中导出由名称所代表的数据项的地址，名称解析系统和控制处理器的操作的控制系统。处理器执行呼叫操作和返回操作。只有通话操作和返回操作才能更改当前的架构基地址。内存还包含与名称相关联的名称表条目。每个名称表项包含名称解析系统在解析名称时使用的信息。

3. 发明授权

US4675810A Digital data processing system having a uniquely organized memory system using object-based addressing and in which operand data is identified by names accessed by name tables 失效
标题翻译：数字数据处理系统具有使用基于对象的寻址的唯一组织的存储器系统，并且其中操作数数据由名称表访问的名称标识
公开(公告)号：US4675810A
公开(公告)日：1987-06-23
申请号：US266536
申请日：1981-05-22
申请人： Ronald H. Gruner , Gerald F. Clancy , Craig J. Mundie , Stephen I. Schleimer , Steven J. Wallach , Richard G. Bratt , Edward S. Gavrin , Walter A. Wallach, Jr. , John K. Ahlstrom , Michael S. Richmond , David H. Bernstein , John F. Pilat , David A. Farber , Richard A. Belgard
发明人： Ronald H. Gruner , Gerald F. Clancy , Craig J. Mundie , Stephen I. Schleimer , Steven J. Wallach , Richard G. Bratt , Edward S. Gavrin , Walter A. Wallach, Jr. , John K. Ahlstrom , Michael S. Richmond , David H. Bernstein , John F. Pilat , David A. Farber , Richard A. Belgard
IPC分类号： G06F9/35 , G06F9/42 , G06F9/06
CPC分类号： G06F9/4426 , G06F9/35
摘要： A digital computer system having a memory system organized into procedure and data objects, each having a unique identifier code and an access control list, for storing items of information and a processor for processing data in response to instructions. The instructions contain operation codes and names representing data. Each name corresponds to a name table entry in a name table which contains information from which the processor determines the location and the format for the data. The name table entry specifies a base address of one of a set thereof which change value only when a call or a return instruction is executed. A name interpretation system fetches a name table entry, calculates the base address and a displacement using the name table entry and the current architectural base address and adds the base address to the displacement to form the address of the data represented by the name.
摘要翻译：一种数字计算机系统，其具有组织成过程和数据对象的存储器系统，每个存储器系统具有用于存储信息项的唯一标识符代码和访问控制列表，以及响应于指令处理数据的处理器。指令包含表示数据的操作代码和名称。每个名称对应于名称表中的名称表条目，其中包含处理器确定数据的位置和格式的信息。名称表条目指定仅当执行呼叫或返回指令时才改变值的其中一个的基地址。名称解释系统获取名称表项，使用名称表项和当前体系结构基地址计算基地址和位移，并将基地址添加到位移，以形成由名称表示的数据的地址。

4. 发明授权

US4493023A Digital data processing system having unique addressing means and means for identifying and accessing operands 失效
标题翻译：数字数据处理系统具有唯一的寻址装置和用于识别和访问操作数的装置
公开(公告)号：US4493023A
公开(公告)日：1985-01-08
申请号：US266403
申请日：1981-05-22
申请人： Edward S. Gavrin , Richard G. Bratt , Stephen I. Schleimer , John F. Pilat , Michael S. Richmond , Walter A. Wallach, Jr. , Richard A. Belgard , David A. Farber , John K. Ahlstrom , Steven J. Wallach , Gerald F. Clancy , Craig J. Mundie , Thomas M. Jones , Brett L. Bachman , David H. Bernstein
发明人： Edward S. Gavrin , Richard G. Bratt , Stephen I. Schleimer , John F. Pilat , Michael S. Richmond , Walter A. Wallach, Jr. , Richard A. Belgard , David A. Farber , John K. Ahlstrom , Steven J. Wallach , Gerald F. Clancy , Craig J. Mundie , Thomas M. Jones , Brett L. Bachman , David H. Bernstein
IPC分类号： G01R31/3185 , G06F7/00 , G06F7/57 , G06F9/22 , G06F9/26 , G06F9/35 , G06F9/46 , G06F9/48 , G06F11/07 , G06F12/08 , G06F12/14 , G06F9/30
CPC分类号： G06F11/0793 , G01R31/318505 , G06F11/0721 , G06F11/073 , G06F12/0875 , G06F12/1483 , G06F7/00 , G06F7/483 , G06F9/223 , G06F9/226 , G06F9/262 , G06F9/268 , G06F9/35 , G06F9/4843 , G06F9/54 , G06F7/49905 , G06F7/4991 , G06F7/49926
摘要： A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.
摘要翻译：具有灵活的内部结构的数据处理系统，具有多层次的控制和堆栈机制以及执行多个并发操作的能力，并向用户提供灵活的简化界面，保护用户不受任何用户的影响。该系统内部由多个独立的独立处理器组成，每个独立的处理器具有单独的微指令控制和至少一个独立于中央通信和存储器节点的独立端口。通信和存储器节点是具有独立且独立的微指令控制的独立处理器，并且包括能够执行多个并发存储器和通信操作的多个独立操作的微指令控制的处理器。寻址机制允许永久，唯一的信息识别和所有这些系统可访问和共同的极大的地址空间。地址与系统物理配置无关。信息被识别为细粒度级别和信息类型和格式。保护机制提供与个体信息相关联的可变访问权限。用户语言指令被转换为方言编码的，统一的中间级指令，以便为所有用户语言提供相同的执行功能。操作数由统一格式名称引用，通过对用户透明的内部机制转换为地址。

5. 发明授权

US4498131A Data processing system having addressing mechanisms for processing object-based information and a protection scheme for determining access rights to such information 失效
标题翻译：具有用于处理基于对象的信息的寻址机制的数据处理系统和用于确定对这些信息的访问权限的保护方案
公开(公告)号：US4498131A
公开(公告)日：1985-02-05
申请号：US266408
申请日：1981-05-22
申请人： Richard G. Bratt , Edward S. Gavrin , Stephen I. Schleimer , John F. Pilat , Walter A. Wallach, Jr. , Michael S. Richmond , Richard A. Belgard , David A. Farber , John K. Ahlstrom , Steven J. Wallach , Lawrence H. Katz , Douglas M. Wells , Craig J. Mundie , Gerald F. Clancy , David H. Bernstein , Thomas M. Jones , Brett L. Bachman
发明人： Richard G. Bratt , Edward S. Gavrin , Stephen I. Schleimer , John F. Pilat , Walter A. Wallach, Jr. , Michael S. Richmond , Richard A. Belgard , David A. Farber , John K. Ahlstrom , Steven J. Wallach , Lawrence H. Katz , Douglas M. Wells , Craig J. Mundie , Gerald F. Clancy , David H. Bernstein , Thomas M. Jones , Brett L. Bachman
IPC分类号： G01R31/3185 , G06F7/00 , G06F7/57 , G06F9/22 , G06F9/26 , G06F9/30 , G06F9/35 , G06F9/46 , G06F9/48 , G06F11/07 , G06F12/08 , G06F12/14
CPC分类号： G01R31/318505 , G06F11/073 , G06F11/0793 , G06F12/0875 , G06F12/1483 , G06F7/00 , G06F7/483 , G06F9/3013 , G06F9/35 , G06F9/4843 , G06F9/54 , G06F7/49905 , G06F7/4991 , G06F7/49926
摘要： A digital data processing system has a memory organized into objects containing at least operands and instructions. Each object is identified by a unique and permanent identifier code which identifies the data processing system and the object. The system utilizes unique addressing mechanisms the addresses of which have object fields, offset fields and length fields for specifying the location and the total number of bits of an addressed object. The system uses a protection technique to prevent unauthorized access to objects by users who are identified by a subject number which identifies the user, a process of the system for executing the user's procedure, and the type of operation of the system to be performed by the user's procedure. An access control list for each object includes an access control list entry for each subject having access rights to the object and means for confirming that a particular active subject has access rights to a particular object before permitting access to the object.
摘要翻译：数字数据处理系统具有被组织成至少包含操作数和指令的对象的存储器。每个对象由识别数据处理系统和对象的唯一且永久的标识符代码来标识。该系统利用独特的寻址机制，其地址具有用于指定寻址对象的位置和总位数的对象字段，偏移字段和长度字段。该系统使用保护技术来防止由识别用户的主题号码，用于执行用户过程的系统的处理以及由该用户执行的系统的操作类型由用户标识的用户的未经授权的访问用户程序。每个对象的访问控制列表包括具有对对象的访问权限的每个对象的访问控制列表条目，以及用于在允许访问对象之前确认特定活动主体具有对特定对象的访问权限的装置。

6. 发明授权

US4493027A Method of performing a call operation in a digital data processing system having microcode call and return operations 失效
标题翻译：在具有微码呼叫和返回操作的数字数据处理系统中执行呼叫操作的方法
公开(公告)号：US4493027A
公开(公告)日：1985-01-08
申请号：US266526
申请日：1981-05-22
申请人： Lawrence H. Katz , Douglas M. Wells , Michael S. Richmond , Richard A. Belgard , Walter A. Wallach, Jr. , David H. Bernstein , John K. Ahlstrom , John F. Pilat , David A. Farber , Richard G. Bratt
发明人： Lawrence H. Katz , Douglas M. Wells , Michael S. Richmond , Richard A. Belgard , Walter A. Wallach, Jr. , David H. Bernstein , John K. Ahlstrom , John F. Pilat , David A. Farber , Richard G. Bratt
IPC分类号： G06F9/40 , G06F3/00 , G06F9/22 , G06F9/36 , G06F9/46
CPC分类号： G06F9/4425
摘要： A method for executing call and return instructions in a digital computer system operating under control of microcode. The microcode may specify calls to and returns from sequences of microinstructions. A call microinstruction sequence corresponds to the call instruction. The call microcode in turn calls other microinstruction sequences for deriving pointers representing the location of the called procedure and of arguments from operands in the call instruction. As the call microcode obtains each argument pointer, it places the pointer on the stack. After it has obtained all of the argument pointers, it passes the pointer to the called procedure and a pointer to the argument pointers to a general call microinstruction sequence. That microinstruction sequence locates the called procedure, makes a new frame including the argument pointers, and saves the state necessary to resume execution of the call microinstruction sequence itself. It then obtains the state necessary to commence execution of the called procedure and causes execution of that procedure to commence. The microcode corresponding to the return instruction restores both the state necessary to resume execution of the calling procedure and the state necessary to resume execution of the call microinstruction sequence. When it resumes execution, the call microinstruction sequence completes the return operation.
摘要翻译：一种在微码控制下操作的数字计算机系统中执行呼叫和返回指令的方法。微代码可以指定对微指令序列的调用和返回。调用微指令序列对应于调用指令。调用微代码又调用其他微指令序列来导出表示被调用过程的位置的指针，以及调用指令中操作数的参数。当调用微代码获取每个参数指针时，它将指针放在堆栈上。在获取所有参数指针之后，它将指针传递给被调用的过程，并将指针指向一般调用微指令序列。该微指令序列定位被调用的过程，创建一个包含参数指针的新帧，并保存恢复执行调用微指令序列本身所需的状态。然后获得开始执行被叫程序所必需的状态，并使该程序的执行开始。对应于返回指令的微代码恢复恢复执行调用过程所需的状态和继续执行调用微指令序列所需的状态。当它恢复执行时，调用微指令序列完成返回操作。

7. 发明授权

US4656579A Digital data processing system having a uniquely organized memory system and means for storing and accessing information therein 失效
标题翻译：具有唯一有组织的存储系统的数字数据处理系统和用于存储和访问其中的信息的装置
公开(公告)号：US4656579A
公开(公告)日：1987-04-07
申请号：US699240
申请日：1985-02-08
申请人： Brett L. Bachman , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Ronald H. Gruner , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , John F. Pilat , Michael S. Richmond , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr.
发明人： Brett L. Bachman , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Ronald H. Gruner , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , John F. Pilat , Michael S. Richmond , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr.
IPC分类号： G01R31/3185 , G06F7/00 , G06F7/57 , G06F9/22 , G06F9/26 , G06F9/318 , G06F9/35 , G06F9/42 , G06F9/44 , G06F9/46 , G06F9/48 , G06F11/07 , G06F12/02 , G06F12/08 , G06F12/10 , G06F12/14 , G06F9/10
CPC分类号： G06F9/4426 , G01R31/318505 , G06F11/073 , G06F11/0793 , G06F12/0292 , G06F12/0875 , G06F12/10 , G06F12/1458 , G06F12/1483 , G06F7/00 , G06F7/483 , G06F9/30192 , G06F9/4428 , G06F9/468 , G06F9/4843 , G06F9/54 , G06F7/49905 , G06F7/4991 , G06F7/49926
摘要： A digital computer system having a memory system organized into objects for storing items of information and a processor for processing data in response to instructions. An object identifier code is associated with each object. The objects include procedure objects and data objects. The procedure objects contain procedures including the instructions and name tables associated with the procedures. The instructions contain operation codes and names representing data. Each name corresponds to a name table entry in the name table associated with the procedure. The name table for a name contains information from which the processor may determine the location and the format for the data (e.g., an operand) represented by the name.
摘要翻译：一种数字计算机系统，具有组织成用于存储信息项目的对象的存储器系统和用于响应于指令处理数据的处理器。对象标识符代码与每个对象相关联。对象包括过程对象和数据对象。过程对象包含与过程相关联的指令和名称表的过程。指令包含表示数据的操作代码和名称。每个名称对应于与该过程相关联的名称表中的名称表项。名称的名称表包含处理器可以确定由该名称表示的数据（例如，操作数）的位置和格式的信息。

8. 发明授权

US4480306A Digital data processing system using unique ALU register files and micro-instruction stacks 失效
公开(公告)号：US4480306A
公开(公告)日：1984-10-30
申请号：US266425
申请日：1981-05-22
申请人： Brett L. Bachman , Richard A. Belgard , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , John F. Pilat , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr. , Douglas M. Wells
发明人： Brett L. Bachman , Richard A. Belgard , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , John F. Pilat , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr. , Douglas M. Wells
IPC分类号： G06F9/26 , G06F9/22
CPC分类号： G06F9/26
摘要： A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information as objects and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration and, as particularly described with reference to the invention herein, identify locations of object information to be accessed by utlizing address formats which comprise an object field, offset field and a length field so that information can be identified to bit granular level and to information type and format. Arithmetic logic unit (ALU) means, also as particularly described with reference to the invention herein, include general register means having three vertically oriented parts for storing such respective fields. Such ALU means further include an ALU microinstruction stack means having at least one microinstruction stack frame for storing the state of execution of a microinstruction. A memory microinstruction stack is provided to store a plurality of microinstruction stack frames so that microinstruction stack frames can be transferred between the ALU and the memory microinstruction stacks. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

9. 发明授权

US4450522A Apparatus for deriving addresses of data using displacements from base addresses which change only on call and return 失效
标题翻译：用于使用从仅在呼叫和返回上改变的基地址的位移导出数据地址的装置
公开(公告)号：US4450522A
公开(公告)日：1984-05-22
申请号：US301999
申请日：1981-09-11
申请人： John F. Pilat , Michael S. Richmond , Walter A. Wallach, Jr. , Stephen I. Schleimer
发明人： John F. Pilat , Michael S. Richmond , Walter A. Wallach, Jr. , Stephen I. Schleimer
IPC分类号： G06F9/42 , G06F9/00
CPC分类号： G06F9/4426
摘要： In the digital computer system of the present invention, data items called immediate names represent other data items. The immediate name specifies either the address of the represented data item or the address of a pointer to the represented data item. Each immediate name contains a base address specifier specifying one of a set of architectural base addresses, an indirection specifier specifying whether the immediate name specifies the address of the represented item or the address of a pointer to the item, and a displacement from the specified architectural base address. The architectural base addresses are contained in registers accessible to a processor in the digital data processing system. The registers are loaded only when the processor preforms a call operation or a return operation. When the immediate name specifies the address of the represented item, the processor produces the address by combining the displacement specified in the displacement specifier with the architectural base address indicated by the base address specifier. When the immediate name specifies the address of a pointer to the represented item, the processor combines the specified displacement with the specified base address to obtain the address of the pointer, fetches the pointer into memory, and produces the address of the represented item from the pointer.
摘要翻译：在本发明的数字计算机系统中，称为即时名称的数据项表示其他数据项。立即名称指定所表示的数据项的地址或指向所表示的数据项的指针的地址。每个立即名称包含一个指定一组架构基地址之一的基地址说明符，一个间接说明符，指定立即名称是指定表示项目的地址还是指向该项目的指针的地址，以及指定架构的位移基地址。架构基址包含在数字数据处理系统中的处理器可访问的寄存器中。寄存器仅在处理器进行呼叫操作或返回操作时才加载。当立即名称指定所表示项目的地址时，处理器通过将位移说明符中指定的位移与由基址指定符指示的体系结构基址相结合来产生地址。当立即名称指定指向所表示项目的指针的地址时，处理器将指定的位移与指定的基地址组合以获得指针的地址，将指针取出到存储器中，并从指针。

10. 发明授权

US4661903A Digital data processing system incorporating apparatus for resolving names 失效
标题翻译：数字数据处理系统，包括解析名称的装置
公开(公告)号：US4661903A
公开(公告)日：1987-04-28
申请号：US647271
申请日：1984-09-04
申请人： Walter A. Wallach, Jr. , Michael S. Richmond , John K. Ahlstrom , David H. Bernstein , Richard G. Bratt
发明人： Walter A. Wallach, Jr. , Michael S. Richmond , John K. Ahlstrom , David H. Bernstein , Richard G. Bratt
IPC分类号： G06F9/318 , G06F9/35 , G06F9/44 , G06F13/00
CPC分类号： G06F9/30192 , G06F9/35 , G06F9/4428
摘要： Apparatus in a digital computer system for obtaining descriptors of data from names representing the data. The digital computer system executes sequences of instructions. Names representing data processed during execution of an instruction sequence are associated with the instruction sequence. Each name associated with the instruction sequence corresponds to a name table entry associated with the instruction sequence. The operation of resolving a name, i.e., obtaining the descriptor for the data represented by the name, is performed by name processing apparatus in processors of the data processing system. In response to a name, the name processing apparatus locates the name table entry corresponding to the name obtains the descriptor for the item represented by the name using the information in the name table entry corresponding to the name. In a present embodiment, the descriptor specifies the address and length of a data item. The information in the name table entry specifies the address of the represented item by specifying a base address and a displacement and further specifies the length and type of the represented item.
摘要翻译：数字计算机系统中的装置，用于从表示数据的名称获得数据的描述符。数字计算机系统执行指令序列。表示在执行指令序列期间处理的数据的名称与指令序列相关联。与指令序列相关联的每个名称对应于与指令序列相关联的名称表条目。通过名称处理装置在数据处理系统的处理器中执行解析名称的操作，即获得由名称表示的数据的描述符。响应于名称，名称处理设备找到与名称相对应的名称表项，使用与名称相对应的名称表项中的信息来获得由名称表示的项目的描述符。在本实施例中，描述符指定数据项的地址和长度。名称表项目中的信息通过指定基址和位移来指定所表示项目的地址，并进一步指定所表示项目的长度和类型。

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