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1. 发明授权

US4656579A Digital data processing system having a uniquely organized memory system and means for storing and accessing information therein 失效
标题翻译：具有唯一有组织的存储系统的数字数据处理系统和用于存储和访问其中的信息的装置
公开(公告)号：US4656579A
公开(公告)日：1987-04-07
申请号：US699240
申请日：1985-02-08
申请人： Brett L. Bachman , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Ronald H. Gruner , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , John F. Pilat , Michael S. Richmond , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr.
发明人： Brett L. Bachman , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Ronald H. Gruner , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , John F. Pilat , Michael S. Richmond , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr.
IPC分类号： G01R31/3185 , G06F7/00 , G06F7/57 , G06F9/22 , G06F9/26 , G06F9/318 , G06F9/35 , G06F9/42 , G06F9/44 , G06F9/46 , G06F9/48 , G06F11/07 , G06F12/02 , G06F12/08 , G06F12/10 , G06F12/14 , G06F9/10
CPC分类号： G06F9/4426 , G01R31/318505 , G06F11/073 , G06F11/0793 , G06F12/0292 , G06F12/0875 , G06F12/10 , G06F12/1458 , G06F12/1483 , G06F7/00 , G06F7/483 , G06F9/30192 , G06F9/4428 , G06F9/468 , G06F9/4843 , G06F9/54 , G06F7/49905 , G06F7/4991 , G06F7/49926
摘要： A digital computer system having a memory system organized into objects for storing items of information and a processor for processing data in response to instructions. An object identifier code is associated with each object. The objects include procedure objects and data objects. The procedure objects contain procedures including the instructions and name tables associated with the procedures. The instructions contain operation codes and names representing data. Each name corresponds to a name table entry in the name table associated with the procedure. The name table for a name contains information from which the processor may determine the location and the format for the data (e.g., an operand) represented by the name.
摘要翻译：一种数字计算机系统，具有组织成用于存储信息项目的对象的存储器系统和用于响应于指令处理数据的处理器。对象标识符代码与每个对象相关联。对象包括过程对象和数据对象。过程对象包含与过程相关联的指令和名称表的过程。指令包含表示数据的操作代码和名称。每个名称对应于与该过程相关联的名称表中的名称表项。名称的名称表包含处理器可以确定由该名称表示的数据（例如，操作数）的位置和格式的信息。

2. 发明授权

US4498132A Data processing system using object-based information and a protection scheme for determining access rights to such information and using multilevel microcode techniques 失效
标题翻译：使用基于对象的信息的数据处理系统和用于确定对这种信息的访问权限并使用多级微代码技术的保护方案
公开(公告)号：US4498132A
公开(公告)日：1985-02-05
申请号：US266413
申请日：1981-05-22
申请人： John K. Ahlstrom , Brett L. Bachman , Richard A. Belgard , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Ronald H. Gruner , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , Michael S. Richmond , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr. , Douglas M. Wells
发明人： John K. Ahlstrom , Brett L. Bachman , Richard A. Belgard , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Ronald H. Gruner , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , Michael S. Richmond , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr. , Douglas M. Wells
IPC分类号： G01R31/3185 , G06F7/00 , G06F7/57 , G06F9/22 , G06F9/26 , G06F9/318 , G06F9/35 , G06F9/46 , G06F9/48 , G06F11/07 , G06F12/08 , G06F12/14
CPC分类号： G06F9/54 , G01R31/318505 , G06F11/073 , G06F11/0793 , G06F12/0875 , G06F12/1483 , G06F7/00 , G06F7/483 , G06F9/223 , G06F9/226 , G06F9/262 , G06F9/268 , G06F9/3017 , G06F9/35 , G06F9/4843 , G06F7/49905 , G06F7/4991 , G06F7/49926
摘要： A digital data processing system has a memory organized into objects containing at least operands and instructions. Each object is identified by a unique and permanent identifier code which identifies the data processing system and the object. The system further uses multilevel microcode techniques for controlling sequences of microinstructions and for controlling the interval operations of the processor. The system uses a protection technique to prevent unauthorized access to objects by users who are identified by a subject number which identifies the user, a process of the system for executing a user's procedure, and the type of operation of the system to be performed by the user's procedure. An access control list for each object includes an access control list entry for each subject having access rights to the object and means for confirming that a particular active subject has access rights to a particular object before permitting access to the object. The system also includes stacks for containing information relating to the current state of execution of the system.
摘要翻译：数字数据处理系统具有被组织成至少包含操作数和指令的对象的存储器。每个对象由识别数据处理系统和对象的唯一且永久的标识符代码来标识。该系统还使用多级微代码技术来控制微指令的序列并且用于控制处理器的间隔操作。该系统使用保护技术来防止由标识用户的主题号码，用于执行用户过程的系统的处理以及由该用户执行的系统的操作类型由用户标识的用户的未经授权的访问用户程序。每个对象的访问控制列表包括具有对对象的访问权限的每个对象的访问控制列表条目，以及用于在允许访问对象之前确认特定活动主体具有对特定对象的访问权限的装置。系统还包括用于包含与系统的当前执行状态有关的信息的堆栈。

3. 发明授权

US4498131A Data processing system having addressing mechanisms for processing object-based information and a protection scheme for determining access rights to such information 失效
标题翻译：具有用于处理基于对象的信息的寻址机制的数据处理系统和用于确定对这些信息的访问权限的保护方案
公开(公告)号：US4498131A
公开(公告)日：1985-02-05
申请号：US266408
申请日：1981-05-22
申请人： Richard G. Bratt , Edward S. Gavrin , Stephen I. Schleimer , John F. Pilat , Walter A. Wallach, Jr. , Michael S. Richmond , Richard A. Belgard , David A. Farber , John K. Ahlstrom , Steven J. Wallach , Lawrence H. Katz , Douglas M. Wells , Craig J. Mundie , Gerald F. Clancy , David H. Bernstein , Thomas M. Jones , Brett L. Bachman
发明人： Richard G. Bratt , Edward S. Gavrin , Stephen I. Schleimer , John F. Pilat , Walter A. Wallach, Jr. , Michael S. Richmond , Richard A. Belgard , David A. Farber , John K. Ahlstrom , Steven J. Wallach , Lawrence H. Katz , Douglas M. Wells , Craig J. Mundie , Gerald F. Clancy , David H. Bernstein , Thomas M. Jones , Brett L. Bachman
IPC分类号： G01R31/3185 , G06F7/00 , G06F7/57 , G06F9/22 , G06F9/26 , G06F9/30 , G06F9/35 , G06F9/46 , G06F9/48 , G06F11/07 , G06F12/08 , G06F12/14
CPC分类号： G01R31/318505 , G06F11/073 , G06F11/0793 , G06F12/0875 , G06F12/1483 , G06F7/00 , G06F7/483 , G06F9/3013 , G06F9/35 , G06F9/4843 , G06F9/54 , G06F7/49905 , G06F7/4991 , G06F7/49926
摘要： A digital data processing system has a memory organized into objects containing at least operands and instructions. Each object is identified by a unique and permanent identifier code which identifies the data processing system and the object. The system utilizes unique addressing mechanisms the addresses of which have object fields, offset fields and length fields for specifying the location and the total number of bits of an addressed object. The system uses a protection technique to prevent unauthorized access to objects by users who are identified by a subject number which identifies the user, a process of the system for executing the user's procedure, and the type of operation of the system to be performed by the user's procedure. An access control list for each object includes an access control list entry for each subject having access rights to the object and means for confirming that a particular active subject has access rights to a particular object before permitting access to the object.
摘要翻译：数字数据处理系统具有被组织成至少包含操作数和指令的对象的存储器。每个对象由识别数据处理系统和对象的唯一且永久的标识符代码来标识。该系统利用独特的寻址机制，其地址具有用于指定寻址对象的位置和总位数的对象字段，偏移字段和长度字段。该系统使用保护技术来防止由识别用户的主题号码，用于执行用户过程的系统的处理以及由该用户执行的系统的操作类型由用户标识的用户的未经授权的访问用户程序。每个对象的访问控制列表包括具有对对象的访问权限的每个对象的访问控制列表条目，以及用于在允许访问对象之前确认特定活动主体具有对特定对象的访问权限的装置。

4. 发明授权

US4480306A Digital data processing system using unique ALU register files and micro-instruction stacks 失效
公开(公告)号：US4480306A
公开(公告)日：1984-10-30
申请号：US266425
申请日：1981-05-22
申请人： Brett L. Bachman , Richard A. Belgard , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , John F. Pilat , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr. , Douglas M. Wells
发明人： Brett L. Bachman , Richard A. Belgard , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , John F. Pilat , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr. , Douglas M. Wells
IPC分类号： G06F9/26 , G06F9/22
CPC分类号： G06F9/26
摘要： A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information as objects and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration and, as particularly described with reference to the invention herein, identify locations of object information to be accessed by utlizing address formats which comprise an object field, offset field and a length field so that information can be identified to bit granular level and to information type and format. Arithmetic logic unit (ALU) means, also as particularly described with reference to the invention herein, include general register means having three vertically oriented parts for storing such respective fields. Such ALU means further include an ALU microinstruction stack means having at least one microinstruction stack frame for storing the state of execution of a microinstruction. A memory microinstruction stack is provided to store a plurality of microinstruction stack frames so that microinstruction stack frames can be transferred between the ALU and the memory microinstruction stacks. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

5. 发明授权

US4493023A Digital data processing system having unique addressing means and means for identifying and accessing operands 失效
标题翻译：数字数据处理系统具有唯一的寻址装置和用于识别和访问操作数的装置
公开(公告)号：US4493023A
公开(公告)日：1985-01-08
申请号：US266403
申请日：1981-05-22
申请人： Edward S. Gavrin , Richard G. Bratt , Stephen I. Schleimer , John F. Pilat , Michael S. Richmond , Walter A. Wallach, Jr. , Richard A. Belgard , David A. Farber , John K. Ahlstrom , Steven J. Wallach , Gerald F. Clancy , Craig J. Mundie , Thomas M. Jones , Brett L. Bachman , David H. Bernstein
发明人： Edward S. Gavrin , Richard G. Bratt , Stephen I. Schleimer , John F. Pilat , Michael S. Richmond , Walter A. Wallach, Jr. , Richard A. Belgard , David A. Farber , John K. Ahlstrom , Steven J. Wallach , Gerald F. Clancy , Craig J. Mundie , Thomas M. Jones , Brett L. Bachman , David H. Bernstein
IPC分类号： G01R31/3185 , G06F7/00 , G06F7/57 , G06F9/22 , G06F9/26 , G06F9/35 , G06F9/46 , G06F9/48 , G06F11/07 , G06F12/08 , G06F12/14 , G06F9/30
CPC分类号： G06F11/0793 , G01R31/318505 , G06F11/0721 , G06F11/073 , G06F12/0875 , G06F12/1483 , G06F7/00 , G06F7/483 , G06F9/223 , G06F9/226 , G06F9/262 , G06F9/268 , G06F9/35 , G06F9/4843 , G06F9/54 , G06F7/49905 , G06F7/4991 , G06F7/49926
摘要： A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.
摘要翻译：具有灵活的内部结构的数据处理系统，具有多层次的控制和堆栈机制以及执行多个并发操作的能力，并向用户提供灵活的简化界面，保护用户不受任何用户的影响。该系统内部由多个独立的独立处理器组成，每个独立的处理器具有单独的微指令控制和至少一个独立于中央通信和存储器节点的独立端口。通信和存储器节点是具有独立且独立的微指令控制的独立处理器，并且包括能够执行多个并发存储器和通信操作的多个独立操作的微指令控制的处理器。寻址机制允许永久，唯一的信息识别和所有这些系统可访问和共同的极大的地址空间。地址与系统物理配置无关。信息被识别为细粒度级别和信息类型和格式。保护机制提供与个体信息相关联的可变访问权限。用户语言指令被转换为方言编码的，统一的中间级指令，以便为所有用户语言提供相同的执行功能。操作数由统一格式名称引用，通过对用户透明的内部机制转换为地址。

6. 发明授权

US4499535A Digital computer system having descriptors for variable length addressing for a plurality of instruction dialects 失效
标题翻译：具有用于多个指令方言的可变长度寻址的描述符的数字计算机系统
公开(公告)号：US4499535A
公开(公告)日：1985-02-12
申请号：US266427
申请日：1981-05-22
申请人： Brett L. Bachman , Richard A. Belgard , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Ronald H. Gruner , Thomas M. Jones , Craig J. Mundie , James T. Nealon , John F. Pilat , Stephen I. Schleimer , Steven J. Wallach
发明人： Brett L. Bachman , Richard A. Belgard , David H. Bernstein , Richard G. Bratt , Gerald F. Clancy , Edward S. Gavrin , Ronald H. Gruner , Thomas M. Jones , Craig J. Mundie , James T. Nealon , John F. Pilat , Stephen I. Schleimer , Steven J. Wallach
IPC分类号： G06F9/318 , G06F9/34 , G06F7/04
CPC分类号： G06F9/30192 , G06F9/34
摘要： A digital computer uses a memory which is structured into objects, which are blocks of storage of arbitrary length, in which data items are accessed by descriptors which for a desired data item specify the object, the offset into that object, and the length of the data object. The computer system of the present invention further provides the ability to execute any of a plurality of dialects of internal instructions, the repertoire of such dialects being virtually infinite, since there is the ability to load a supporting microcode during operation as needed.
摘要翻译：数字计算机使用被构造成对象的存储器，该对象是任意长度的存储块，其中通过描述符访问数据项，对于期望的数据项指定对象，到该对象的偏移量以及该对象的长度数据对象。本发明的计算机系统进一步提供执行内部指令的多个方言中的任何一种方式的能力，这种方言的曲目几乎是无限的，因为在需要时可以在运行期间加载支持的微代码。

7. 发明授权

US4532586A Digital data processing system with tripartite description-based addressing multi-level microcode control, and multi-level stacks 失效
标题翻译：数字数据处理系统具有基于三层描述的寻址多级微代码控制和多级堆栈
公开(公告)号：US4532586A
公开(公告)日：1985-07-30
申请号：US266401
申请日：1981-05-22
申请人： Richard G. Bratt , Stephen I. Schleimer , Edward S. Gavrin , John F. Pilat , Steven J. Wallach , Lawrence H. Katz , Douglas M. Wells , Gerald F. Clancy , Craig J. Mundie , David H. Bernstein , Thomas M. Jones , Brett L. Bachman
发明人： Richard G. Bratt , Stephen I. Schleimer , Edward S. Gavrin , John F. Pilat , Steven J. Wallach , Lawrence H. Katz , Douglas M. Wells , Gerald F. Clancy , Craig J. Mundie , David H. Bernstein , Thomas M. Jones , Brett L. Bachman
IPC分类号： G01R31/3185 , G06F7/00 , G06F7/57 , G06F9/22 , G06F9/26 , G06F9/35 , G06F9/44 , G06F9/46 , G06F9/48 , G06F11/07 , G06F12/08 , G06F12/10 , G06F12/14
CPC分类号： G06F9/4428 , G01R31/318505 , G06F11/0721 , G06F11/073 , G06F11/0793 , G06F12/0875 , G06F12/10 , G06F12/1483 , G06F7/00 , G06F7/483 , G06F9/35 , G06F9/4843 , G06F9/54 , G06F7/49905 , G06F7/4991 , G06F7/49926
摘要： A digital computer system in which data storage is referred to by a descriptor comprising an object number denoting a variable-length block of storage, an offset indicating how far into that block a desired data item begins, and a length field denoting the length of the desired data item. Separate means exist for manipulating each of the three descriptor portions, thus facilitating repetitive operations on related or contiguous operands. Various levels of microcode control are included. Each level of microcode control has its own stack, facilitating interrupts between levels. Stacks are duplicated in "secure stacks" in memory to protect against loss of state data from the stacks.

8. 发明授权

US4445177A Digital data processing system utilizing a unique arithmetic logic unit for handling uniquely identifiable addresses for operands and instructions 失效
公开(公告)号：US4445177A
公开(公告)日：1984-04-24
申请号：US266411
申请日：1981-05-22
申请人： Richard G. Bratt , Stephen I. Schleimer , John F. Pilat , Richard A. Belgard , Steven J. Wallach , Gerald F. Clancy , Craig J. Mundie , David H. Bernstein , Edward S. Gavrin , Thomas M. Jones , Brett L. Bachman
发明人： Richard G. Bratt , Stephen I. Schleimer , John F. Pilat , Richard A. Belgard , Steven J. Wallach , Gerald F. Clancy , Craig J. Mundie , David H. Bernstein , Edward S. Gavrin , Thomas M. Jones , Brett L. Bachman
IPC分类号： G06F9/45 , G06F9/22
CPC分类号： G06F8/41
摘要： A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique indentification of information as objects and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration and, as particularly described withreference to the invention herein, indentify locations of object information to be accessed by utilizing address formats which comprise an object field, offset field and a length field so that information can be identified to bit granular level and to information type and format. Arithmetic logic unit (ALU) means, also as particularly described with reference to the invention herein, include general register means having three vertically oriented parts for storing such respective fields. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

9. 发明授权

US4455604A Digital data processing system having addressing means for translating operands into descriptors identifying data, plural multilevel microcode control means, and ability to execute a plurality of internal language dialects 失效
标题翻译：数字数据处理系统具有用于将操作数转换为识别数据的描述符的寻址装置，多个多级微代码控制装置以及执行多个内部语言方言的能力
公开(公告)号：US4455604A
公开(公告)日：1984-06-19
申请号：US266422
申请日：1981-05-22
申请人： John K. Ahlstrom , Brett Bachman , Richard A. Belgard , David H. Bernstein , Richard G. Bratt , Ronald H. Gruner , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , Michael S. Richmond , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr , Douglas M. Well
发明人： John K. Ahlstrom , Brett Bachman , Richard A. Belgard , David H. Bernstein , Richard G. Bratt , Ronald H. Gruner , Thomas M. Jones , Lawrence H. Katz , Craig J. Mundie , Michael S. Richmond , Stephen I. Schleimer , Steven J. Wallach , Walter A. Wallach, Jr , Douglas M. Well
IPC分类号： G06F9/44 , G06F7/00 , G06F9/10
CPC分类号： G06F9/4428
摘要： The processor of the present invention executes procedures, which comprise S-language instructions and names. S-languages are of higher order than typical machine languages and can be tailored to user high-order languages. Each procedure includes a dialect code which the processor interprets, enabling it to execute any of a plurality of dialects of S-languages. The processor includes means for resolving names into operand logical addresses. The processor possosses multiple levels of microcode control means, each with its own set of stacks.
摘要翻译：本发明的处理器执行包括S语言指令和名称的过程。 S语言比典型的机器语言高，可以根据用户高阶语言进行定制。每个过程包括处理器解释的方言代码，使其能够执行S语言的多个方言中的任何一种。处理器包括用于将名称解析为操作数逻辑地址的装置。处理器可以处理多个级别的微码控制装置，每一个都有自己的一组堆栈。

10. 发明授权

US4493024A Digital data processing system 失效
标题翻译：数字数据处理系统
公开(公告)号：US4493024A
公开(公告)日：1985-01-08
申请号：US266406
申请日：1981-05-22
申请人： Ward Baxter, II , Gerald F. Clancy , Ronald H. Gruner , Craig J. Mundie , Brett L. Bachman , Stephen R. Redfield , William N. Coder , Thomas M. Jones , David L. Houseman , Charles J. Young , Steven M. Haeffele
发明人： Ward Baxter, II , Gerald F. Clancy , Ronald H. Gruner , Craig J. Mundie , Brett L. Bachman , Stephen R. Redfield , William N. Coder , Thomas M. Jones , David L. Houseman , Charles J. Young , Steven M. Haeffele
IPC分类号： G06F9/318 , G06F9/35 , G06F13/00
CPC分类号： G06F9/30192 , G06F9/35
摘要： A data processing system having a flexible internal structure, protected from and effecitvely invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.
摘要翻译：具有灵活的内部结构的数据处理系统，具有多层次的控制和堆栈机制以及执行多个并发操作的能力，并为用户提供灵活，简化的界面，保护用户不受任何用户无害的影响。该系统内部由多个独立的独立处理器组成，每个独立的处理器具有单独的微指令控制和至少一个独立于中央通信和存储器节点的独立端口。通信和存储器节点是具有独立且独立的微指令控制的独立处理器，并且包括能够执行多个并发存储器和通信操作的多个独立操作的微指令控制的处理器。寻址机制允许永久，唯一的信息识别和所有这些系统可访问和共同的极大的地址空间。地址与系统物理配置无关。信息被识别为细粒度级别和信息类型和格式。保护机制提供与个体信息相关联的可变访问权限。用户语言指令被转换为方言编码的，统一的中间级指令，以便为所有用户语言提供相同的执行功能。操作数由统一格式名称引用，通过对用户透明的内部机制转换为地址。

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