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    • 1. 发明授权
    • Ultra high throughput wafer vacuum processing system
    • 超高产量晶圆真空处理系统
    • US5855681A
    • 1999-01-05
    • US751485
    • 1996-11-18
    • Dan MaydanSasson SomekhAshok SinhaKevin FairbairnChristopher LaneKelly ColborneHari K. PonnekantiW. N.(Nick) Taylor
    • Dan MaydanSasson SomekhAshok SinhaKevin FairbairnChristopher LaneKelly ColborneHari K. PonnekantiW. N.(Nick) Taylor
    • H01L21/00H01L21/205H01L21/677H01L21/687C23C16/00C23F1/02
    • H01L21/67167H01L21/6719H01L21/67196H01L21/67201H01L21/67742H01L21/68707H01L21/68785
    • The present invention generally provides a cassette-to-cassette vacuum processing system which concurrently processes multiple wafers and combines the advantages of single wafer process chambers and multiple wafer handling for high quality wafer processing, high wafer throughput and reduced footprint. In accordance with one aspect of the invention, the system is preferably a staged vacuum system which generally includes a loadlock chamber for introducing wafers into the system and which also provides wafer cooling following processing, a transfer chamber for housing a wafer handler, and one or more processing chambers each having two or more processing regions which are isolatable from each other and preferably share a common gas supply and a common exhaust pump. The processing regions also preferably include separate gas distribution assemblies and RF power sources to provide a uniform plasma density over a wafer surface in each processing region. The processing chambers are configured to allow multiple, isolated processes to be performed concurrently in at least two processing regions so that at least two wafers can be processed simultaneously in a chamber with a high degree of process control provided by shared gas sources, shared exhaust systems, separate gas distribution assemblies, separate RF power sources, and separate temperature control systems.
    • 本发明通常提供一种盒式到盒式真空处理系统,其同时处理多个晶片,并且结合了单晶片处理室和多个晶片处理的优点,用于高质量晶片处理,高晶圆吞吐量和减小的占地面积。 根据本发明的一个方面,该系统优选地是分级真空系统,其通常包括用于将晶片引入系统中并且还提供后续处理的晶片冷却的负载锁定室,用于容纳晶片处理器的传送室,以及一个或 更多的处理室具有可彼此隔离的两个或更多个处理区域,并且优选地共享公共气体供应源和公共排气泵。 处理区域还优选地包括单独的气体分配组件和RF功率源,以在每个处理区域中在晶片表面上提供均匀的等离子体密度。 处理室被配置为允许在至少两个处理区域中同时执行多个隔离过程,使得可以在室内同时处理至少两个晶片,具有由共用气源提供的高程度的过程控制,共用排气系统 ,独立的气体分配组件,独立的射频电源和独立的温度控制系统。
    • 2. 发明授权
    • Process and apparatus for full wafer deposition
    • 用于全晶圆沉积的工艺和设备
    • US5384008A
    • 1995-01-24
    • US79481
    • 1993-06-18
    • Ashok SinhaSasson Somekh
    • Ashok SinhaSasson Somekh
    • C23C16/458H01L21/00
    • H01L21/02087C23C16/4583H01L21/0209H01L21/68735H01L21/32136Y10S438/905Y10S438/928
    • A process and apparatus is described for depositing a layer of material over the entire frontside surface of a semiconductor wafer without leaving residues on the backside of said wafer. A semiconductor wafer is placed on the surface of a first wafer support without contacting the frontside surface of the wafer to thereby permit access by deposition materials to the entire frontside surface of the wafer, and then a layer of material is deposited on the entire frontside surface of the semiconductor wafer. To remove any deposits formed on the backside of the wafer during such a deposition, the coated wafer is then placed generally coaxially on the surface of a generally circular second wafer support which will permit access to the outermost portions of the backside of the wafer. In one embodiment the second wafer support is provided with an annular groove coaxially formed in the surface of the second wafer support which faces the backside of the wafer. This annular groove has an outer diameter larger than the diameter of the wafer and an inner diameter smaller than the outer diameter of that portion of the backside of the wafer not containing deposits thereon from the deposition step, so that all of the backside surface containing such depositions is exposed by the groove. The wafer is then etched to remove from the backside any materials deposited thereon during the deposition step, by permitting etchant materials to contact such backside deposits through the annular groove formed in the second wafer support.
    • 描述了用于在半导体晶片的整个前侧表面上沉积材料层而不在所述晶片的背面留下残留物的方法和装置。 将半导体晶片放置在第一晶片支撑体的表面上,而不接触晶片的前侧表面,从而允许通过沉积材料进入晶片的整个前侧表面,然后在整个前侧表面上沉积一层材料 的半导体晶片。 为了在这样的沉积期间去除形成在晶片背面的任何沉积物,涂覆的晶片然后大致同轴地放置在大致圆形的第二晶片支撑件的表面上,这将允许进入晶片背面的最外部分。 在一个实施例中,第二晶片支撑件设置有同轴地形成在面向晶片背面的第二晶片支撑件的表面中的环形槽。 该环形槽的外径大于晶片的直径,内径小于晶片背面部分的外径,该晶片的背面不含有从沉积步骤沉积在其上的部分,所以包含这种 凹槽露出沉积物。 然后在沉积步骤期间,通过允许蚀刻剂材料通过形成在第二晶片支撑件中的环形槽接触这种背面沉积物,从而将晶片从背面剥离出沉积在其上的任何材料。
    • 9. 发明申请
    • Activated species generator for rapid cycle deposition processes
    • 用于快速循环沉积工艺的活性物种发生器
    • US20060035025A1
    • 2006-02-16
    • US11146295
    • 2005-06-06
    • Donald VerplanckenAshok Sinha
    • Donald VerplanckenAshok Sinha
    • C23C14/00C23C16/00
    • C23C16/45542C23C16/452H01J37/32357
    • A method for providing activated species for a cyclical deposition process is provided herein. In one aspect, the method includes delivering a gas to be activated into a plasma generator, activating the gas to create a volume of reactive species, delivering a fraction of the reactive species into a processing region to react within a substrate therein, and maintaining at least a portion of the gas remaining in the plasma generator in an activated state after delivering the fraction of the gas into the process region. The plasma generator may include a high density plasma (HDP) generator, a microwave generator, a radio-frequency (RF) generator, an inductive-coupled plasma (ICP) generator, a capacitively coupled generator, or combinations thereof.
    • 本文提供了用于提供用于循环沉积工艺的活化物质的方法。 在一个方面,所述方法包括将待激活的气体输送到等离子体发生器中,激活气体以产生一定体积的反应物质,将一部分反应性物质输送到处理区域中以在其内部的基底内反应并维持在 在将一部分气体输送到处理区域中之后,剩余在等离子体发生器中的气体的至少一部分处于活化状态。 等离子体发生器可以包括高密度等离子体(HDP)发生器,微波发生器,射频(RF)发生器,感应耦合等离子体(ICP)发生器,电容耦合发生器或其组合。