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1. 发明授权

US07688008B2 Lighting lamp 有权
标题翻译：照明灯
公开(公告)号：US07688008B2
公开(公告)日：2010-03-30
申请号：US11562476
申请日：2006-11-22
申请人： Daisuke Uchida , Osamu Miyata , Toshiyuki Kondo
发明人： Daisuke Uchida , Osamu Miyata , Toshiyuki Kondo
IPC分类号： H05B37/02
CPC分类号： H05B33/0845 , H05B33/0818
摘要： A lighting lamp 1 using LED lamps as a light source can include a delay circuit 5, a power supply control unit 6, and a timer circuit 7. The delay circuit 5 can be configured to cause the luminous intensity of the LED lamps to rise along a predetermined slope upon turning on the lighting lamp. The power supply control unit and the timer circuit can be configured to cause the luminous intensity of the LED lamps to fall along a predetermined slope which has an inflection point P at a predetermined time point along the slope.
摘要翻译：使用LED灯作为光源的照明灯1可以包括延迟电路5，电源控制单元6和定时器电路7.延迟电路5可以被配置为使LED灯的发光强度沿着在点亮照明灯时预定的斜率。电源控制单元和定时器电路可以被配置为使得LED灯的发光强度沿着沿斜率在预定时间点具有拐点P的预定斜率下降。

2. 发明申请

US20070120507A1 LIGHTING LAMP 有权
标题翻译：照明灯
公开(公告)号：US20070120507A1
公开(公告)日：2007-05-31
申请号：US11562476
申请日：2006-11-22
申请人： Daisuke Uchida , Osamu Miyata , Toshiyuki Kondo
发明人： Daisuke Uchida , Osamu Miyata , Toshiyuki Kondo
IPC分类号： H05B37/02
CPC分类号： H05B33/0845 , H05B33/0818
摘要： A lighting lamp 1 using LED lamps as a light source can include a delay circuit 5, a power supply control unit 6, and a timer circuit 7. The delay circuit 5 can be configured to cause the luminous intensity of the LED lamps to rise along a predetermined slope upon turning on the lighting lamp. The power supply control unit and the timer circuit can be configured to cause the luminous intensity of the LED lamps to fall along a predetermined slope which has an inflection point P at a predetermined time point along the slope.
摘要翻译：使用LED灯作为光源的照明灯1可以包括延迟电路5，电源控制单元6和定时器电路7.延迟电路5可以被配置为使LED灯的发光强度沿着在点亮照明灯时预定的斜率。电源控制单元和定时器电路可以被配置为使得LED灯的发光强度沿着沿斜率在预定时间点具有拐点P的预定斜率下降。

3. 发明授权

US08664779B2 Semiconductor device with front and back side resin layers having different thermal expansion coefficient and elasticity modulus 有权
公开(公告)号：US08664779B2
公开(公告)日：2014-03-04
申请号：US13441019
申请日：2012-04-06
申请人： Masaki Kasai , Osamu Miyata
发明人： Masaki Kasai , Osamu Miyata
IPC分类号： H01L23/29
CPC分类号： H01L23/49816 , H01L23/3114 , H01L23/3171 , H01L23/3735 , H01L23/544 , H01L2223/54406 , H01L2223/5448 , H01L2224/16 , H01L2924/01004
摘要： Disclosed are a semiconductor device wherein warping of a semiconductor chip due to a sudden temperature change can be prevented without increasing the thickness, and a semiconductor device assembly. The semiconductor device comprises a semiconductor chip, a front side resin layer formed on the front surface of the semiconductor chip by using a first resin material, and a back side resin layer formed on the back surface of the semiconductor chip by using a second resin material having a higher thermal expansion coefficient than the first resin material. The back side resin layer is formed thinner than the front side resin layer.

4. 发明授权

US08653657B2 Semiconductor chip, method of manufacturing semiconductor chip, and semiconductor device 有权
标题翻译：半导体芯片，半导体芯片的制造方法以及半导体装置
公开(公告)号：US08653657B2
公开(公告)日：2014-02-18
申请号：US11990875
申请日：2006-08-18
申请人： Osamu Miyata , Tadahiro Morifuji
发明人： Osamu Miyata , Tadahiro Morifuji
IPC分类号： H01L29/40
CPC分类号： H01L22/34 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/17 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05554 , H01L2224/0603 , H01L2224/06102 , H01L2224/10135 , H01L2224/10165 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/1403 , H01L2224/16145 , H01L2224/32245 , H01L2224/48247 , H01L2224/49175 , H01L2224/49431 , H01L2224/73265 , H01L2224/81136 , H01L2224/81141 , H01L2224/81193 , H01L2224/81801 , H01L2225/06593 , H01L2225/06596 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10162 , H01L2924/181 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： There are provided a semiconductor device capable of accurately determining whether a semiconductor chip is bonded to a solid-state device such as the other semiconductor chip parallelly with each other, a semiconductor chip used for the semiconductor device, and a method of manufacturing the semiconductor chip. The semiconductor chip includes a functional bump projected with a first projection amount from the surface of the semiconductor chip and electrically connecting the semiconductor chip to the solid-state device, and a connection confirmation bump projected with a second projection amount, which is smaller than the first projection amount, from the surface of the semiconductor chip and used for confirming the state of the electrical connection by the functional bump.
摘要翻译：提供了能够准确地确定半导体芯片是否彼此平行地结合到诸如其他半导体芯片的固态器件的半导体器件的半导体器件，以及用于半导体器件的半导体芯片的制造方法。半导体芯片包括从半导体芯片的表面以第一投影量投影的功能性凸块，并且将半导体芯片电连接到固态器件，以及以第二投影量投影的连接确认凸块，其小于第一突出量，从半导体芯片的表面，用于确认由功能凸块的电连接的状态。

5. 发明授权

US08405227B2 Semiconductor device with a semiconductor chip connected in a flip chip manner 有权
公开(公告)号：US08405227B2
公开(公告)日：2013-03-26
申请号：US10594561
申请日：2005-07-21
申请人： Kazumasa Tanida , Osamu Miyata
发明人： Kazumasa Tanida , Osamu Miyata
IPC分类号： H01L23/495 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/16 , H01L21/563 , H01L23/3142 , H01L23/3157 , H01L23/3185 , H01L23/49811 , H01L23/49816 , H01L23/49838 , H01L23/52 , H01L23/562 , H01L24/01 , H01L24/17 , H01L24/28 , H01L24/32 , H01L24/73 , H01L24/75 , H01L24/81 , H01L24/83 , H01L51/5246 , H01L2224/01 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/26175 , H01L2224/32225 , H01L2224/73204 , H01L2224/75252 , H01L2224/81191 , H01L2224/81815 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01015 , H01L2924/01033 , H01L2924/01075 , H01L2924/14 , H01L2924/153 , H01L2924/183 , H01L2924/3512 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A semiconductor device (1,21) includes a solid state device (2,22), a semiconductor chip (3) that has a functional surface (3a) on which a functional element (4) is formed and that is bonded on a surface of the solid state device with the functional surface thereof facing the surface of the solid state device and while maintaining a predetermined distance between the functional surface thereof and the surface of the solid state device, an insulating film (6) that is provided on the surface (2a, 22a) of the solid state device facing the semiconductor chip and that has an opening (6a) greater in size than the semiconductor chip when the surface of the solid state device facing the semiconductor chip is vertically viewed down in plane, and a sealing layer (7) that seals a space between the solid state device and the semiconductor chip.

6. 发明授权

US07714448B2 Semiconductor device and method for manufacturing semiconductor device 有权
公开(公告)号：US07714448B2
公开(公告)日：2010-05-11
申请号：US11667849
申请日：2005-11-16
申请人： Osamu Miyata , Masaki Kasai , Shingo Higuchi
发明人： Osamu Miyata , Masaki Kasai , Shingo Higuchi
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/3178 , H01L21/78 , H01L23/291 , H01L23/293 , H01L23/3114 , H01L23/3142 , H01L23/3171 , H01L23/3192 , H01L23/528 , H01L23/544 , H01L23/562 , H01L24/02 , H01L24/05 , H01L24/10 , H01L24/13 , H01L24/94 , H01L24/96 , H01L2223/5446 , H01L2224/02255 , H01L2224/0226 , H01L2224/02377 , H01L2224/02381 , H01L2224/0239 , H01L2224/024 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05124 , H01L2224/05568 , H01L2224/05569 , H01L2224/05571 , H01L2224/05647 , H01L2224/12105 , H01L2224/13023 , H01L2224/13024 , H01L2224/13099 , H01L2224/131 , H01L2224/13124 , H01L2224/16 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/014 , H01L2924/05042 , H01L2924/05442 , H01L2924/0665 , H01L2924/07025 , H01L2924/10161 , H01L2924/10253 , H01L2924/12042 , H01L2924/182 , H01L2924/186 , H01L2924/3025 , H01L2924/00 , H01L2224/13 , H01L2924/00014 , H01L2924/00012
摘要： An inventive semiconductor device includes a semiconductor chip having a passivation film, and a sealing resin layer provided over the passivation film for sealing a front side of the semiconductor chip. The sealing resin layer extends to a side surface of the passivation film to cover the side surface.

7. 发明授权

US07598613B2 Flip chip bonding structure 有权
标题翻译：倒装芯片结合结构
公开(公告)号：US07598613B2
公开(公告)日：2009-10-06
申请号：US11597422
申请日：2005-09-01
申请人： Kazumasa Tanida , Osamu Miyata
发明人： Kazumasa Tanida , Osamu Miyata
IPC分类号： H01L23/48 , H01L21/00 , B23K31/02
CPC分类号： H01L24/81 , H01L23/49811 , H01L24/16 , H01L25/0657 , H01L2224/05001 , H01L2224/05022 , H01L2224/05027 , H01L2224/05568 , H01L2224/05573 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/13099 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13609 , H01L2224/16145 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/8121 , H01L2224/81815 , H01L2224/83102 , H01L2224/92125 , H01L2225/06513 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2224/05099
摘要： A semiconductor device is provided with: a solid device having a connection surface formed with a connection electrode projected therefrom; a semiconductor chip which has a functional surface formed with a metal bump projected therefrom and which is bonded to the connection surface of the solid device as directing its functional surface to the connection surface and maintaining a predetermined distance between the functional surface and the connection surface; and a connecting member containing a low melting point metal having a lower solidus temperature than that of the connection electrode and the bump, and interconnecting the connection electrode and the bump. A sum of a height of the connection electrode and a height of the bump is not less than a half of the predetermined distance.
摘要翻译：半导体器件具有：固体器件，其具有形成有从其突出的连接电极的连接表面; 半导体芯片，其具有形成有从其突出的金属凸块的功能表面，并且将其功能表面指向连接表面并且在功能表面和连接表面之间保持预定距离，并将其粘结到固体设备的连接表面; 以及连接构件，其包含具有比连接电极和凸块的固相线低的固相线温度的低熔点金属，并且使连接电极和凸块相互连接。连接电极的高度和凸起的高度之和不小于预定距离的一半。

8. 发明申请

US20090127705A1 Semiconductor chip, method of manufacturing semiconductor chip, and semiconductor device 有权
标题翻译：半导体芯片，半导体芯片的制造方法以及半导体装置
公开(公告)号：US20090127705A1
公开(公告)日：2009-05-21
申请号：US11990875
申请日：2006-08-18
申请人： Osamu Miyata , Tadahiro Morifuji
发明人： Osamu Miyata , Tadahiro Morifuji
IPC分类号： H01L23/498 , H01L21/768
CPC分类号： H01L22/34 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/17 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05554 , H01L2224/0603 , H01L2224/06102 , H01L2224/10135 , H01L2224/10165 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/1403 , H01L2224/16145 , H01L2224/32245 , H01L2224/48247 , H01L2224/49175 , H01L2224/49431 , H01L2224/73265 , H01L2224/81136 , H01L2224/81141 , H01L2224/81193 , H01L2224/81801 , H01L2225/06593 , H01L2225/06596 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10162 , H01L2924/181 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： There are provided a semiconductor device capable of accurately determining whether a semiconductor chip is bonded to a solid-state device such as the other semiconductor chip parallelly with each other, a semiconductor chip used for the semiconductor device, and a method of manufacturing the semiconductor chip. The semiconductor chip includes a functional bump projected with a first projection amount from the surface of the semiconductor chip and electrically connecting the semiconductor chip to the solid-state device, and a connection confirmation bump projected with a second projection amount, which is smaller than the first projection amount, from the surface of the semiconductor chip and used for confirming the state of the electrical connection by the functional bump.
摘要翻译：提供了能够准确地确定半导体芯片是否彼此平行地结合到诸如其他半导体芯片的固态器件的半导体器件的半导体器件，以及用于半导体器件的半导体芯片的制造方法。半导体芯片包括从半导体芯片的表面以第一投影量投影的功能性凸块，并且将半导体芯片电连接到固态器件，以及以第二投影量投影的连接确认凸块，其小于第一突出量，从半导体芯片的表面，用于确认由功能凸块的电连接的状态。

9. 发明授权

US06404142B2 Starting device for discharge lamp 失效
标题翻译：放电灯启动装置
公开(公告)号：US06404142B2
公开(公告)日：2002-06-11
申请号：US09754233
申请日：2001-01-02
申请人： Osamu Miyata , Hisao Hirata
发明人： Osamu Miyata , Hisao Hirata
IPC分类号： H05B4116
CPC分类号： H05B41/042
摘要： One of the objectives of the present invention are to provide smaller, lighter and less expensive structure in a starting device for discharge lamp for car use so as to prevent breakage due to vibrations etc . . . And another objective is to attain simultaneous electrical and structural connections between a high voltage electrode and a coil of a starting transformer. The device having the following constitution realizes the above-mentioned objectives. A starting device for a discharge lamp comprises a socket equipped with a high voltage electrode and a grounding electrode, a bobbin with a core-less structure, a starting transformer comprising a primary coil and a secondary coil wound around the bobbin. A screw electrode is arranged at the center of the end face of the bobbin. One end of the screw electrode is connected to an output terminal of the high voltage side of the secondary coil on the starting transformer. And the other end of the screw electrode is screwed and connected to a terminal of a high voltage side of the socket.
摘要翻译：本发明的目的之一是在用于汽车使用的放电灯的启动装置中提供更小，更轻和更便宜的结构，以防止由于振动等引起的破损。。。另一个目标是在起动变压器的高压电极和线圈之间实现同时的电连接和结构连接。具有以下结构的装置实现上述目的。一种用于放电灯的起动装置，包括配备有高压电极和接地电极的插座，具有无芯结构的线轴，包括初级线圈和绕线圈缠绕的次级线圈的起动变压器。螺旋电极布置在线轴的端面的中心。螺旋电极的一端连接到起动变压器上次级线圈的高压侧的输出端子。并且螺丝电极的另一端被螺纹连接并连接到插座的高压侧的端子。

10. 发明授权

US06207473B1 Process for manufacturing semiconductor wafer, process for manufacturing semiconductor chip, and IC card 有权
标题翻译：制造半导体晶片的工艺，制造半导体芯片的工艺和IC卡
公开(公告)号：US06207473B1
公开(公告)日：2001-03-27
申请号：US09147824
申请日：1999-03-15
申请人： Minoru Hirai , Shigeyuki Ueda , Osamu Miyata , Tomoharu Horio
发明人： Minoru Hirai , Shigeyuki Ueda , Osamu Miyata , Tomoharu Horio
IPC分类号： H01L2146
CPC分类号： H01L24/12 , H01L23/49855 , H01L23/544 , H01L24/11 , H01L24/16 , H01L24/29 , H01L24/31 , H01L24/81 , H01L24/83 , H01L24/94 , H01L2223/5442 , H01L2223/5446 , H01L2223/54473 , H01L2224/05124 , H01L2224/05166 , H01L2224/05669 , H01L2224/13099 , H01L2224/1319 , H01L2224/16225 , H01L2224/274 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/2939 , H01L2224/29444 , H01L2224/29455 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/81193 , H01L2224/81801 , H01L2224/83191 , H01L2224/83851 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01057 , H01L2924/01058 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0665 , H01L2924/0781 , H01L2924/07811 , H01L2924/12044 , H01L2924/19041 , H01L2924/00 , H01L2924/00014
摘要： A manufacturing method includes the steps of integrally fabricating a plurality of circuit elements (41) on a substrate (1a), forming electrode bumps (11) on electrode pads (11b) conducting with circuit elements (41), forming a scribe line or a scribe line mark (21a) at a prescribed position of substrate (1a), and sticking an anisotropically conductive film (30) to cover each of the electrode bumps (11) and the scribe line or the scribe line mark (21a). The step of forming the electrode bumps (11) and the step of forming the scribe line or the scribe line mark (21a) are performed simultaneously. The electrode bumps (11) and the scribe line or the scribe line mark (21a) are preferably formed of gold. By the manufacturing method, even when an anisotropically conductive film is stuck on a semiconductor wafer having a plurality of circuit elements formed, the circuit elements can be diced as desired.
摘要翻译：一种制造方法包括以下步骤：在基板（1a）上整体制造多个电路元件（41），在电路元件（41）导电的电极焊盘（11b）上形成电极凸块（11），形成刻划线或在基板（1a）的规定位置处划线标记（21a），并且将各向异性导电膜（30）粘贴以覆盖每个电极凸块（11）和划线或划线标记（21a）。形成电极凸块（11）的步骤和形成刻划线或划线标记（21a）的步骤同时进行。电极凸块（11）和划痕线或划线标记（21a）优选由金形成。通过该制造方法，即使将各向异性导电膜贴合在形成有多个电路元件的半导体晶片上，也可以根据需要切割电路元件。

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