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1. 发明授权

US08158449B2 Particle emission analysis for semiconductor fabrication steps 有权
标题翻译：半导体制造步骤的粒子发射分析
公开(公告)号：US08158449B2
公开(公告)日：2012-04-17
申请号：US12247474
申请日：2008-10-08
申请人： Cyril Cabral, Jr. , Michael S. Gordon , Jeff McMurray , Liesl M. McMurray, legal representative , Cristina Plettner , Paul Andrew Ronsheim
发明人： Cyril Cabral, Jr. , Michael S. Gordon , Jeff McMurray , Cristina Plettner , Paul Andrew Ronsheim
IPC分类号： H01L21/00
CPC分类号： G01T1/00 , H01L22/10
摘要： A structure and a method for operating the same. The method includes providing a detecting structure which includes N detectors. N is a positive integer. A fabrication step is simultaneously performed on the detecting structure and M product structures in a fabrication tool resulting in a particle-emitting layer on the detecting structure. The detecting structure is different than the M product structures. The M product structures are identical. M is a positive integer. An impact of emitting particles from the particle-emitting layer on the detecting structure is analyzed after said performing is performed.
摘要翻译：一种结构及其操作方法。该方法包括提供包括N个检测器的检测结构。 N是正整数。在制造工具中的检测结构和M产品结构上同时进行制造步骤，从而在检测结构上产生颗粒发射层。检测结构与M产品结构不同。 M产品结构相同。 M是正整数。在执行所述执行之后，分析从颗粒发射层发射颗粒对检测结构的影响。

2. 发明申请

US20100084656A1 PARTICLE EMISSION ANALYSIS FOR SEMICONDUCTOR FABRICATION STEPS 有权
标题翻译：用于半导体制造步骤的颗粒排放分析
公开(公告)号：US20100084656A1
公开(公告)日：2010-04-08
申请号：US12247474
申请日：2008-10-08
申请人： Cyril Cabral, JR. , Michael S. Gordon , Jeff McMurray , Liesl McMurray , Cristina Plettner , Paul Andrew Ronsheim
发明人： Cyril Cabral, JR. , Michael S. Gordon , Jeff McMurray , Liesl McMurray , Cristina Plettner , Paul Andrew Ronsheim
IPC分类号： H01L23/58 , H01L21/66
CPC分类号： G01T1/00 , H01L22/10
摘要： A structure and a method for operating the same. The method includes providing a detecting structure which includes N detectors. N is a positive integer. A fabrication step is simultaneously performed on the detecting structure and M product structures in a fabrication tool resulting in a particle-emitting layer on the detecting structure. The detecting structure is different than the M product structures. The M product structures are identical. M is a positive integer. An impact of emitting particles from the particle-emitting layer on the detecting structure is analyzed after said performing is performed.
摘要翻译：一种结构及其操作方法。该方法包括提供包括N个检测器的检测结构。 N是正整数。在制造工具中的检测结构和M产品结构上同时进行制造步骤，从而在检测结构上产生颗粒发射层。检测结构与M产品结构不同。 M产品结构相同。 M是正整数。在执行所述执行之后，分析从颗粒发射层发射颗粒对检测结构的影响。

3. 发明申请

US20090039270A1 LARGE-AREA ALPHA-PARTICLE DETECTOR AND METHOD FOR USE 审中-公开
标题翻译：大面积ALPHA颗粒检测器和使用方法
公开(公告)号：US20090039270A1
公开(公告)日：2009-02-12
申请号：US11835475
申请日：2007-08-08
申请人： Cyril Cabral, JR. , Michael S. Gordon , Cristina Plettner , Kenneth Parker Rodbell
发明人： Cyril Cabral, JR. , Michael S. Gordon , Cristina Plettner , Kenneth Parker Rodbell
IPC分类号： G01T1/24
CPC分类号： G01T1/242 , G01T1/244
摘要： A method and detector for detecting particle emissions from a test sample includes positioning a detector over the test sample, wherein the detector includes a plurality of detection units, wherein each detection unit includes a first silicon detector and a barrier layer removably disposed over the first silicon detector. The method includes generating a first current signal in the silicon detector in response to receiving a first particle emitted from an atom of the test sample by the silicon detector of the first detection unit, and responsive to a recoiling daughter nuclide of the atom striking the barrier layer of the first detection unit, the recoiling daughter nuclide resulting from emission of the first particle from the atom, absorbing the recoiling daughter nuclide by the barrier layer of the first detection unit.
摘要翻译：一种用于检测来自测试样品的颗粒发射的方法和检测器，包括：将检测器定位在测试样品上，其中检测器包括多个检测单元，其中每个检测单元包括第一硅检测器和可移除地设置在第一硅上的阻挡层探测器。所述方法包括在所述硅检测器中产生第一电流信号，以响应于由所述第一检测单元的硅检测器接收从所述测试样品的原子发射的第一粒子，并且响应于所述原子撞击所述阻挡层的反弹子弹核子所述第一检测单元的层，由所述原子发射所述第一颗粒产生的所述回缩子核素，通过所述第一检测单元的阻挡层吸收所述回弹子体核素。

4. 发明授权

US08212218B2 Dosimeter powered by passive RF absorption 有权
标题翻译：剂量计由被动射频吸收提供动力
公开(公告)号：US08212218B2
公开(公告)日：2012-07-03
申请号：US12627076
申请日：2009-11-30
申请人： Cyril Cabral, Jr. , Michael S. Gordon , Steven J. Koester , Conal E. Murray , Kenneth P. Rodbell , Stephen M. Rossnagel , Robert L. Wisnieff , Jeng-bang Yau
发明人： Cyril Cabral, Jr. , Michael S. Gordon , Steven J. Koester , Conal E. Murray , Kenneth P. Rodbell , Stephen M. Rossnagel , Robert L. Wisnieff , Jeng-bang Yau
IPC分类号： G01T1/02
CPC分类号： G01T1/026
摘要： A system for determining an amount of radiation includes a dosimeter configured to receive the amount of radiation, the dosimeter comprising a circuit having a resonant frequency, such that the resonant frequency of the circuit changes according to the amount of radiation received by the dosimeter, the dosimeter further configured to absorb RF energy at the resonant frequency of the circuit; a radio frequency (RF) transmitter configured to transmit the RF energy at the resonant frequency to the dosimeter; and a receiver configured to determine the resonant frequency of the dosimeter based on the absorbed RF energy, wherein the amount of radiation is determined based on the resonant frequency.
摘要翻译：用于确定辐射量的系统包括配置成接收辐射量的剂量计，该剂量计包括具有谐振频率的电路，使得电路的谐振频率根据剂量计接收的辐射量而改变，剂量计还被配置为吸收电路的谐振频率处的RF能量; 射频（RF）发射器，被配置为以共振频率将所述RF能量传输到所述剂量计; 以及接收器，被配置为基于所吸收的RF能量来确定所述剂量计的谐振频率，其中所述辐射量基于所述谐振频率来确定。

5. 发明授权

US07601627B2 Method for reduction of soft error rates in integrated circuits 失效
标题翻译：降低集成电路中软错误率的方法
公开(公告)号：US07601627B2
公开(公告)日：2009-10-13
申请号：US12051040
申请日：2008-03-19
申请人： Cyril Cabral, Jr. , Michael S. Gordon , Kenneth P. Rodbell
发明人： Cyril Cabral, Jr. , Michael S. Gordon , Kenneth P. Rodbell
IPC分类号： H01L21/44
CPC分类号： H01L23/556 , H01L21/76801 , H01L21/76834 , H01L21/76838 , H01L23/5329 , H01L23/53295 , H01L23/585 , H01L24/03 , H01L24/05 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/0401 , H01L2224/04042 , H01L2224/05006 , H01L2224/05554 , H01L2224/05572 , H01L2224/05599 , H01L2224/13007 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/16 , H01L2224/451 , H01L2224/48227 , H01L2224/48465 , H01L2224/85399 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01057 , H01L2924/01063 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/01084 , H01L2924/01092 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10253 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/15174 , H01L2924/15312 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/3025 , H01L2224/45099 , H01L2924/00 , H01L2224/05552
摘要： A method for reduction of soft error rates in integrated circuits. The method including: providing a test device, the test device comprising: a semiconductor substrate; and a stack of one or more wiring levels stacked from a lowermost wiring level to an uppermost wiring level, the lowermost wiring level on a top surface of the substrate; selecting an energy of alpha particles of a given energy to be stopped from penetrating through the stack of one or more wiring levels; bombarding the semiconductor substrate with a flux of the alpha particles of the selected energy; and determining a combination of a thickness of a blocking layer and a volume percent of metal wires in the blocking layer sufficient to stop a predetermined percentage of alpha particles of the maximum energy striking a top surface of the blocking layer from penetrating through the stack of one or more wiring levels.
摘要翻译：降低集成电路中软错误率的方法。所述方法包括：提供测试装置，所述测试装置包括：半导体衬底; 以及从最下层布线层到最上布线层叠的一层或多层布线层的堆叠，在基板的上表面上的最下布线层; 选择要停止的给定能量的α粒子的能量穿透一个或多个布线层的堆叠; 用所选能量的α粒子的通量轰击半导体衬底; 并且确定阻挡层的厚度和阻挡层中的金属线的体积百分比的组合足以阻止撞击阻挡层的顶表面的最大能量的预定百分比的α粒子穿过一个或更多的布线级别。

6. 发明授权

US07381635B2 Method and structure for reduction of soft error rates in integrated circuits 有权
标题翻译：降低集成电路中软错误率的方法和结构
公开(公告)号：US07381635B2
公开(公告)日：2008-06-03
申请号：US11183647
申请日：2005-07-18
申请人： Cyril Cabral, Jr. , Michael S. Gordon , Kenneth P. Rodbell
发明人： Cyril Cabral, Jr. , Michael S. Gordon , Kenneth P. Rodbell
IPC分类号： H01L21/44
CPC分类号： H01L23/556 , H01L21/76801 , H01L21/76834 , H01L21/76838 , H01L23/5329 , H01L23/53295 , H01L23/585 , H01L24/03 , H01L24/05 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/0401 , H01L2224/04042 , H01L2224/05006 , H01L2224/05554 , H01L2224/05572 , H01L2224/05599 , H01L2224/13007 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/16 , H01L2224/451 , H01L2224/48227 , H01L2224/48465 , H01L2224/85399 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01057 , H01L2924/01063 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/01084 , H01L2924/01092 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10253 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/15174 , H01L2924/15312 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/3025 , H01L2224/45099 , H01L2924/00 , H01L2224/05552
摘要： A structure and a method for reduction of soft error rates in integrated circuits. The structure including: a semiconductor substrate; and a stack of one or more wiring levels stacked from a lowermost wiring level to an uppermost wiring level, the lowermost wiring level nearer the semiconductor substrate than the uppermost wiring level; and an alpha particle blocking layer on a top surface of the uppermost wiring level of the one or more wiring levels, the blocking layer comprising metal wires and a dielectric material, the blocking layer having a combination of a thickness of the blocking layer and a volume percent of metal wires in the blocking layer sufficient to stop a predetermined percentage of alpha particles of a selected energy or less striking the blocking layer from penetrating into the stack of one or more wiring levels or the substrate.
摘要翻译：降低集成电路中软错误率的结构和方法。该结构包括：半导体衬底; 以及从最下布线电平堆叠到最上布线电平的一个或多个布线电平的堆叠，比最上布线电平更靠近半导体基板的最下布线电平; 以及在所述一个或多个布线层的最上布线层的顶表面上的α粒子阻挡层，所述阻挡层包括金属线和介电材料，所述阻挡层具有阻挡层的厚度和体积阻挡层中的金属线的百分比足以阻止预定百分比的选定能量的α粒子或更少的击穿阻挡层的金属线穿透到一个或多个布线层或衬底的堆叠中。

7. 发明申请

US20110175211A1 Method And Structure To Reduce Soft Error Rate Susceptibility In Semiconductor Structures 有权
标题翻译：降低半导体结构中软错误率敏感性的方法和结构
公开(公告)号：US20110175211A1
公开(公告)日：2011-07-21
申请号：US12689268
申请日：2010-01-19
申请人： Cyril Cabral, JR. , Michael S. Gordon , David F. Heidel , Conal Eugene Murray , Kenneth Parker Rodbell , Henry Hong Ki Tang
发明人： Cyril Cabral, JR. , Michael S. Gordon , David F. Heidel , Conal Eugene Murray , Kenneth Parker Rodbell , Henry Hong Ki Tang
IPC分类号： H01L23/556 , H01L21/60 , H01L23/52 , H01L21/56
CPC分类号： H01L23/556 , H01L24/13 , H01L2924/01019 , H01L2924/01025 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01084 , H01L2924/1305 , H01L2924/14 , H01L2924/3025 , H01L2924/00
摘要： A method is disclosed that includes providing a semiconductor substrate having one or more device levels including a number of devices, and forming a number of wiring levels on a top surface of the one or more device levels, wherein one or more of the number of wiring levels includes one or more alpha particle blocking shields situated between at least one of the number of devices and a predetermined first location where a terminal pad will be formed in one of the wiring levels, the one or more alpha particle blocking shields placed at a second location, having one or more widths, and occupying a predetermined number of the wiring levels, sufficient to prevent a predetermined percentage of alpha particles of a selected energy or less expected to be emitted from an alpha particle emitting metallization to be formed adjacent and connected to the terminal pad from reaching the one device.
摘要翻译：公开了一种方法，其包括提供具有包括多个器件的一个或多个器件电平的半导体衬底，以及在所述一个或多个器件级的顶表面上形成多个布线电平，其中所述多个布线中的一个或多个水平包括一个或多个α粒子阻挡屏蔽，位于多个器件中的至少一个与预定的第一位置之间，其中端子焊盘将形成在一个布线层中，一个或多个α粒子阻挡屏蔽放置在第二个位置，具有一个或多个宽度并且占据预定数量的布线水平，足以防止预定百分比的α粒子被选择的能量或预期从发射的α粒子发射的金属化物发射出来邻近并连接到终端垫到达一个设备。

8. 发明授权

US07781871B2 Structure for reduction of soft error rates in integrated circuits 失效
标题翻译：降低集成电路中软错误率的结构
公开(公告)号：US07781871B2
公开(公告)日：2010-08-24
申请号：US12483364
申请日：2009-06-12
申请人： Cyril Cabral, Jr. , Michael S. Gordon , Kenneth P. Rodbell
发明人： Cyril Cabral, Jr. , Michael S. Gordon , Kenneth P. Rodbell
IPC分类号： H01L23/552
CPC分类号： H01L23/556 , H01L21/76801 , H01L21/76834 , H01L21/76838 , H01L23/5329 , H01L23/53295 , H01L23/585 , H01L24/03 , H01L24/05 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/0401 , H01L2224/04042 , H01L2224/05006 , H01L2224/05554 , H01L2224/05572 , H01L2224/05599 , H01L2224/13007 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/16 , H01L2224/451 , H01L2224/48227 , H01L2224/48465 , H01L2224/85399 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01057 , H01L2924/01063 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/01084 , H01L2924/01092 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10253 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/15174 , H01L2924/15312 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/3025 , H01L2224/45099 , H01L2924/00 , H01L2224/05552
摘要： A structure for reduction of soft error rates in integrated circuits. The structure including: a semiconductor substrate; and a stack of one or more wiring levels stacked from a lowermost wiring level to an uppermost wiring level, the lowermost wiring level nearer the semiconductor substrate than the uppermost wiring level; and an alpha particle blocking layer on a top surface of the uppermost wiring level of the one or more wiring levels, the blocking layer comprising metal wires and a dielectric material, the blocking layer having a combination of a thickness of the blocking layer and a volume percent of metal wires in the blocking layer sufficient to stop a predetermined percentage of alpha particles of a selected energy or less striking the blocking layer from penetrating into the stack of one or more wiring levels or the substrate.
摘要翻译：用于降低集成电路中软错误率的结构。该结构包括：半导体衬底; 以及从最下布线电平堆叠到最上布线电平的一个或多个布线电平的堆叠，比最上布线电平更靠近半导体基板的最下布线电平; 以及在所述一个或多个布线层的最上布线层的顶表面上的α粒子阻挡层，所述阻挡层包括金属线和介电材料，所述阻挡层具有阻挡层的厚度和体积阻挡层中的金属线的百分比足以阻止预定百分比的选定能量的α粒子或更少的击穿阻挡层的金属线穿透到一个或多个布线层或衬底的堆叠中。

9. 发明申请

US20110127438A1 Dosimeter Powered by Passive RF Absorption 有权
标题翻译：剂量计由被动RF吸收
公开(公告)号：US20110127438A1
公开(公告)日：2011-06-02
申请号：US12627076
申请日：2009-11-30
申请人： Cyril Cabral, JR. , Michael S. Gordon , Steven J. Koester , Conal E. Murray , Kenneth P. Rodbell , Stephen M. Rossnagel , Robert L. Wisnieff , Jeng-bang Yau
发明人： Cyril Cabral, JR. , Michael S. Gordon , Steven J. Koester , Conal E. Murray , Kenneth P. Rodbell , Stephen M. Rossnagel , Robert L. Wisnieff , Jeng-bang Yau
IPC分类号： G01T1/02 , G01T3/00
CPC分类号： G01T1/026
摘要： A system for determining an amount of radiation includes a dosimeter configured to receive the amount of radiation, the dosimeter comprising a circuit having a resonant frequency, such that the resonant frequency of the circuit changes according to the amount of radiation received by the dosimeter, the dosimeter further configured to absorb RF energy at the resonant frequency of the circuit; a radio frequency (RF) transmitter configured to transmit the RF energy at the resonant frequency to the dosimeter; and a receiver configured to determine the resonant frequency of the dosimeter based on the absorbed RF energy, wherein the amount of radiation is determined based on the resonant frequency.
摘要翻译：用于确定辐射量的系统包括配置成接收辐射量的剂量计，该剂量计包括具有谐振频率的电路，使得电路的谐振频率根据剂量计接收的辐射量而改变，剂量计还被配置为吸收电路的谐振频率处的RF能量; 射频（RF）发射器，被配置为以共振频率将所述RF能量传输到所述剂量计; 以及接收器，被配置为基于所吸收的RF能量来确定所述剂量计的谐振频率，其中所述辐射量基于所述谐振频率来确定。

10. 发明申请

US20090243053A1 STRUCTURE FOR REDUCTION OF SOFT ERROR RATES IN INTEGRATED CIRCUITS 失效
标题翻译：用于降低集成电路中软错误率的结构
公开(公告)号：US20090243053A1
公开(公告)日：2009-10-01
申请号：US12483364
申请日：2009-06-12
申请人： Cyril Cabral, JR. , Michael S. Gordon , Kenneth P. Rodbell
发明人： Cyril Cabral, JR. , Michael S. Gordon , Kenneth P. Rodbell
IPC分类号： H01L23/556
CPC分类号： H01L23/556 , H01L21/76801 , H01L21/76834 , H01L21/76838 , H01L23/5329 , H01L23/53295 , H01L23/585 , H01L24/03 , H01L24/05 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/0401 , H01L2224/04042 , H01L2224/05006 , H01L2224/05554 , H01L2224/05572 , H01L2224/05599 , H01L2224/13007 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/16 , H01L2224/451 , H01L2224/48227 , H01L2224/48465 , H01L2224/85399 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01057 , H01L2924/01063 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/01084 , H01L2924/01092 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10253 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/15174 , H01L2924/15312 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/3025 , H01L2224/45099 , H01L2924/00 , H01L2224/05552
摘要： A structure for reduction of soft error rates in integrated circuits. The structure including: a semiconductor substrate; and a stack of one or more wiring levels stacked from a lowermost wiring level to an uppermost wiring level, the lowermost wiring level nearer the semiconductor substrate than the uppermost wiring level; and an alpha particle blocking layer on a top surface of the uppermost wiring level of the one or more wiring levels, the blocking layer comprising metal wires and a dielectric material, the blocking layer having a combination of a thickness of the blocking layer and a volume percent of metal wires in the blocking layer sufficient to stop a predetermined percentage of alpha particles of a selected energy or less striking the blocking layer from penetrating into the stack of one or more wiring levels or the substrate.
摘要翻译：用于降低集成电路中软错误率的结构。该结构包括：半导体衬底; 以及从最下布线电平堆叠到最上布线电平的一个或多个布线电平的堆叠，比最上布线电平更靠近半导体基板的最下布线电平; 以及在所述一个或多个布线层的最上布线层的顶表面上的α粒子阻挡层，所述阻挡层包括金属线和介电材料，所述阻挡层具有阻挡层的厚度和体积阻挡层中的金属线的百分比足以阻止预定百分比的选定能量的α粒子或更少的击穿阻挡层的金属线穿透到一个或多个布线层或衬底的堆叠中。

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