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1. 发明授权

US06524908B2 Method for forming refractory metal-silicon-nitrogen capacitors and structures formed 失效
$Method for forming refractory metal-silicon-nitrogen capacitors and structures formed$
标题翻译：形成难熔金属 - 硅 - 氮电容器和结构的方法
公开(公告)号：US06524908B2
公开(公告)日：2003-02-25
申请号：US09872603
申请日：2001-06-01
申请人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Hsu , Keith Kwong Hon Wong
发明人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Hsu , Keith Kwong Hon Wong
IPC分类号： H01L218242
CPC分类号： H01L28/75 , C23C14/0073 , C23C14/0641 , H01L21/2855 , H01L21/28568
摘要： A method forforming a refractory metal-silicon-nitrogen capacitor in a semiconductor structure and the structure formed are described. In the method, a pre-processed semiconductor substrate is first positioned in a sputtering chamber. Ar gas is then flown into the sputtering chamber to sputter deposit a first refractory metal-silicon-nitrogen layer on the substrate from a refractory metal silicide target, or from two targets of a refractory metal and a silicon. N2 gas is then flown into the sputtering chamber until that the concentration of N2 gas in the chamber is at least 35% to sputter deposit a second refractory metal-silicon-nitrogen layer on top of the first refractory metal-silicon-nitrogen layer. The N2 gas flow is then stopped to sputter deposit a third refractory metal-silicon-nitrogen layer on top of the second refractory metal-silicon-nitrogen layer. The multi-layer stack of the refractory metal-silicon-nitrogen is then photolithographically formed into a capacitor.
摘要翻译：描述了一种在半导体结构中形成难熔金属 - 硅 - 氮电容器的方法和形成的结构。在该方法中，首先将预处理的半导体衬底定位在溅射室中。然后将Ar气体流入溅射室，以从耐火金属硅化物靶或从难熔金属和硅的两个靶溅射沉积在衬底上的第一难熔金属 - 硅 - 氮层。然后将N 2气体流入溅射室，直到室内的N 2气体的浓度至少为35％，以在第一难熔金属 - 硅 - 氮层的顶部溅射沉积第二难熔金属 - 硅 - 氮层。然后停止N 2气流以在第二难熔金属 - 硅 - 氮层的顶部溅射沉积第三难熔金属 - 硅 - 氮层。然后将难熔金属硅 - 氮的多层堆叠光刻形成电容器。

2. 发明授权

US06707097B2 Method for forming refractory metal-silicon-nitrogen capacitors and structures formed 有权
$Method for forming refractory metal-silicon-nitrogen capacitors and structures formed$
标题翻译：形成难熔金属 - 硅 - 氮电容器和结构的方法
公开(公告)号：US06707097B2
公开(公告)日：2004-03-16
申请号：US10346437
申请日：2003-01-16
申请人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Hsu , Keith Kwong Hon Wong
发明人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Hsu , Keith Kwong Hon Wong
IPC分类号： H01L218242
CPC分类号： H01L28/75 , C23C14/0073 , C23C14/0641 , H01L21/2855 , H01L21/28568
摘要： A method for forming a refractory metal-silicon-nitrogen capacitor in a semiconductor structure and the structure formed are described. In the method, a pre-processed semiconductor substrate is first positioned in a sputtering chamber. Ar gas is then flown into the sputtering chamber to sputter deposit a first refractory metal-silicon-nitrogen layer on the substrate from a refractory metal silicide target, or from two targets of a refractory metal and a silicon. N2 gas is then flown into the sputtering chamber until that the concentration of N2 gas in the chamber is at least 35% to sputter deposit a second refractory metal-silicon-nitrogen layer on top of the first refractory metal-silicon-nitrogen layer. The N2 gas flow is then stopped to sputter deposit a third refractory metal-silicon-nitrogen layer on top of the second refractory metal-silicon-nitrogen layer. The multi-layer stack of the refractory metal-silicon-nitrogen is then photolithographically formed into a capacitor.
摘要翻译：描述了在半导体结构中形成难熔金属 - 硅 - 氮电容器的方法和形成的结构。在该方法中，首先将预处理的半导体衬底定位在溅射室中。然后将Ar气体流入溅射室，以从耐火金属硅化物靶或从难熔金属和硅的两个靶溅射沉积在衬底上的第一难熔金属 - 硅 - 氮层。然后将N 2气体流入溅射室，直到室内的N 2气体的浓度至少为35％，以在第一难熔金属 - 硅 - 氮层的顶部溅射沉积第二难熔金属 - 硅 - 氮层。然后停止N 2气流以在第二难熔金属 - 硅 - 氮层的顶部溅射沉积第三难熔金属 - 硅 - 氮层。然后将难熔金属硅 - 氮的多层堆叠光刻形成电容器。

3. 发明授权

US06700203B1 Semiconductor structure having in-situ formed unit resistors 有权
标题翻译：具有原位形成单元电阻器的半导体结构
公开(公告)号：US06700203B1
公开(公告)日：2004-03-02
申请号：US09686742
申请日：2000-10-11
申请人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Lu-Chen Hsu , Keith Kwong Hon Wong
发明人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Lu-Chen Hsu , Keith Kwong Hon Wong
IPC分类号： H01L2348
CPC分类号： H01L28/20 , H01L27/0688
摘要： An electronic structure that has in-situ formed unit resistors and a method for fabricating such structure are disclosed. The electronic structure that has in-situ formed unit resistors consists of a first plurality of conductive elements formed in an insulating material layer, a plurality of electrically resistive vias formed on top and in electrical communication with at least one of the first plurality of conductive elements, and a second plurality of conductive elements formed on top of and in electrical communication with at least one of the plurality of electrically resistive vias. The present invention novel structure may further be formed in a multi-level configuration such that multi-level resistors may be connected in-series to provide larger resistance values. The present invention novel structure may further be combined with a capacitor network to form desirable RC circuits.
摘要翻译：公开了一种具有原位形成的单位电阻器的电子结构及其制造方法。具有原位形成的单元电阻器的电子结构由形成在绝缘材料层中的第一多个导电元件组成，多个电阻通孔形成在顶部并与第一多个导电元件中的至少一个电连通以及形成在所述多个电阻通孔中的至少一个上方并与之电气连通的第二多个导电元件。本发明的新颖结构可以进一步形成为多电平配置，使得多电平电阻器可以串联连接以提供更大的电阻值。本发明的新颖结构还可以与电容器网络组合以形成期望的RC电路。

4. 发明授权

US06828232B2 Semiconductor structure having in-situ formed unit resistors and method for fabrication 失效
公开(公告)号：US06828232B2
公开(公告)日：2004-12-07
申请号：US10705116
申请日：2003-11-10
申请人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Lu-Chen Hsu , Keith Kwong Hon Wong
发明人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Lu-Chen Hsu , Keith Kwong Hon Wong
IPC分类号： H01L214763
CPC分类号： H01L28/20 , H01L27/0688
摘要： An electronic structure that has in-situ formed unit resistors and a method for fabricating such structure are disclosed. The electronic structure that has in-situ formed unit resistors consists of a first plurality of conductive elements formed in an insulating material layer, a plurality of electrically resistive vias formed on top and in electrical communication with at least one of the first plurality of conductive elements, and a second plurality of conductive elements formed on top of and in electrical communication with at least one of the plurality of electrically resistive vias. The present invention novel structure may further be formed in a multi-level configuration such that multi-level resistors may be connected in-series to provide larger resistance values. The present invention novel structure may further be combined with a capacitor network to form desirable RC circuits.

5. 发明授权

US06794226B2 Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication 有权
$Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication$
标题翻译：掺入由难熔金属硅 - 氮形成的元件的半导体器件及其制造方法
公开(公告)号：US06794226B2
公开(公告)日：2004-09-21
申请号：US10374395
申请日：2003-02-26
申请人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Lu-Chen Hsu , Keith Kwong Hon Wong
发明人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Lu-Chen Hsu , Keith Kwong Hon Wong
IPC分类号： H01L2182
CPC分类号： H01L21/76849 , H01L21/7687 , H01L21/76888 , H01L23/5258 , H01L27/0629 , H01L28/24 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure that includes at least one circuit element of a fuse, a diffusion barrier or a capacitor that is formed by refractory metal-silicon-nitrogen is disclosed. A method for fabricating such semiconductor structure that includes a fuse element, a diffusion barrier, a resistor or a capacitor by a refractory metal-silicon-nitrogen material is further disclosed. A suitable refractory metal-silicon-nitrogen material to be used is TaSiN which provides a wide range of resistivity by changing the ratio of Ta:Si:N. The invention provides the benefit that the various components of diffusion barriers, fuses, capacitors and resistors may be formed by a single deposition process of a TaSiN layer, the various components are then selectively masked and treated by either heat-treating or ion-implantation to vary their resistivity selectively while keeping the other shielded elements at the same resistivity.
摘要翻译：公开了一种半导体结构，其包括由难熔金属 - 硅 - 氮形成的熔丝，扩散阻挡层或电容器的至少一个电路元件。还公开了一种通过难熔金属硅 - 氮材料制造这种半导体结构的方法，其包括熔丝元件，扩散阻挡层，电阻器或电容器。要使用的合适的难熔金属 - 硅 - 氮材料是TaSiN，其通过改变Ta:Si:N的比例来提供宽范围的电阻率。本发明提供了通过TaSiN层的单个沉积工艺可以形成扩散阻挡层，保险丝，电容器和电阻器的各种组件的优点，然后通过热处理或离子注入对各种组分进行选择性掩蔽和处理，选择性地改变其电阻率，同时保持其他屏蔽元件具有相同的电阻率。

6. 发明授权

US06831369B2 Semiconductor structure having in-situ formed unit resistors and method for fabrication 有权
标题翻译：具有原位形成单元电阻器的半导体结构和制造方法
公开(公告)号：US06831369B2
公开(公告)日：2004-12-14
申请号：US10705115
申请日：2003-11-10
申请人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Lu-Chen Hsu , Keith Kwong Hon Wong
发明人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Lu-Chen Hsu , Keith Kwong Hon Wong
IPC分类号： H01L2348
CPC分类号： H01L28/20 , H01L27/0688
摘要： An electronic structure that has in-situ formed unit resistors and a method for fabricating such structure are disclosed. The electronic structure that has in-situ formed unit resistors consists of a first plurality of conductive elements formed in an insulating material layer, a plurality of electrically resistive vias formed on top and in electrical communication with at least one of the first plurality of conductive elements, and a second plurality of conductive elements formed on top of and in electrical communication with at least one of the plurality of electrically resistive vias. The present invention novel structure may further be formed in a multi-level configuration such that multi-level resistors may be connected in-series to provide larger resistance values. The present invention novel structure may further be combined with a capacitor network to form desirable RC circuits.
摘要翻译：公开了一种具有原位形成的单位电阻器的电子结构及其制造方法。具有原位形成的单元电阻器的电子结构由形成在绝缘材料层中的第一多个导电元件组成，多个电阻通孔形成在顶部并与第一多个导电元件中的至少一个电连通以及形成在所述多个电阻通孔中的至少一个上方并与之电气连通的第二多个导电元件。本发明的新颖结构可以进一步形成为多电平配置，使得多电平电阻器可以串联连接以提供更大的电阻值。本发明的新颖结构还可以与电容器网络组合以形成期望的RC电路。

7. 发明授权

US06545339B2 Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication 失效
$Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication$
公开(公告)号：US06545339B2
公开(公告)日：2003-04-08
申请号：US09760245
申请日：2001-01-12
申请人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Lu-Chen Hsu , Keith Kwong Hon Wong
发明人： Cyril Cabral, Jr. , Lawrence Clevenger , Louis Lu-Chen Hsu , Keith Kwong Hon Wong
IPC分类号： H01L27108
CPC分类号： H01L21/76849 , H01L21/7687 , H01L21/76888 , H01L23/5258 , H01L27/0629 , H01L28/24 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure that includes at least one circuit element of a fuse, a diffusion barrier or a capacitor that is formed by refractory metal-silicon-nitrogen is disclosed. A method for fabricating such semiconductor structure that includes a fuse element, a diffusion barrier, a resistor or a capacitor by a refractory metal-silicon-nitrogen material is further disclosed. A suitable refractory metal-silicon-nitrogen material to be used is TaSiN which provides a wide range of resistivity by changing the ratio of Ta:Si:N. The invention provides the benefit that the various components of diffusion barriers, fuses, capacitors and resistors may be formed by a single deposition process of a TaSiN layer, the various components are then selectively masked and treated by either heat-treating or ion-implantation to vary their resistivity selectively while keeping the other shielded elements at the same resistivity.

8. 发明申请

US20090111235A1 Semiconductor Integrated Circuit Devices Having High-Q Wafer Back-Side Capacitors 有权
标题翻译：具有高Q晶片背面电容器的半导体集成电路器件
公开(公告)号：US20090111235A1
公开(公告)日：2009-04-30
申请号：US12348707
申请日：2009-01-05
申请人： Lawrence Clevenger , Timothy Joseph Dalton , Louis Hsu , Carl Radens , Vidhya Ramachandran , Keith Kwong Hon Wong , Chih-Chao Yang
发明人： Lawrence Clevenger , Timothy Joseph Dalton , Louis Hsu , Carl Radens , Vidhya Ramachandran , Keith Kwong Hon Wong , Chih-Chao Yang
IPC分类号： H01L21/02
CPC分类号： H01L21/84 , H01L21/76898 , H01L23/481 , H01L23/5223 , H01L27/1203 , H01L2924/0002 , Y10S438/957 , H01L2924/00
摘要： Methods are provided for fabricating semiconductor IC (integrated circuit) chips having high-Q on-chip capacitors formed on the chip back-side and connected to integrated circuits on the chip front-side using through-wafer interconnects. In one aspect, a semiconductor device includes a semiconductor substrate having a front side, a back side, and a buried insulating layer interposed between the front and back sides of the substrate. An integrated circuit is formed on the front side of the semiconductor substrate, an integrated capacitor is formed on the back side of the semiconductor substrate, and an interconnection structure is formed through the buried insulating layer to connect the integrated capacitor to the integrated circuit.
摘要翻译：提供了用于制造半导体IC（集成电路）芯片的半导体IC（集成电路）芯片，其具有形成在芯片背面的高Q片上电容器，并使用晶片间互连连接到芯片正面的集成电路。在一个方面，半导体器件包括一个半导体衬底，该半导体衬底具有介于衬底的正面和背面之间的正面，背面和掩埋绝缘层。在半导体基板的正面形成有集成电路，在半导体基板的背面形成有集成电容器，通过埋入绝缘层形成互连结构，将集成电容器与集成电路连接起来。

9. 发明申请

US20070278619A1 Semiconductor integrated circuit devices having high-Q wafer back-side capacitors 有权
标题翻译：具有高Q晶片背面电容器的半导体集成电路器件
公开(公告)号：US20070278619A1
公开(公告)日：2007-12-06
申请号：US11443394
申请日：2006-05-30
申请人： Lawrence Clevenger , Timothy Joseph Dalton , Louis Hsu , Carl Radens , Vidhya Ramachandran , Keith Kwong Hon Wong , Chih-Chao Yang
发明人： Lawrence Clevenger , Timothy Joseph Dalton , Louis Hsu , Carl Radens , Vidhya Ramachandran , Keith Kwong Hon Wong , Chih-Chao Yang
IPC分类号： H01L29/00
CPC分类号： H01L21/84 , H01L21/76898 , H01L23/481 , H01L23/5223 , H01L27/1203 , H01L2924/0002 , Y10S438/957 , H01L2924/00
摘要： Methods are provided for fabricating semiconductor IC (integrated circuit) chips having high-Q on-chip capacitors formed on the chip back-side and connected to integrated circuits on the chip front-side using through-wafer interconnects. In one aspect, a semiconductor device includes a semiconductor substrate having a front side, a back side, and a buried insulating layer interposed between the front and back sides of the substrate. An integrated circuit is formed on the front side of the semiconductor substrate, an integrated capacitor is formed on the back side of the semiconductor substrate, and an interconnection structure is formed through the buried insulating layer to connect the integrated capacitor to the integrated circuit.
摘要翻译：提供了用于制造半导体IC（集成电路）芯片的半导体IC（集成电路）芯片，其具有形成在芯片背面的高Q片上电容器，并使用晶片间互连连接到芯片正面的集成电路。在一个方面，半导体器件包括一个半导体衬底，该半导体衬底具有介于衬底的正面和背面之间的正面，背面和掩埋绝缘层。在半导体基板的正面形成有集成电路，在半导体基板的背面形成有集成电容器，通过埋入绝缘层形成互连结构，将集成电容器与集成电路连接起来。

10. 发明授权

US07473979B2 Semiconductor integrated circuit devices having high-Q wafer back-side capacitors 有权
标题翻译：具有高Q晶片背面电容器的半导体集成电路器件
公开(公告)号：US07473979B2
公开(公告)日：2009-01-06
申请号：US11443394
申请日：2006-05-30
申请人： Lawrence Clevenger , Timothy Joseph Dalton , Louis Hsu , Carl Radens , Vidhya Ramachandran , Keith Kwong Hon Wong , Chih-Chao Yang
发明人： Lawrence Clevenger , Timothy Joseph Dalton , Louis Hsu , Carl Radens , Vidhya Ramachandran , Keith Kwong Hon Wong , Chih-Chao Yang
IPC分类号： H01L29/92
CPC分类号： H01L21/84 , H01L21/76898 , H01L23/481 , H01L23/5223 , H01L27/1203 , H01L2924/0002 , Y10S438/957 , H01L2924/00
摘要： Methods are provided for fabricating semiconductor IC (integrated circuit) chips having high-Q on-chip capacitors formed on the chip back-side and connected to integrated circuits on the chip front-side using through-wafer interconnects. In one aspect, a semiconductor device includes a semiconductor substrate having a front side, a back side, and a buried insulating layer interposed between the front and back sides of the substrate. An integrated circuit is formed on the front side of the semiconductor substrate, an integrated capacitor is formed on the back side of the semiconductor substrate, and an interconnection structure is formed through the buried insulating layer to connect the integrated capacitor to the integrated circuit.
摘要翻译：提供了用于制造半导体IC（集成电路）芯片的半导体IC（集成电路）芯片，其具有形成在芯片背面的高Q片上电容器，并使用晶片间互连连接到芯片正面的集成电路。在一个方面，半导体器件包括一个半导体衬底，该半导体衬底具有介于衬底的正面和背面之间的正面，背面和掩埋绝缘层。在半导体基板的正面形成有集成电路，在半导体基板的背面形成有集成电容器，通过埋入绝缘层形成互连结构，将集成电容器与集成电路连接起来。

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