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1. 发明授权

US06538284B1 SOI device with body recombination region, and method 失效
标题翻译：具有身体重组区的SOI器件及方法
公开(公告)号：US06538284B1
公开(公告)日：2003-03-25
申请号：US09776197
申请日：2001-02-02
申请人： Concetta E. Riccobene , Dong-Hyuk Ju
发明人： Concetta E. Riccobene , Dong-Hyuk Ju
IPC分类号： H01L2701
CPC分类号： H01L29/78612
摘要： A transistor on an SOI wafer has a subsurface recombination area within its body. The recombination area includes one or more doped subsurface islands, the doped islands having the same conductivity type as that of a source and a drain on opposite sides of the body, and having an opposite conductivity type from the remainder of the body. The doped subsurface island(s) may be formed by a doping implant into a surface semiconductor layer, for example through an open portion of a doping mask, the opening portion created for example by removal of a dummy gate. The doping of the islands may be performed so that the doping level of the island(s) is approximately the same as that of the body, thus enabling both Shockley-Read-Hall (SRH) and Auger recombination to take place.
摘要翻译： SOI晶片上的晶体管在其体内具有次表面复合区域。复合区域包括一个或多个掺杂的表面下岛，所述掺杂岛具有与所述主体的相对侧上的源极和漏极相同的导电类型，并且具有与所述主体的其余部分相反的导电类型。掺杂的地下岛可以通过掺杂注入形成在表面半导体层中，例如通过掺杂掩模的开口部分形成，例如通过去除伪栅极而形成的开口部分。可以进行岛的掺杂，使得岛的掺杂水平与身体的掺杂水平大致相同，从而能够进行Shockley-Read-Hall（SRH）和俄歇重组。

2. 发明授权

US06717212B2 Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure 有权
标题翻译：绝缘体上绝缘体（SOI）结构中的漏电导热绝缘体材料（LTCIM）
公开(公告)号：US06717212B2
公开(公告)日：2004-04-06
申请号：US09879724
申请日：2001-06-12
申请人： Dong-Hyuk Ju , William George En , Srinath Krishnan , Concetta E. Riccobene , Zoran Krivokapic , Judy Xilin An , Bin Yu
发明人： Dong-Hyuk Ju , William George En , Srinath Krishnan , Concetta E. Riccobene , Zoran Krivokapic , Judy Xilin An , Bin Yu
IPC分类号： H01L31392
CPC分类号： H01L21/76254 , H01L21/187 , H01L29/78603 , H01L29/78606 , H01L29/78609 , H01L29/78612
摘要： A device and method for making a semiconductor-on-insulator (SOI) structure having a leaky, thermally conductive material (LTCIM) layer disposed between a semiconductor substrate and a semiconductor layer.
摘要翻译：一种用于制造绝缘体半导体（SOI）结构的装置和方法，其具有设置在半导体衬底和半导体层之间的具有泄漏的导热材料（LTCIM）层。

3. 发明授权

US06515333B1 Removal of heat from SOI device 有权
标题翻译：从SOI器件去除热量
公开(公告)号：US06515333B1
公开(公告)日：2003-02-04
申请号：US09843958
申请日：2001-04-27
申请人： Concetta E. Riccobene
发明人： Concetta E. Riccobene
IPC分类号： H01L2701
CPC分类号： H01L29/78696 , H01L29/66772 , H01L29/7841 , H01L29/78603 , H01L29/78606
摘要： According to the invention, a silicon-on-insulator (SOI) device and a method of constructing the device is disclosed. The SOI device has a substrate with a BOX layer disposed on the upper surface of the substrate. The BOX has an upper surface and a cavity extending from the upper surface partially therein. An active layer is disposed on the upper surface of BOX layer and extends into the cavity.
摘要翻译：根据本发明，公开了一种绝缘体上硅（SOI）器件及其构造方法。 SOI器件具有布置在衬底的上表面上的BOX层的衬底。 BOX具有一个上表面和一个从上表面部分延伸的腔体。有源层设置在BOX层的上表面上并延伸到空腔中。

4. 发明授权

US06479868B1 Silicon-on-insulator transistors with asymmetric source/drain junctions formed by angled germanium implantation 失效
标题翻译：具有不对称源极/漏极结的绝缘体上硅晶体管，通过角度锗注入形成
公开(公告)号：US06479868B1
公开(公告)日：2002-11-12
申请号：US09845659
申请日：2001-04-30
申请人： Xilin Judy An , Bin Yu , Concetta E. Riccobene
发明人： Xilin Judy An , Bin Yu , Concetta E. Riccobene
IPC分类号： H01L2701
CPC分类号： H01L29/66772 , H01L29/78612 , H01L29/78624 , H01L29/78684
摘要： A silicon-on-insulator (SOI) transistor. The SOI transistor includes a germanium implanted source and drain having a body disposed therebetween, and a gate disposed on the body, the germanium being implanted at an angle such that the source has a concentration of germanium at a source/body junction and the gate shields germanium implantation in the drain adjacent a drain/body junction resulting in a graduated drain/body junction. Also disclosed is a method of fabricating the SOI transistor.
摘要翻译：绝缘体上硅（SOI）晶体管。 SOI晶体管包括锗注入源和漏极，其中设置有一个主体，以及设置在主体上的栅极，以一定角度注入锗，使得源在源极/主体结处具有锗的浓度，栅极屏蔽在排水管/主体连接处的漏极中进行锗注入，导致刻度的漏极/体结。还公开了制造SOI晶体管的方法。

5. 发明授权

US06765227B1 Semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer and method of fabrication using wafer bonding 有权
标题翻译：具有Si / SiGe / Si有源层的绝缘体上半导体（SOI）晶片和使用晶片接合的制造方法
公开(公告)号：US06765227B1
公开(公告)日：2004-07-20
申请号：US10116791
申请日：2002-04-04
申请人： Bin Yu , William G. En , Judy Xilin An , Concetta E. Riccobene
发明人： Bin Yu , William G. En , Judy Xilin An , Concetta E. Riccobene
IPC分类号： H01L2906
CPC分类号： H01L29/66742 , H01L21/76256 , H01L29/1054 , H01L29/78687 , Y10S438/977
摘要： A semiconductor-on-insulator (SOI) wafer. The wafer includes a silicon substrate, a buried oxide (BOX) layer disposed on the substrate, and an active layer disposed on the box layer. The active layer has an upper silicon layer disposed on a silicon-germanium layer. The silicon-germanium layer is disposed on a lower silicon layer. The silicon-germanium of the silicon-germanium layer is strained silicon-germanium and is about 200 Å to about 400 Å thick.
摘要翻译：绝缘体上半导体（SOI）晶片。晶片包括硅衬底，设置在衬底上的掩埋氧化物（BOX）层和设置在盒层上的有源层。有源层具有设置在硅 - 锗层上的上硅层。硅 - 锗层设置在下硅层上。硅 - 锗层的硅 - 锗是应变的硅 - 锗，并且是大约至大约400埃。

6. 发明授权

US06525378B1 Raised S/D region for optimal silicidation to control floating body effects in SOI devices 失效
标题翻译：提高S / D区域以实现SOI器件中的浮体效应
公开(公告)号：US06525378B1
公开(公告)日：2003-02-25
申请号：US09880550
申请日：2001-06-13
申请人： Concetta E. Riccobene
发明人： Concetta E. Riccobene
IPC分类号： H01L2701
CPC分类号： H01L29/66772 , H01L29/458 , H01L29/665 , H01L29/66628 , H01L29/78612 , H01L29/78618 , H01L29/78621
摘要： A semiconductor device and a method of forming same are disclosed. The device includes an SOI wafer including a semiconductor layer, a substrate and a buried insulator layer therebetween. The semiconductor layer includes a source region, a drain region, and a body region disposed between the source and drain regions. At least one of the source and drain regions includes an epitaxially raised region. A gate is on the semiconductor layer, the gate being operatively arranged with the source, drain, and body regions to form a transistor. The at least one of the source and drain regions including the epitaxially raised region includes a silicide region spaced apart from the body region by about 200 to about 1000 Angstroms.
摘要翻译：公开了一种半导体器件及其形成方法。该器件包括SOI晶片，其包括半导体层，衬底和它们之间的掩埋绝缘体层。半导体层包括源极区，漏极区和设置在源极和漏极区之间的体区。源区和漏区中的至少一个包括外延区域。栅极在半导体层上，栅极可操作地与源极，漏极和体区配置以形成晶体管。包括外延隆起区域的源区和漏区中的至少一个包括与身体区隔开大约200至大约1000埃的硅化物区。

7. 发明授权

US06410371B1 Method of fabrication of semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer 有权
标题翻译：具有Si / SiGe / Si活性层的绝缘体上半导体（SOI）晶片的制造方法
公开(公告)号：US06410371B1
公开(公告)日：2002-06-25
申请号：US09794884
申请日：2001-02-26
申请人： Bin Yu , William G. En , Judy Xilin An , Concetta E. Riccobene
发明人： Bin Yu , William G. En , Judy Xilin An , Concetta E. Riccobene
IPC分类号： H01L2184
CPC分类号： H01L29/66742 , H01L21/76256 , H01L29/1054 , H01L29/78687 , Y10S438/977
摘要： A method of forming a semiconductor-on-insulator (SOI) wafer. The method includes the steps of providing a first wafer, the first wafer having a silicon substrate and an oxide layer disposed thereon; providing a second wafer, the second wafer having a silicon substrate, the substrate of the second wafer having a silicon-germanium layer disposed thereon, a silicon layer disposed on the silicon-germanium layer and an oxide layer disposed on the silicon layer; wafer bonding the first and second wafers; and removing an undesired portion of the substrate from the second wafer to form an upper silicon layer. The resulting SOI wafer structure is also disclosed.
摘要翻译：一种形成绝缘体上半导体（SOI）晶片的方法。该方法包括提供第一晶片，第一晶片具有硅衬底和设置在其上的氧化物层的步骤; 提供第二晶片，所述第二晶片具有硅衬底，所述第二晶片的衬底具有设置在其上的硅 - 锗层，设置在所述硅 - 锗层上的硅层和设置在所述硅层上的氧化物层; 晶片接合第一和第二晶片; 以及从所述第二晶片去除所述衬底的不希望的部分以形成上硅层。还公开了所得到的SOI晶片结构。

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