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1. 发明授权

US08203894B2 Current cancellation for non-volatile memory 有权
标题翻译：当前取消非易失性存储器
公开(公告)号：US08203894B2
公开(公告)日：2012-06-19
申请号：US13081170
申请日：2011-04-06
申请人： Chulmin Jung , Insik Jin , YoungPil Kim , Yong Lu , Harry Hongyue Liu , Andrew John Carter
发明人： Chulmin Jung , Insik Jin , YoungPil Kim , Yong Lu , Harry Hongyue Liu , Andrew John Carter
IPC分类号： G11C7/22
CPC分类号： G11C11/1673
摘要： A method and apparatus for reading data from a non-volatile memory cell. In some embodiments, a cross-point array of non-volatile memory cells is arranged into rows and columns that are each controlled by a line driver. A read circuit is provided that is capable of reading a logical state of a predetermined memory cell by differentiating a non-integrated first reference value from a non-integrated second reference value. Further, each reference value is measured immediately after configuring the column corresponding to the predetermined memory cell to produce a first and second amount of current.
摘要翻译：一种用于从非易失性存储单元读取数据的方法和装置。在一些实施例中，非易失性存储器单元的交叉点阵列被布置成行和列，每个行和列都由线驱动器控制。提供读取电路，其能够通过将非积分的第一参考值与非积分的第二参考值进行微分来读取预定存储器单元的逻辑状态。此外，在配置与预定存储单元相对应的列之后立即测量每个参考值以产生第一和第二电流量。

2. 发明申请

US20110182106A1 Current Cancellation for Non-Volatile Memory 有权
标题翻译：非易失性存储器的当前取消
公开(公告)号：US20110182106A1
公开(公告)日：2011-07-28
申请号：US13081170
申请日：2011-04-06
申请人： Chulmin Jung , Insik Jin , YoungPil Kim , Yong Lu , Harry Hongyue Liu , Andrew John Carter
发明人： Chulmin Jung , Insik Jin , YoungPil Kim , Yong Lu , Harry Hongyue Liu , Andrew John Carter
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C11/1673
摘要： A method and apparatus for reading data from a non-volatile memory cell. In some embodiments, a cross-point array of non-volatile memory cells is arranged into rows and columns that are each controlled by a line driver. A read circuit is provided that is capable of reading a logical state of a predetermined memory cell by differentiating a non-integrated first reference value from a non-integrated second reference value. Further, each reference value is measured immediately after configuring the column corresponding to the predetermined memory cell to produce a first and second amount of current.
摘要翻译：一种用于从非易失性存储单元读取数据的方法和装置。在一些实施例中，非易失性存储器单元的交叉点阵列被布置成行和列，每个行和列都由线驱动器控制。提供读取电路，其能够通过将非积分的第一参考值与非积分的第二参考值进行微分来读取预定存储器单元的逻辑状态。此外，在配置与预定存储单元相对应的列之后立即测量每个参考值以产生第一和第二电流量。

3. 发明授权

US07965565B2 Current cancellation for non-volatile memory 有权
标题翻译：当前取消非易失性存储器
公开(公告)号：US07965565B2
公开(公告)日：2011-06-21
申请号：US12502208
申请日：2009-07-13
申请人： Chulmin Jung , Insik Jin , YoungPil Kim , Yong Lu , Harry Hongyue Liu , Andrew John Carter
发明人： Chulmin Jung , Insik Jin , YoungPil Kim , Yong Lu , Harry Hongyue Liu , Andrew John Carter
IPC分类号： G11C7/00
CPC分类号： G11C11/1673
摘要： A method and apparatus for reading data from a non-volatile memory cell. In some embodiments, a cross-point array of non-volatile memory cells is arranged into rows and columns that are each controlled by a line driver. A read circuit is provided that is capable of reading a logical state of a predetermined memory cell by differentiating a non-integrated first reference value from a non-integrated second reference value. Further, each reference value is measured immediately after configuring the column corresponding to the predetermined memory cell to produce a first and second amount of current.
摘要翻译：一种用于从非易失性存储单元读取数据的方法和装置。在一些实施例中，非易失性存储器单元的交叉点阵列被布置成行和列，每个行和列都由线驱动器控制。提供读取电路，其能够通过将非积分的第一参考值与非积分的第二参考值进行微分来读取预定存储器单元的逻辑状态。此外，在配置与预定存储单元相对应的列之后立即测量每个参考值以产生第一和第二电流量。

4. 发明申请

US20110007581A1 Current Cancellation for Non-Volatile Memory 有权
公开(公告)号：US20110007581A1
公开(公告)日：2011-01-13
申请号：US12502208
申请日：2009-07-13
申请人： Chulmin Jung , Insik Jin , YoungPil Kim , Yong Lu , Harry Hongyue Liu , Andrew John Carter
发明人： Chulmin Jung , Insik Jin , YoungPil Kim , Yong Lu , Harry Hongyue Liu , Andrew John Carter
IPC分类号： G11C7/00 , G11C7/14 , G11C11/00
CPC分类号： G11C11/1673
摘要： A method and apparatus for reading data from a non-volatile memory cell. In some embodiments, a cross-point array of non-volatile memory cells is arranged into rows and columns that are each controlled by a line driver. A read circuit is provided that is capable of reading a logical state of a predetermined memory cell by differentiating a non-integrated first reference value from a non-integrated second reference value. Further, each reference value is measured immediately after configuring the column corresponding to the predetermined memory cell to produce a first and second amount of current.

5. 发明授权

US08363450B2 Hierarchical cross-point array of non-volatile memory 有权
标题翻译：非易失性存储器的分层交叉点阵列
公开(公告)号：US08363450B2
公开(公告)日：2013-01-29
申请号：US13280109
申请日：2011-10-24
申请人： Chulmin Jung , Yong Lu , Insik Jin , YoungPil Kim , Harry Hongyue Liu
发明人： Chulmin Jung , Yong Lu , Insik Jin , YoungPil Kim , Harry Hongyue Liu
IPC分类号： G11C11/00
CPC分类号： A01H6/14 , A01H5/02
摘要： A method and apparatus for reading data from a non-volatile memory cell. In some embodiments, a cross-point array of non-volatile memory cells is arranged into rows and columns. A selection circuit is provided that is capable of activating the first block of memory cells while deactivating the second block of memory cells. Further, a read circuit is provided that is capable of reading a logical state of a predetermined memory cell in the first block of memory cells with a reduced leak current by programming a first resistive state to the block selection elements corresponding to the first block of memory cells while programming a second resistive state to the block selection elements corresponding to the second block of memory cells.
摘要翻译：一种用于从非易失性存储单元读取数据的方法和装置。在一些实施例中，非易失性存储器单元的交叉点阵列被布置成行和列。提供了选择电路，其能够在禁用第二存储单元块的同时激活存储器单元的第一块。此外，提供一种读取电路，其能够通过对与第一存储器块相对应的块选择元件编程第一电阻状态，以减小的漏电流来读取存储器单元的第一块中的预定存储器单元的逻辑状态同时将第二电阻状态编程到对应于存储器单元的第二块的块选择元件。

6. 发明授权

US08098507B2 Hierarchical cross-point array of non-volatile memory 有权
标题翻译：非易失性存储器的分层交叉点阵列
公开(公告)号：US08098507B2
公开(公告)日：2012-01-17
申请号：US12502199
申请日：2009-07-13
申请人： Chulmin Jung , Yong Lu , Insik Jin , YoungPil Kim , Harry Hongyue Liu
发明人： Chulmin Jung , Yong Lu , Insik Jin , YoungPil Kim , Harry Hongyue Liu
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C2213/76 , G11C2213/77 , G11C2213/78 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1246 , H01L45/1266 , H01L45/147
摘要： A method and apparatus for reading data from a non-volatile memory cell. In some embodiments, a cross-point array of non-volatile memory cells is arranged into rows and columns. A selection circuit is provided that is capable of activating the first block of memory cells while deactivating the second block of memory cells. Further, a read circuit is provided that is capable of reading a logical state of a predetermined memory cell in the first block of memory cells with a reduced leak current by programming a first resistive state to the block selection elements corresponding to the first block of memory cells while programming a second resistive state to the block selection elements corresponding to the second block of memory cells.
摘要翻译：一种用于从非易失性存储单元读取数据的方法和装置。在一些实施例中，非易失性存储器单元的交叉点阵列被布置成行和列。提供了选择电路，其能够在禁用第二存储单元块的同时激活存储器单元的第一块。此外，提供一种读取电路，其能够通过对与第一存储器块相对应的块选择元件编程第一电阻状态，以减小的漏电流来读取存储器单元的第一块中的预定存储器单元的逻辑状态同时将第二电阻状态编程到对应于存储器单元的第二块的块选择元件。

7. 发明申请

US20110007548A1 Hierarchical Cross-Point Array of Non-Volatile Memory 有权
标题翻译：非易失性存储器的分层交叉点阵列
公开(公告)号：US20110007548A1
公开(公告)日：2011-01-13
申请号：US12502199
申请日：2009-07-13
申请人： Chulmin Jung , Yong Lu , Insik Jin , YoungPil Kim , Harry Hongyue Liu
发明人： Chulmin Jung , Yong Lu , Insik Jin , YoungPil Kim , Harry Hongyue Liu
IPC分类号： G11C11/00 , G11C7/00 , G11C8/00
CPC分类号： G11C13/003 , G11C2213/76 , G11C2213/77 , G11C2213/78 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1246 , H01L45/1266 , H01L45/147
摘要： A method and apparatus for reading data from a non-volatile memory cell. In some embodiments, a cross-point array of non-volatile memory cells is arranged into rows and columns. A selection circuit is provided that is capable of activating the first block of memory cells while deactivating the second block of memory cells. Further, a read circuit is provided that is capable of reading a logical state of a predetermined memory cell in the first block of memory cells with a reduced leak current by programming a first resistive state to the block selection elements corresponding to the first block of memory cells while programming a second resistive state to the block selection elements corresponding to the second block of memory cells.
摘要翻译：一种用于从非易失性存储单元读取数据的方法和装置。在一些实施例中，非易失性存储器单元的交叉点阵列被布置成行和列。提供了选择电路，其能够在禁用第二存储单元块的同时激活存储器单元的第一块。此外，提供一种读取电路，其能够通过对与第一存储器块相对应的块选择元件编程第一电阻状态，以减小的漏电流来读取存储器单元的第一块中的预定存储器单元的逻辑状态同时将第二电阻状态编程到对应于存储器单元的第二块的块选择元件。

8. 发明申请

US20120039112A1 Hierarchical Cross-Point Array of Non-Volatile Memory 有权
标题翻译：非易失性存储器的分层交叉点阵列
公开(公告)号：US20120039112A1
公开(公告)日：2012-02-16
申请号：US13280109
申请日：2011-10-24
申请人： Chulmin Jung , Yong Lu , Insik Jin , YoungPil Kim , Harry Hongyue Liu
发明人： Chulmin Jung , Yong Lu , Insik Jin , YoungPil Kim , Harry Hongyue Liu
IPC分类号： G11C11/00
CPC分类号： A01H6/14 , A01H5/02
摘要： A method and apparatus for reading data from a non-volatile memory cell. In some embodiments, a cross-point array of non-volatile memory cells is arranged into rows and columns. A selection circuit is provided that is capable of activating the first block of memory cells while deactivating the second block of memory cells. Further, a read circuit is provided that is capable of reading a logical state of a predetermined memory cell in the first block of memory cells with a reduced leak current by programming a first resistive state to the block selection elements corresponding to the first block of memory cells while programming a second resistive state to the block selection elements corresponding to the second block of memory cells.
摘要翻译：一种用于从非易失性存储单元读取数据的方法和装置。在一些实施例中，非易失性存储器单元的交叉点阵列被布置成行和列。提供了选择电路，其能够在禁用第二存储单元块的同时激活存储器单元的第一块。此外，提供一种读取电路，其能够通过对与第一存储器块相对应的块选择元件编程第一电阻状态，以减小的漏电流来读取存储器单元的第一块中的预定存储器单元的逻辑状态同时将第二电阻状态编程到对应于存储器单元的第二块的块选择元件。

9. 发明授权

US08248836B2 Non-volatile memory cell stack with dual resistive elements 有权
标题翻译：具有双电阻元件的非易失性存储单元堆叠
公开(公告)号：US08248836B2
公开(公告)日：2012-08-21
申请号：US12501751
申请日：2009-07-13
申请人： Insik Jin , YoungPil Kim , Ming Sun , Chulmin Jung , Venugopalan Vaithyanathan , Nurul Amin , Wei Tian , Yong Lu
发明人： Insik Jin , YoungPil Kim , Ming Sun , Chulmin Jung , Venugopalan Vaithyanathan , Nurul Amin , Wei Tian , Yong Lu
IPC分类号： G11C11/00 , G11C11/14 , G11C7/00
CPC分类号： G11C11/16 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C13/0011 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/0073 , G11C2213/76
摘要： A non-volatile memory cell and method of use thereof. In some embodiments, an individually programmable resistive sense memory (RSM) element is connected in series with a programmable metallization cell (PMC) switching element. In operation, while the switching element is programmed to a first resistive state, no current passes through the RSM element and while a second resistive state is programmed to the RSM element, current passes through the RSM element.
摘要翻译：一种非易失性存储单元及其使用方法。在一些实施例中，独立可编程电阻感测存储器（RSM）元件与可编程金属化单元（PMC）开关元件串联连接。在操作中，当开关元件被编程为第一电阻状态时，没有电流通过RSM元件，并且当第二电阻状态被编程到RSM元件时，电流通过RSM元件。

10. 发明申请

US20110007545A1 Non-Volatile Memory Cell Stack with Dual Resistive Elements 有权
标题翻译：具有双电阻元件的非易失性存储单元堆栈
公开(公告)号：US20110007545A1
公开(公告)日：2011-01-13
申请号：US12501751
申请日：2009-07-13
申请人： Insik Jin , YoungPil Kim , Ming Sun , Chulmin Jung , Venugopalan Vaithyanathan , Nurul Amin , Wei Tian , Yong Lu
发明人： Insik Jin , YoungPil Kim , Ming Sun , Chulmin Jung , Venugopalan Vaithyanathan , Nurul Amin , Wei Tian , Yong Lu
IPC分类号： G11C11/00 , G11C11/14 , G11C7/00
CPC分类号： G11C11/16 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C13/0011 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/0073 , G11C2213/76
摘要： A non-volatile memory cell and method of use thereof. In some embodiments, an individually programmable resistive sense memory (RSM) element is connected in series with a programmable metallization cell (PMC) switching element. In operation, while the switching element is programmed to a first resistive state, no current passes through the RSM element and while a second resistive state is programmed to the RSM element, current passes through the RSM element.
摘要翻译：一种非易失性存储单元及其使用方法。在一些实施例中，独立可编程电阻感测存储器（RSM）元件与可编程金属化单元（PMC）开关元件串联连接。在操作中，当开关元件被编程为第一电阻状态时，没有电流通过RSM元件，并且当第二电阻状态被编程到RSM元件时，电流通过RSM元件。

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