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1. 发明申请

US20130040695A1 SYSTEM AND METHOD FOR PRESERVING INPUT IMPEDANCE OF A CURRENT-MODE CIRCUIT 有权
标题翻译：用于保护电流模式电路输入阻抗的系统和方法
公开(公告)号：US20130040695A1
公开(公告)日：2013-02-14
申请号：US13207672
申请日：2011-08-11
申请人： Chuanzhao Yu , Omid Oliaei , David Newman , Michael L. Gomez
发明人： Chuanzhao Yu , Omid Oliaei , David Newman , Michael L. Gomez
IPC分类号： H04W88/02
CPC分类号： H03F3/193
摘要： In accordance with some embodiments of the present disclosure, a circuit comprises an input node configured to receive a current-mode input signal and an input stage that includes an input device communicatively coupled to the input node. The input device is configured to receive the input signal at the input node. The circuit additionally comprises bias circuitry communicatively coupled to the input stage and configured to provide a bias current for the input device. The bias circuitry is also configured to remove at least a portion of the bias current from the input signal through a feedback loop associated with the input node such that the input signal is received by the input device with at least a portion of the bias current removed. The circuit further comprises an output stage communicatively coupled to the input stage and configured to output a current-mode output signal based on the input signal.
摘要翻译：根据本公开的一些实施例，电路包括被配置为接收电流模式输入信号的输入节点和包括通信地耦合到输入节点的输入设备的输入级。输入设备被配置为在输入节点处接收输入信号。电路还包括通信地耦合到输入级并被配置为为输入设备提供偏置电流的偏置电路。偏置电路还被配置为通过与输入节点相关联的反馈回路从输入信号中去除偏置电流的至少一部分，使得输入信号由输入装置接收，其中偏置电流的至少一部分被去除。电路还包括通信地耦合到输入级并被配置为基于输入信号输出电流模式输出信号的输出级。

2. 发明授权

US08463206B2 System and method for preserving input impedance of a current-mode circuit 有权
标题翻译：用于保持电流模式电路的输入阻抗的系统和方法
公开(公告)号：US08463206B2
公开(公告)日：2013-06-11
申请号：US13207672
申请日：2011-08-11
申请人： Chuanzhao Yu , Omid Oliaei , David Newman , Michael L. Gomez
发明人： Chuanzhao Yu , Omid Oliaei , David Newman , Michael L. Gomez
IPC分类号： H04B1/04
CPC分类号： H03F3/193
摘要： In accordance with some embodiments of the present disclosure, a circuit comprises an input node configured to receive a current-mode input signal and an input stage that includes an input device communicatively coupled to the input node. The input device is configured to receive the input signal at the input node. The circuit additionally comprises bias circuitry communicatively coupled to the input stage and configured to provide a bias current for the input device. The bias circuitry is also configured to remove at least a portion of the bias current from the input signal through a feedback loop associated with the input node such that the input signal is received by the input device with at least a portion of the bias current removed. The circuit further comprises an output stage communicatively coupled to the input stage and configured to output a current-mode output signal based on the input signal.
摘要翻译：根据本公开的一些实施例，电路包括被配置为接收电流模式输入信号的输入节点和包括通信地耦合到输入节点的输入设备的输入级。输入设备被配置为在输入节点处接收输入信号。电路还包括通信地耦合到输入级并被配置为为输入设备提供偏置电流的偏置电路。偏置电路还被配置为通过与输入节点相关联的反馈回路从输入信号中去除偏置电流的至少一部分，使得输入信号由输入装置接收，其中偏置电流的至少一部分被去除。电路还包括通信地耦合到输入级并被配置为基于输入信号输出电流模式输出信号的输出级。

3. 发明授权

US08482266B2 Voltage regulation circuitry and related operating methods 有权
标题翻译：电压调节电路及相关操作方法
公开(公告)号：US08482266B2
公开(公告)日：2013-07-09
申请号：US13013220
申请日：2011-01-25
申请人： Chuanzhao Yu , Luis J. Briones
发明人： Chuanzhao Yu , Luis J. Briones
IPC分类号： G05F1/44 , G05F3/26
CPC分类号： G05F1/575
摘要： Apparatus for voltage regulation circuits and related operating methods are provided. An exemplary voltage regulation circuit includes a voltage regulation arrangement that provides a regulated output voltage based on an input voltage reference, a phase compensation arrangement coupled to the voltage regulation arrangement and configured to increase a phase margin of the voltage regulation arrangement, and detection circuitry coupled to the phase compensation arrangement. The detection circuitry is configured to disable the phase compensation arrangement in response to detecting an output current that is less than a threshold value.
摘要翻译：提供了用于调压电路和相关操作方法的装置。示例性电压调节电路包括电压调节装置，其基于输入电压基准提供调节的输出电压;耦合到电压调节装置的相位补偿装置，并且被配置为增加电压调节装置的相位裕度，以及耦合的检测电路到相位补偿装置。检测电路被配置为响应于检测到小于阈值的输出电流而禁用相位补偿装置。

4. 发明授权

US08150360B2 DC offset calibration in a direct conversion receiver 有权
标题翻译：直流偏移校准在直接转换接收机
公开(公告)号：US08150360B2
公开(公告)日：2012-04-03
申请号：US13096635
申请日：2011-04-28
申请人： Jorge Ivonnet , Chuanzhao Yu
发明人： Jorge Ivonnet , Chuanzhao Yu
IPC分类号： H04B1/26
CPC分类号： H04B1/30 , H04L25/06
摘要： A direct conversion receiver (200) includes a low noise amplifier (LNA) (213), at least one baseband amplifier (119, 123 and 127), register banks (250 and 251) for storing a plurality of offset data corresponding to at least two LNA gain settings and a plurality of baseband gain settings, a DC offset correction system (235) for providing a DC offset signal, a state machine (275) for sequencing through each of the plurality of baseband gain settings and through enable and disable states for the LNA, and a processor (290) programmed to activate the state machine and to run the DC offset correction system.
摘要翻译：直接转换接收器（200）包括低噪声放大器（LNA）（213），至少一个基带放大器（119,123和127），用于存储至少对应于多个偏移数据的寄存器组（250和251）两个LNA增益设置和多个基带增益设置，用于提供DC偏移信号的DC偏移校正系统（235），用于对多个基带增益设置中的每一个进行排序以及通过使能和禁用状态的状态机（275）以及用于激活状态机并运行DC偏移校正系统的处理器（290）。

5. 发明授权

US08704597B2 Amplifiers and related receiver systems 有权
标题翻译：放大器和相关的接收机系统
公开(公告)号：US08704597B2
公开(公告)日：2014-04-22
申请号：US13873454
申请日：2013-04-30
申请人： Chuanzhao Yu , Salem Eid
发明人： Chuanzhao Yu , Salem Eid
IPC分类号： H03F3/45
CPC分类号： H03F3/193 , H03F3/45071 , H03F3/45188 , H03F2203/45631 , H03F2203/45638 , H04B1/18
摘要： Apparatus are provided for amplifier circuits and related receiver systems. An amplifier circuit includes a first common-source amplification stage and a second common-source amplification stage. The input of the second common-source amplification stage is coupled to the output of the first common-source amplification stage such that the first common-source amplification stage generates a first amplified signal, and the second common-source amplification stage generates a second amplified signal based on the first amplified signal. The first common-source amplification stage is coupled to a first node and the second common-source amplification stage is coupled to a second node, wherein the common-source amplification stages are configured such that a current between the first node and the second node flows in series through the common-source amplification stages.
摘要翻译：设备用于放大器电路和相关的接收机系统。放大器电路包括第一共源放大级和第二共源极放大级。第二公共源放大级的输入耦合到第一公共源放大级的输出，使得第一公共源极放大级产生第一放大信号，第二公共源极放大级产生第二放大倍数基于第一放大信号的信号。第一公共源放大级耦合到第一节点，并且第二公共源放大级耦合到第二节点，其中公共源放大级被配置为使得第一节点和第二节点之间的电流流动通过共源放大级串联。

6. 发明授权

US08010077B2 DC offset calibration in a direct conversion receiver 有权
标题翻译：直流偏移校准在直接转换接收机
公开(公告)号：US08010077B2
公开(公告)日：2011-08-30
申请号：US12106601
申请日：2008-04-21
申请人： Jorge Ivonnet , Chuanzhao Yu
发明人： Jorge Ivonnet , Chuanzhao Yu
IPC分类号： H04B1/26
CPC分类号： H04B1/30 , H04L25/06
摘要： A direct conversion receiver (200) includes a low noise amplifier (LNA) (213), at least one baseband amplifier (119, 123 and 127), register banks (250 and 251) for storing a plurality of offset data corresponding to at least two LNA gain settings and a plurality of baseband gain settings, a DC offset correction system (235) for providing a DC offset signal, a state machine (275) for sequencing through each of the plurality of baseband gain settings and through enable and disable states for the LNA, and a processor (290) programmed to activate the state machine and to run the DC offset correction system.
摘要翻译：直接转换接收器（200）包括低噪声放大器（LNA）（213），至少一个基带放大器（119,123和127），用于存储至少对应于多个偏移数据的寄存器组（250和251）两个LNA增益设置和多个基带增益设置，用于提供DC偏移信号的DC偏移校正系统（235），用于对多个基带增益设置中的每一个进行排序以及通过使能和禁用状态的状态机（275）以及用于激活状态机并运行DC偏移校正系统的处理器（290）。

7. 发明授权

US08493127B1 System and method for linearization of a mixer 有权
标题翻译：用于混合器线性化的系统和方法
公开(公告)号：US08493127B1
公开(公告)日：2013-07-23
申请号：US13419150
申请日：2012-03-13
申请人： Chuanzhao Yu , Haolu Xie , Dave Newman
发明人： Chuanzhao Yu , Haolu Xie , Dave Newman
IPC分类号： G06F7/44
CPC分类号： H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D2200/0023
摘要： A mixer may include a linearization circuit. The linearization circuit may include and operation amplifier, a first pass device, a second pass device, a first feedback resistor, and a second feedback resistor. Each of the first pass device and the second pass device may have a gate terminal, a first non-gate terminal, and a second non-gate terminal and coupled to its gate terminal to an output terminal of the operational amplifier and configured to be coupled at its first non-gate terminal to a high potential source. Each of the first feedback resistor and the second feedback resistor may have a first terminal and a second terminal, the first terminal coupled to the positive input terminal of the operational amplifier and the second terminal coupled to the second non-gate terminal of an associated pass device and the positive polarity of the differential baseband output.
摘要翻译：混频器可以包括线性化电路。线性化电路可以包括运算放大器，第一通道器件，第二通路器件，第一反馈电阻器和第二反馈电阻器。第一通过器件和第二通过器件中的每一个可以具有栅极端子，第一非栅极端子和第二非栅极端子，并且连接到其栅极端子到运算放大器的输出端子并被配置为耦合在其第一个非门极端到高电位源。第一反馈电阻器和第二反馈电阻器中的每个可以具有第一端子和第二端子，第一端子耦合到运算放大器的正输入端子，而第二端子耦合到相关通道的第二非门极端子器件和差分基带输出的正极性。

8. 发明授权

US08463226B2 Amplifiers and related receiver systems 有权
标题翻译：放大器和相关的接收机系统
公开(公告)号：US08463226B2
公开(公告)日：2013-06-11
申请号：US13004640
申请日：2011-01-11
申请人： Chuanzhao Yu , Salem Eid
发明人： Chuanzhao Yu , Salem Eid
IPC分类号： H04B1/16
CPC分类号： H03F3/193 , H03F3/45071 , H03F3/45188 , H03F2203/45631 , H03F2203/45638 , H04B1/18
摘要： Apparatus are provided for amplifier circuits and related receiver systems. An amplifier circuit includes a first common-source amplification stage and a second common-source amplification stage. The input of the second common-source amplification stage is coupled to the output of the first common-source amplification stage such that the first common-source amplification stage generates a first amplified signal, and the second common-source amplification stage generates a second amplified signal based on the first amplified signal. The first common-source amplification stage is coupled to a first node and the second common-source amplification stage is coupled to a second node, wherein the common-source amplification stages are configured such that a current between the first node and the second node flows in series through the common-source amplification stages.
摘要翻译：设备用于放大器电路和相关的接收机系统。放大器电路包括第一共源放大级和第二共源极放大级。第二公共源放大级的输入耦合到第一公共源放大级的输出，使得第一公共源放大级产生第一放大信号，第二公共源放大级产生第二扩展级基于第一放大信号的信号。第一公共源放大级耦合到第一节点，并且第二公共源放大级耦合到第二节点，其中公共源放大级被配置为使得第一节点和第二节点之间的电流流动通过共源放大级串联。

9. 发明公开

US20230198470A1 POWER AMPLIFIER WITH LINEARIZATION 审中-公开
公开(公告)号：US20230198470A1
公开(公告)日：2023-06-22
申请号：US17556846
申请日：2021-12-20
申请人： Stefano Pellerano , Chuanzhao Yu , JongSeok Park , LiChung Tony Chang
发明人： Stefano Pellerano , Chuanzhao Yu , JongSeok Park , LiChung Tony Chang
IPC分类号： H03F1/02 , H03F3/24 , H03F3/195 , H03F3/60
CPC分类号： H03F1/0288 , H03F3/245 , H03F3/195 , H03F3/604 , H03F2200/451
摘要： An amplifier, communication device and method of amplification are disclosed. An RF signal is amplified by a Doherty power amplifier (DPA). The DPA has a main amplifier with a Class-AB amplifier in parallel with a Class-C amplifier. When the RF signal power is smaller than 6 dB PBO, the Class-AB amplifier provides the main amplifier amplification; when the RF signal is between 6 dB PBO and 0 dB PBO, both the Class-AB and Class-C amplifiers provide the main amplifier amplification.

10. 发明公开

US20230198124A1 RADIO FREQUENCY SWITCH 审中-公开
公开(公告)号：US20230198124A1
公开(公告)日：2023-06-22
申请号：US17552619
申请日：2021-12-16
申请人： Chuanzhao Yu , Hyun Yoon , Muhammed Elgousi , Xi Li , LiChung Tony Chang
发明人： Chuanzhao Yu , Hyun Yoon , Muhammed Elgousi , Xi Li , LiChung Tony Chang
IPC分类号： H01Q1/22 , H03K17/687 , H03H11/04
CPC分类号： H01Q1/2283 , H03K17/687 , H03H11/04
摘要： A wireless communication device can include switch circuitry. The switch circuitry can include stacks having a common gate node and a common body node, wherein a stack includes a metal-oxide-semiconductor field-effect transistor (MOSFET) having a body resistive element coupled to a body terminal of the MOSFET and the common body node a gate resistive element coupled to a gate terminal of the MOSFET and the common gate node. The switch circuitry can further include a self-biased MOSFET coupled to the common gate node and the common body node, a gate of the self-biased MOSFET configured to receive direct current (DC) bias with a low pass filter.

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