专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090304951A1 ULTRALOW DIELECTRIC CONSTANT LAYER WITH CONTROLLED BIAXIAL STRESS 审中-公开
标题翻译：超导介质恒定层与受控双向应力
公开(公告)号：US20090304951A1
公开(公告)日：2009-12-10
申请号：US12542287
申请日：2009-08-17
申请人： Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
发明人： Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
IPC分类号： C23C16/513 , G21G5/00
CPC分类号： H01L21/76834 , C23C16/30 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02282 , H01L21/02348 , H01L21/3105 , H01L21/31058 , H01L21/31633 , H01L21/76801 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76832 , Y10T428/249953 , Y10T428/249969 , Y10T428/249979
摘要： A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.
摘要翻译：描述了形成具有受控双轴应力的超低介电常数层的方法，其包括以下步骤：通过PECVD和旋涂方法之一形成包含Si，C，O和H的层，并在含有非常低的浓度的环境中固化该膜的氧和水各自小于10ppm。还通过使用介电常数不超过2.8的方法描述材料。本发明克服了低双轴应力低于46MPa的薄膜形成问题。

2. 发明授权

US07357977B2 Ultralow dielectric constant layer with controlled biaxial stress 有权
标题翻译：具有受控双轴应力的超低介电常数层
公开(公告)号：US07357977B2
公开(公告)日：2008-04-15
申请号：US11034479
申请日：2005-01-13
申请人： Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
发明人： Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
IPC分类号： H01L23/52 , H01L23/58
CPC分类号： H01L21/76834 , C23C16/30 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02282 , H01L21/02348 , H01L21/3105 , H01L21/31058 , H01L21/31633 , H01L21/76801 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76832 , Y10T428/249953 , Y10T428/249969 , Y10T428/249979
摘要： A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.
摘要翻译：描述了形成具有受控双轴应力的超低介电常数层的方法，其包括以下步骤：通过PECVD和旋涂方法之一形成包含Si，C，O和H的层，并在含有非常低的浓度的环境中固化该膜的氧和水各自小于10ppm。还通过使用介电常数不大于2.8的方法描述材料。本发明克服了低双轴应力低于46MPa的薄膜形成问题。

3. 发明申请

US20080286494A1 ULTRALOW DIELECTRIC CONSTANT LAYER WITH CONTROLLED BIAXIAL STRESS 审中-公开
公开(公告)号：US20080286494A1
公开(公告)日：2008-11-20
申请号：US12044334
申请日：2008-03-07
申请人： Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
发明人： Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
IPC分类号： B01J19/08 , C23C16/44
CPC分类号： H01L21/76834 , C23C16/30 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02282 , H01L21/02348 , H01L21/3105 , H01L21/31058 , H01L21/31633 , H01L21/76801 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76832 , Y10T428/249953 , Y10T428/249969 , Y10T428/249979
摘要： A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.

4. 发明授权

US5981970A Thin-film field-effect transistor with organic semiconductor requiring low operating voltages 失效
公开(公告)号：US5981970A
公开(公告)日：1999-11-09
申请号：US827018
申请日：1997-03-25
申请人： Christos Dimitrios Dimitrakopoulos , Peter Richard Duncombe , Bruce K. Furman , Robert B. Laibowitz , Deborah Ann Neumayer , Sampath Purushothaman
发明人： Christos Dimitrios Dimitrakopoulos , Peter Richard Duncombe , Bruce K. Furman , Robert B. Laibowitz , Deborah Ann Neumayer , Sampath Purushothaman
IPC分类号： H01L21/316 , H01L29/786 , H01L51/05 , H01L51/10 , H01L51/30 , H01L35/24
CPC分类号： H01L51/0525 , H01L21/31691 , H01L51/0052 , H01L51/0545
摘要： A thin film transistor (TFT) device structure based on an organic semiconductor material, that exhibits a high field effect mobility, high current modulation and a low sub-threshold slope at lower operating voltages than the current state of the art organic TFT devices. The structure comprises a suitable substrate disposed with he following sequence of features: a set of conducting gate electrodes covered with a high dielectric constant insulator, a layer of the organic semiconductor, sets of electrically conducting source and drain electrodes corresponding to each of the gate lines, and an optional passivation layer that can overcoat and protect the device structure.Use of high dielectric constant gate insulators exploits the unexpected gate voltage dependence of the organic semiconductor to achieve high field effect mobility levels at very low operating voltages. Judicious combinations of the choice of this insulator material and the means to integrate it into the TFT structure are taught that would enable easy fabrication on glass or plastic substrates and the use of such devices in flat panel display applications.

5. 发明授权

US06344660B1 Thin-film field-effect transistor with organic semiconductor requiring low operating voltages 有权
标题翻译：具有需要低工作电压的有机半导体的薄膜场效应晶体管
公开(公告)号：US06344660B1
公开(公告)日：2002-02-05
申请号：US09323804
申请日：1999-06-02
申请人： Christos Dimitrios Dimitrakopoulos , Peter Richard Duncombe , Bruce K. Furman , Robert B. Laibowitz , Deborah Ann Neumayer , Sampath Purushothaman
发明人： Christos Dimitrios Dimitrakopoulos , Peter Richard Duncombe , Bruce K. Furman , Robert B. Laibowitz , Deborah Ann Neumayer , Sampath Purushothaman
IPC分类号： H01L3524
CPC分类号： H01L51/0525 , H01L21/31691 , H01L51/0052 , H01L51/0545
摘要： A thin film transistor (TFT) device structure based on an organic semiconductor material, that exhibits a high field effect mobility, high current modulation and a low sub-threshold slope at lower operating voltages than the current state of the art organic TFT devices. The structure comprises a suitable substrate disposed with he following sequence of features: a set of conducting gate electrodes covered with a high dielectric constant insulator, a layer of the organic semiconductor, sets of electrically conducting source and drain electrodes corresponding to each of the gate lines, and an optional passivation layer that can overcoat and protect the device structure. Use of high dielectric constant gate insulators exploits the unexpected gate voltage dependence of the organic semiconductor to achieve high field effect mobility levels at very low operating voltages. Judicious combinations of the choice of this insulator material and the means to integrate it into the TFT structure are taught that would enable easy fabrication on glass or plastic substrates and the use of such devices in flat panel display applications.
摘要翻译：一种基于有机半导体材料的薄膜晶体管（TFT）器件结构，其在比现有技术的有机TFT器件的当前状态更低的工作电压下表现出高场效应迁移率，高电流调制和低子阈值斜率。该结构包括合适的衬底，其具有以下特征序列：一组覆盖有高介电常数绝缘体的导电栅极电极，有机半导体层，对应于每条栅极线的导电源极和漏极电极组，以及可以覆盖和保护器件结构的可选钝化层。使用高介电常数栅极绝缘体利用有机半导体的意想不到的栅极电压依赖性，以在非常低的工作电压下实现高场效应迁移率水平。教导了将这种绝缘体材料的选择和将其集成到TFT结构中的手段的合理组合，这将使得能够容易地在玻璃或塑料基板上制造以及在平板显示器应用中使用这种装置。

6. 发明授权

US5946551A Fabrication of thin film effect transistor comprising an organic semiconductor and chemical solution deposited metal oxide gate dielectric 失效
标题翻译：包括有机半导体和化学溶液沉积的金属氧化物栅极电介质的薄膜效应晶体管的制造
公开(公告)号：US5946551A
公开(公告)日：1999-08-31
申请号：US827015
申请日：1997-03-25
申请人： Christos Dimitrios Dimitrakopoulos , Peter Richard Duncombe , Bruce K. Furman , Robert B. Laibowitz , Deborah Ann Neumayer , Sampath Purushothaman
发明人： Christos Dimitrios Dimitrakopoulos , Peter Richard Duncombe , Bruce K. Furman , Robert B. Laibowitz , Deborah Ann Neumayer , Sampath Purushothaman
IPC分类号： H01L21/314 , H01L21/316 , H01L51/05 , H01L51/30 , H01L51/40
CPC分类号： H01L21/31691 , H01L51/0525 , H01L51/0052 , H01L51/0545
摘要： A thin film transistor (TFT) device structure based on an organic semiconductor material, that exhibits a high field effect mobility, high current modulation and a low sub-threshold slope at lower operating voltages than the current state of the art organic TFT devices. A fabrication process for the same, especially a process for deposition of the gate insulator using chemical solutions. The structure comprises a suitable substrate disposed with the following sequence of features: a set of conducting gate electrodes covered with a high dielectric constant insulator, a layer of the organic semiconductor, sets of electrically conducting source and drain electrodes corresponding to each of the gate lines, and an optional passivation layer that can overcoat and protect the device structure. Use of high dielectric constant gate insulators exploits the unexpected gate voltage dependence of the organic semiconductor to achieve high field effect mobility levels at very low operating voltages. Judicious combinations of the choice of this insulator material and the means to integrate it into the TFT structure are taught that would enable easy fabrication on glass or plastic substrates and the use of such devices in flat panel display applications.
摘要翻译：一种基于有机半导体材料的薄膜晶体管（TFT）器件结构，其在比现有技术的有机TFT器件的当前状态更低的工作电压下表现出高场效应迁移率，高电流调制和低子阈值斜率。其制造方法，特别是使用化学溶液沉积栅极绝缘体的工艺。该结构包括以下列顺序排列的合适的衬底：一组由高介电常数绝缘体覆盖的导电栅极电极，有机半导体层，对应于每条栅极线的一组导电源极和漏极电极，以及可以覆盖和保护器件结构的可选钝化层。使用高介电常数栅极绝缘体利用有机半导体的意想不到的栅极电压依赖性，以在非常低的工作电压下实现高场效应迁移率水平。教导了将这种绝缘体材料的选择和将其集成到TFT结构中的手段的合理组合，这将使得能够容易地在玻璃或塑料基板上制造以及在平板显示器应用中使用这种装置。

7. 发明申请

US20090102046A1 ON-CHIP TEMPERATURE GRADIENT MINIMIZATION USING CARBON NANOTUBE COOLING STRUCTURES WITH VARIABLE COOLING CAPACITY 有权
标题翻译：使用具有可变冷却能力的碳纳米管冷却结构的片上温度梯度最小化
公开(公告)号：US20090102046A1
公开(公告)日：2009-04-23
申请号：US11874861
申请日：2007-10-18
申请人： Christos Dimitrios Dimitrakopoulos , Christos John Georgiou , Alfred Grill , Bernice E. Rogowitz
发明人： Christos Dimitrios Dimitrakopoulos , Christos John Georgiou , Alfred Grill , Bernice E. Rogowitz
IPC分类号： H01L23/34 , H01L21/00
CPC分类号： H01L23/373 , H01L2924/0002 , H01L2924/00
摘要： An electronic device comprises a die with at least one defined hot-spot area; and at least one defined intermediate temperature area at a temperature lower than the temperature of the hot-spot area. The device also comprises a cooling structure comprising at least one bundle of first nanotubes for cooling the hot spot area and at least one bundle of additional nanotubes for cooling the intermediate temperature area, and having heat conductivity lower than the bundle of first nanotubes. The heat conductivity of both sets of the nanotubes is sufficient to decrease any temperature gradient between the defined hot spot area, the defined intermediate temperature area, and at least one lower temperature area on the die. The walls of the first nanotubes and the additional nanotubes are surrounded by a heat conducting matrix material operatively associated with the lower temperature area.
摘要翻译：电子设备包括具有至少一个限定的热点区域的模具; 以及在低于热点区域的温度的温度下的至少一个限定的中间温度区域。该装置还包括冷却结构，该冷却结构包括用于冷却热点区域的至少一束第一纳米管和用于冷却中间温度区域的至少一束另外的纳米管，并且具有低于第一纳米管束的导热率。两组纳米管的导热性足以降低限定的热点面积，所定义的中间温度区域和模具上的至少一个较低温度区域之间的任何温度梯度。第一纳米管和另外的纳米管的壁由与较低温度区域可操作地相关联的导热基质材料包围。

8. 发明授权

US07842554B2 VLSI hot-spot minimization using nanotubes 失效
标题翻译：使用纳米管的VLSI热点最小化
公开(公告)号：US07842554B2
公开(公告)日：2010-11-30
申请号：US12169458
申请日：2008-07-08
申请人： Christos Dimitrios Dimitrakopoulos , Christos John Georgiou
发明人： Christos Dimitrios Dimitrakopoulos , Christos John Georgiou
IPC分类号： H01L21/00
CPC分类号： F28F21/02 , F28D2015/0225 , F28D2021/0029 , F28F2255/00 , F28F2260/02 , H01L23/373 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to a semiconductive device comprising a die with at least one defined hot-spot area lying in a plane on the die and a cooling structure comprising nanotubes such as carbon nanotubes extending in a plane different than the plane of the hot-spot area and outwardly from the plane of the hot-spot area. The nanotubes are operatively associated with the hot-spot area to decrease any temperature gradient between the hot-spot area and at least one other area on the die defined by a temperature lower than the hot-spot area. A matrix material comprising a second heat conducting material substantially surrounds the nanotubes and is operatively associated with and in heat conducting relation with the other area on the die defined by a temperature lower than the hot-spot area. The heat conductivity of the nanotubes is greater than the heat conductivity of the matrix material, with the distal ends of the nanotubes exposed to present a distal surface comprising the first heat conducting means for direct contact with a medium comprising a cooling fluid. The inventors also disclose processes for manufacturing and using the device and products produced by the processes.
摘要翻译：本发明涉及一种半导体器件，其包括具有位于管芯上的平面中的至少一个限定热点区域的管芯和包括在不同于热点区域的平面的平面内延伸的碳纳米管的纳米管的冷却结构并从热点区域的平面向外。纳米管与热点区域可操作地相关联，以降低由热点区域和模具上的至少一个其它区域之间的温度梯度，该温度梯度由低于热点区域的温度限定。包括第二导热材料的基质材料基本上围绕纳米管，并且与由热点区域的温度限定的模具上的另一个区域可操作地相关联并与其导热。纳米管的导热性大于基体材料的导热性，其中纳米管的远端暴露于远侧表面，该远端表面包括用于与包含冷却流体的介质直接接触的第一导热装置。本发明人还公开了用于制造和使用由该方法生产的装置和产品的方法。

9. 发明授权

US06437422B1 Active devices using threads 失效
标题翻译：主动设备使用线程
公开(公告)号：US06437422B1
公开(公告)日：2002-08-20
申请号：US09852078
申请日：2001-05-09
申请人： Paul M. Solomon , Jane Margaret Shaw , Cherie R. Kagan , Christos Dimitrios Dimitrakopoulos , Tak Hung Ning
发明人： Paul M. Solomon , Jane Margaret Shaw , Cherie R. Kagan , Christos Dimitrios Dimitrakopoulos , Tak Hung Ning
IPC分类号： H01L2906
CPC分类号： D02G3/441 , H01L29/0657 , H01L51/0036 , H01L51/0512 , H02N2/18
摘要： Active devices that have either a thread or a ribbon geometry. The thread geometry includes single thread active devices and multiple thread devices. Single thread devices have a central core that may contain different materials depending upon whether the active device is responsive to electrical, light, mechanical, heat, or chemical energy. Single thread active devices include FETs, electro-optical devices, stress transducers, and the like. The active devices include a semiconductor body that for the single thread devices is a layer about the core of the thread. For the multiple thread devices, the semiconductor body is either a layer on one or more of the threads or an elongated body disposed between two of the threads. For example, a FET is formed of three threads, one of which carries a gate insulator layer and a semiconductor layer and the other two of which are electrically conductive and serve as the source and drain. The substrates or threads are preferably flexible and can be formed in a fabric.
摘要翻译：具有螺纹或带状几何形状的活动设备。螺纹几何包括单线程有源器件和多线程器件。单线设备具有中心芯，其可以包含不同的材料，这取决于有源器件是否响应于电，光，机械，热或化学能量。单线有源器件包括FET，电光器件，应力传感器等。有源器件包括用于单线器件是围绕线芯的层的半导体本体。对于多线器件，半导体本体是一个或多个螺纹上的层或设置在两个螺纹之间的细长体。例如，FET由三条线构成，其中一条带有栅极绝缘体层和半导体层，另外两条导电并用作源极和漏极。基材或丝线优选是柔性的并且可以在织物中形成。

10. 发明授权

US07095474B2 Patterns of electrically conducting polymers and their application as electrodes or electrical contacts 有权
公开(公告)号：US07095474B2
公开(公告)日：2006-08-22
申请号：US09950534
申请日：2001-10-19
申请人： Marie Angelopoulos , Christos Dimitrios Dimitrakopoulos , Bruce Kenneth Furman , Teresita Ordonez Graham , Shui-Chih Alan Lien
发明人： Marie Angelopoulos , Christos Dimitrios Dimitrakopoulos , Bruce Kenneth Furman , Teresita Ordonez Graham , Shui-Chih Alan Lien
IPC分类号： G02F1/1343
CPC分类号： H01L51/5203 , C08G61/12 , G02F1/13439 , H01B1/125 , H01B1/127 , H01B1/128 , H01J29/868 , H01L21/0332 , H01L21/31138 , H01L23/49894 , H01L23/60 , H01L29/456 , H01L29/458 , H01L29/4908 , H01L33/38 , H01L33/42 , H01L51/0018 , H01L51/0021 , H01L51/0023 , H01L51/0504 , H01L51/0508 , H01L51/0512 , H01L51/0545 , H01L51/102 , H01L51/5206 , H01L51/5234 , H01L2251/5323 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , Y10T428/10 , Y10T428/1055 , Y10T428/12528 , Y10T428/24331 , Y10T428/31504 , Y10T428/31533 , Y10T428/31678 , Y10T428/31692 , H01L2924/00
摘要： Electronic devices having patterned electrically conductive polymers providing electrical connection thereto and methods of fabrication thereof are described. Liquid crystal display cells are described having at least one of the electrodes providing a bias across the liquid crystal material formed from a patterned electrically conductive polymer. Thin film transistors having patterned electrically conductive polymers as source drain and gate electrodes are described. Light emitting diodes having anode and coated regions formed from patterned electrically conductive polymers are described. Methods of patterning using a resist mask; patterning using a patterned metal layer; patterning the metal layer using a resist; and patterning the electrically conductive polymer directly to form electrodes and anode and cathode regions are described.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式