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1. 发明授权

US08541299B2 Electrical interconnect forming method 有权
标题翻译：电互连成型方法
公开(公告)号：US08541299B2
公开(公告)日：2013-09-24
申请号：US12787527
申请日：2010-05-26
申请人： Stephen Leslie Buchwalter , Bruce K. Furman , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
发明人： Stephen Leslie Buchwalter , Bruce K. Furman , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H01L21/44 , H01L21/48
CPC分类号： H01L24/16 , H01L21/563 , H01L21/6835 , H01L24/11 , H01L24/12 , H01L24/27 , H01L24/28 , H01L24/31 , H01L24/73 , H01L24/81 , H01L24/94 , H01L2221/68377 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/11003 , H01L2224/1131 , H01L2224/11334 , H01L2224/114 , H01L2224/116 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1357 , H01L2224/136 , H01L2224/16 , H01L2224/16225 , H01L2224/17051 , H01L2224/274 , H01L2224/29111 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/81191 , H01L2224/8121 , H01L2224/81815 , H01L2924/0001 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H05K3/3436 , H05K2201/0379 , H05K2201/094 , H05K2201/10234 , H05K2201/10242 , H05K2201/10977 , Y02P70/613 , Y10T29/49165 , H01L2224/45111 , H01L2924/01047 , H01L2224/13099 , H01L2924/01083 , H01L2924/00 , H01L2224/29099 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An electrical interconnect forming method. The electrical interconnect includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.
摘要翻译：电互连形成方法。电互连包括包括第一导电焊盘的第一衬底，包括第二导电焊盘的第二衬底以及将第一导电焊盘电连接和机械地连接到第二导电焊盘的互连结构。互连结构包括非焊料金属芯结构，第一焊料结构和第二焊料结构。第一焊料结构将非焊料金属芯结构的第一部分电连接并机械地连接到第一导电焊盘。第二焊料结构将非焊料金属芯结构的第二部分电连接并机械连接到第二导电焊盘。

2. 发明授权

US07978473B2 Cooling apparatus with cold plate formed in situ on a surface to be cooled 有权
标题翻译：具有冷板的冷却装置在待冷却的表面上原位形成
公开(公告)号：US07978473B2
公开(公告)日：2011-07-12
申请号：US12706912
申请日：2010-02-17
申请人： Levi A. Campbell , Richard C. Chu , Michael J. Ellsworth, Jr. , Bruce K. Furman , Madhusudan K. Iyengar , Paul A. Lauro , Roger R. Schmidt , Da-Yuan Shih , Robert E. Simons
发明人： Levi A. Campbell , Richard C. Chu , Michael J. Ellsworth, Jr. , Bruce K. Furman , Madhusudan K. Iyengar , Paul A. Lauro , Roger R. Schmidt , Da-Yuan Shih , Robert E. Simons
IPC分类号： H05K7/20 , G06F1/20 , H01L23/34
CPC分类号： H01L23/4735 , H01L23/473 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00
摘要： A cooling apparatus and method of fabrication are provided for facilitating removal of heat from a heat-generating electronic device. The method of fabrication includes: obtaining a solder material; disposing the solder material on a surface to be cooled; and reflowing and shaping the solder material disposed on the surface to be cooled to configure the solder material as a base with a plurality of fins extending therefrom. In addition to being in situ-configured on the surface to be cooled, the base is simultaneously metallurgically bonded to the surface to be cooled. The solder material, configured as the base with a plurality of fins extending therefrom, is a single, monolithic structure thermally attached to the surface to be cooled via the metallurgical bonding thereof to the surface to be cooled.
摘要翻译：提供冷却装置和制造方法以便于从发热电子装置中除去热量。制造方法包括：获得焊料材料; 将焊料材料设置在要冷却的表面上; 回流和成形设置在待冷却表面上的焊料材料，以将焊料材料构成为具有从其延伸的多个翅片的基底。除了在待冷却的表面上原位配置，基底同时冶金结合到待冷却的表面上。构造为具有从其延伸的多个翅片的基底的焊料材料是通过其被冶金结合到要冷却的表面热连接到要冷却的表面的单个整体结构。

3. 发明申请

US20100255262A1 BONDING OF SUBSTRATES INCLUDING METAL-DIELECTRIC PATTERNS WITH METAL RAISED ABOVE DIELECTRIC 有权
标题翻译：包括金属介电材料的金属介电模式的衬底的结合
公开(公告)号：US20100255262A1
公开(公告)日：2010-10-07
申请号：US11532599
申请日：2006-09-18
申请人： Kuan-Neng Chen , Bruce K. Furman , Sampath Purushothaman , David L. Rath , Anna W. Topol , Cornelia K. Tsang
发明人： Kuan-Neng Chen , Bruce K. Furman , Sampath Purushothaman , David L. Rath , Anna W. Topol , Cornelia K. Tsang
IPC分类号： B32B3/00 , B23K31/02
CPC分类号： H01L24/05 , B23K20/023 , B23K20/233 , B23K20/24 , B23K2101/42 , H01L24/03 , H01L24/08 , H01L24/12 , H01L24/80 , H01L2224/0381 , H01L2224/03845 , H01L2224/0401 , H01L2224/05571 , H01L2224/05572 , H01L2224/08147 , H01L2224/08148 , H01L2224/80203 , H01L2224/80345 , H01L2224/80895 , H01L2224/80896 , H01L2224/80948 , H01L2224/80986 , H01L2924/14 , H01L2924/1461 , Y10T428/24479 , Y10T428/24521 , Y10T428/24545 , Y10T428/24612 , Y10T428/31678 , H01L2924/00012 , H01L2924/0001 , H01L2924/00
摘要： Bonding of substrates including metal-dielectric patterns on a surface with the metal raised above the dielectric is disclosed. One method includes providing a first substrate having a metal-dielectric pattern on a surface thereof; providing a second substrate having a metal-dielectric pattern on a surface thereof; performing a process resulting in the metal being raised above the dielectric; cleaning the metal; and bonding the first substrate to the second substrate. A related structure is also disclosed. The bonding of raised metal provides a strong bonding medium, and good electrical and thermal connections enabling creation of three dimensional integrated structures with enhanced functionality.
摘要翻译：公开了包括金属介电图案在衬底上的金属与在电介质上方凸起的金属的结合。一种方法包括在其表面上提供具有金属 - 电介质图案的第一基板; 提供在其表面上具有金属 - 电介质图案的第二基板; 执行导致金属在电介质上方升高的过程; 清洗金属; 以及将所述第一基板接合到所述第二基板。还公开了相关的结构。凸起金属的结合提供了强大的粘合介质，以及良好的电气和热连接，能够创建具有增强功能的三维集成结构。

4. 发明申请

US20100230143A1 ELECTRICAL INTERCONNECT STRUCTURE 有权
标题翻译：电气互连结构
公开(公告)号：US20100230143A1
公开(公告)日：2010-09-16
申请号：US12787485
申请日：2010-05-26
申请人： Stephen Leslie Buchwalter , Bruce K. Furman , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
发明人： Stephen Leslie Buchwalter , Bruce K. Furman , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H05K1/03
CPC分类号： H01L24/16 , H01L21/563 , H01L21/6835 , H01L24/11 , H01L24/12 , H01L24/27 , H01L24/28 , H01L24/31 , H01L24/73 , H01L24/81 , H01L24/94 , H01L2221/68377 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/11003 , H01L2224/1131 , H01L2224/11334 , H01L2224/114 , H01L2224/116 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1357 , H01L2224/136 , H01L2224/16 , H01L2224/16225 , H01L2224/17051 , H01L2224/274 , H01L2224/29111 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/81191 , H01L2224/8121 , H01L2224/81815 , H01L2924/0001 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H05K3/3436 , H05K2201/0379 , H05K2201/094 , H05K2201/10234 , H05K2201/10242 , H05K2201/10977 , Y02P70/613 , Y10T29/49165 , H01L2224/45111 , H01L2924/01047 , H01L2224/13099 , H01L2924/01083 , H01L2924/00 , H01L2224/29099 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An electrical structure including a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.
摘要翻译：一种电结构，包括包括第一导电焊盘的第一基板，包括第二导电焊盘的第二基板和将第一导电焊盘电连接和机械连接到第二导电焊盘的互连结构。互连结构包括非焊料金属芯结构，第一焊料结构和第二焊料结构。第一焊料结构将非焊料金属芯结构的第一部分电连接并机械地连接到第一导电焊盘。第二焊料结构将非焊料金属芯结构的第二部分电连接并机械连接到第二导电焊盘。

5. 发明授权

US07786001B2 Electrical interconnect structure and method 有权
标题翻译：电互连结构及方法
公开(公告)号：US07786001B2
公开(公告)日：2010-08-31
申请号：US11733840
申请日：2007-04-11
申请人： Stephen Leslie Buchwalter , Bruce K. Furman , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
发明人： Stephen Leslie Buchwalter , Bruce K. Furman , Peter A. Gruber , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H01L21/44
CPC分类号： H01L24/16 , H01L21/563 , H01L21/6835 , H01L24/11 , H01L24/12 , H01L24/27 , H01L24/28 , H01L24/31 , H01L24/73 , H01L24/81 , H01L24/94 , H01L2221/68377 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/11003 , H01L2224/1131 , H01L2224/11334 , H01L2224/114 , H01L2224/116 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1357 , H01L2224/136 , H01L2224/16 , H01L2224/16225 , H01L2224/17051 , H01L2224/274 , H01L2224/29111 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/81191 , H01L2224/8121 , H01L2224/81815 , H01L2924/0001 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H05K3/3436 , H05K2201/0379 , H05K2201/094 , H05K2201/10234 , H05K2201/10242 , H05K2201/10977 , Y02P70/613 , Y10T29/49165 , H01L2224/45111 , H01L2924/01047 , H01L2224/13099 , H01L2924/01083 , H01L2924/00 , H01L2224/29099 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An electrical structure and method of forming. The electrical structure includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.
摘要翻译：一种电气结构和成型方法。电结构包括第一衬底，其包括第一导电焊盘，第二衬底，其包括第二导电焊盘，以及将第一导电焊盘电连接和机械连接到第二导电焊盘的互连结构。互连结构包括非焊料金属芯结构，第一焊料结构和第二焊料结构。第一焊料结构将非焊料金属芯结构的第一部分电连接并机械地连接到第一导电焊盘。第二焊料结构将非焊料金属芯结构的第二部分电连接并机械连接到第二导电焊盘。

6. 发明申请

US20100081232A1 LAYER TRANSFER PROCESS AND FUNCTIONALLY ENHANCED INTEGRATED CIRCUITS PRODUCED THEREBY 有权
标题翻译：层级传输过程和功能强化的集成电路
公开(公告)号：US20100081232A1
公开(公告)日：2010-04-01
申请号：US12544226
申请日：2009-08-20
申请人： Bruce K. Furman , Sampath Purushothaman , Muthumanickam Sankarapandian , Anna Topol
发明人： Bruce K. Furman , Sampath Purushothaman , Muthumanickam Sankarapandian , Anna Topol
IPC分类号： H01L21/50 , H01L21/768
CPC分类号： H01L21/768 , H01L21/2007 , H01L21/84 , H01L23/3735 , H01L27/0688 , H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： A structure for a semiconductor components is provided having a device layer sandwiched on both sides by other active, passive, and interconnecting components. A wafer-level layer transfer process is used to create this planar (2D) IC structure with added functional enhancements.
摘要翻译：提供了一种用于半导体部件的结构，其具有通过其它有源，无源和互连部件夹在两侧的器件层。使用晶片级层传输过程来创建具有附加功能增强的平面（2D）IC结构。

7. 发明申请

US20090316360A1 COOLING APPARATUS AND METHOD OF FABRICATION THEREOF WITH A COLD PLATE FORMED IN SITU ON A SURFACE TO BE COOLED 失效
标题翻译：冷却装置及其制冷方法与要冷却的表面上的冷盘形成的冷板
公开(公告)号：US20090316360A1
公开(公告)日：2009-12-24
申请号：US12143289
申请日：2008-06-20
申请人： Levi A. CAMPBELL , Richard C. CHU , Michael J. ELLSWORTH, JR. , Bruce K. FURMAN , Madhusudan K. IYENGAR , Paul A. LAURO , Roger R. SCHMIDT , Da-Yuan SHIH , Robert E. SIMONS
发明人： Levi A. CAMPBELL , Richard C. CHU , Michael J. ELLSWORTH, JR. , Bruce K. FURMAN , Madhusudan K. IYENGAR , Paul A. LAURO , Roger R. SCHMIDT , Da-Yuan SHIH , Robert E. SIMONS
IPC分类号： H05K7/20 , B23K31/02 , F28F7/00
CPC分类号： H01L23/4735 , H01L23/473 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00
摘要： A cooling apparatus and method of fabrication are provided for facilitating removal of heat from a heat-generating electronic device. The method of fabrication includes: obtaining a solder material; disposing the solder material on a surface to be cooled; and reflowing and shaping the solder material disposed on the surface to be cooled to configure the solder material as a base with a plurality of fins extending therefrom. In addition to being in situ-configured on the surface to be cooled, the base is simultaneously metallurgically bonded to the surface to be cooled. The solder material, configured as the base with a plurality of fins extending therefrom, is a single, monolithic structure thermally attached to the surface to be cooled via the metallurgical bonding thereof to the surface to be cooled.
摘要翻译：提供冷却装置和制造方法以便于从发热电子装置中除去热量。制造方法包括：获得焊料材料; 将焊料材料设置在要冷却的表面上; 回流和成形设置在待冷却表面上的焊料材料，以将焊料材料构成为具有从其延伸的多个翅片的基底。除了在待冷却的表面上原位配置，基底同时冶金结合到待冷却的表面上。被配置为具有从其延伸的多个翅片的基底的焊料材料是通过其被冶金结合到要冷却的表面而热连接到待冷却表面的单个整体结构。

8. 发明申请

US20080268574A1 HERMETIC SEAL AND RELIABLE BONDING STRUCTURES FOR 3D APPLICATIONS 审中-公开
标题翻译：用于3D应用的HERMETIC SEAL和可靠的结合结构
公开(公告)号：US20080268574A1
公开(公告)日：2008-10-30
申请号：US12035053
申请日：2008-02-21
申请人： Kuan-Neng Chen , Bruce K. Furman , Edmund J. Sprogis , Anna W. Topol , Cornelia K. Tsang , Matthew R. Wordeman , Albert M. Young
发明人： Kuan-Neng Chen , Bruce K. Furman , Edmund J. Sprogis , Anna W. Topol , Cornelia K. Tsang , Matthew R. Wordeman , Albert M. Young
IPC分类号： H01L21/58
CPC分类号： H01L25/50 , H01L2224/80895 , H01L2225/06513 , H01L2225/06593 , H01L2924/0002 , H01L2924/00
摘要： A sealed microelectronic structure which provides mechanical stress endurance and includes at least two chips being electrically connected to a semiconductor structure at a plurality of locations. Each chip includes a continuous bonding material along it's perimeter and at least one support column connected to each of the chips positioned within the perimeter of each chip. Each support column extends outwardly such that when the at least two chips are positioned over one another the support columns are in mating relation to each other. A seal between the at least two chips results from the overlapping relation of the chip to one another such that the bonding material and support columns are in mating relation to each other. Thus, the seal is formed when the at least two chips are mated together, and results in a bonded chip structure.
摘要翻译：一种密封的微电子结构，其提供机械应力耐久性并且包括在多个位置处电连接到半导体结构的至少两个芯片。每个芯片沿着其周边包括连续的接合材料，以及连接到位于每个芯片的周边内的每个芯片的至少一个支撑柱。每个支撑柱向外延伸，使得当至少两个芯片彼此定位时，支撑柱彼此配合。至少两个芯片之间的密封由芯片彼此的重叠关系产生，使得接合材料和支撑柱彼此配合。因此，当至少两个芯片配合在一起时形成密封，并且导致粘合芯片结构。

9. 发明授权

US06955481B2 Method and apparatus for providing parallel optoelectronic communication with an electronic device 有权
标题翻译：用于提供与电子设备的平行光电通信的方法和设备
公开(公告)号：US06955481B2
公开(公告)日：2005-10-18
申请号：US10667234
申请日：2003-09-17
申请人： Evan G. Colgan , Bruce K. Furman , Daniel J. Stigliani, Jr.
发明人： Evan G. Colgan , Bruce K. Furman , Daniel J. Stigliani, Jr.
IPC分类号： G02B6/42 , G02B6/36
CPC分类号： G02B6/4214 , G02B6/4246 , G02B6/4249
摘要： An optoelectronic assembly for an electronic system includes a support electronic chip set configured for at least one of providing multiplexing, demultiplexing, coding, decoding and optoelectronic transducer driving and receive functions. A first substrate having a first surface and an opposite second surface is in communication with the support electronic chip set via the first surface while a second substrate is in communication with the second surface of the first substrate. The second substrate is configured for mounting at least one of data processing, data switching and data storage chips. An optoelectronic transducer is in signal communication with the support electronic chip set and an optical fiber array is aligned at a first end with the optoelectronic transducer and with an optical signaling medium at a second end. An electrical signal from the support electronic chip set is communicated to the optoelectronic transducer via an electrical signaling medium, and the support electronic chip set and the optoelectronic transducer share a common thermal path for cooling.
摘要翻译：一种用于电子系统的光电组件，包括配置用于提供多路复用，解复用，编码，解码和光电换能器驱动和接收功能中的至少一个的支持电子芯片组。具有第一表面和相对的第二表面的第一基板经由第一表面与支撑电子芯片组连通，而第二基板与第一基板的第二表面连通。第二基板被配置用于安装数据处理，数据交换和数据存储芯片中的至少一个。光电子传感器与支撑电子芯片组进行信号通信，光纤阵列在第一端与光电转换器对准，并在第二端与光信号介质对准。来自支持电子芯片组的电信号通过电信号介质传送到光电转换器，并且支持电子芯片组和光电转换器共享用于冷却的公共热路径。

10. 发明授权

US6005070A Methods of fabrication of deaggregated electrically conductive polymers and precursors thereof 失效
标题翻译：解聚集的导电聚合物及其前体的制备方法
公开(公告)号：US6005070A
公开(公告)日：1999-12-21
申请号：US783805
申请日：1997-01-16
申请人： Marie Angelopoulos , Bruce K. Furman
发明人： Marie Angelopoulos , Bruce K. Furman
IPC分类号： C08F283/00 , C08G61/12 , C08G73/00 , H01B1/12
CPC分类号： C08F283/00 , C08G61/12
摘要： Deaggregated substituted and unsubstitued polyparaphenylenes, polyparaphenylevevinyles, polyanilines, polyazines, polythiophenes, poly-p-phenylene sulfides, polyfuranes, polypyrroles, polyselenophene, polyacetylenes formed from soluble precursors and combinations thereof and copolymers thereof and methods of fabrication are described. The deaggregated polymer molecules when subsequently doped show higher electrical conductivity. Agents such as lithium chloride, m-cresol and nonylphenol are used to deaggregate the polymer molecules. The deaggregating agents can be added prior to or during doping the molecules.
摘要翻译：描述了聚集的取代和未取代的聚对苯二酚，聚对苯乙烯基乙烯基，聚苯胺，聚嗪，聚噻吩，聚对苯硫醚，聚呋喃，聚吡咯，聚硒吩，由可溶性前体及其组合形成的聚乙炔及其共聚物及其制备方法。随后掺杂时的解聚聚合物分子显示更高的导电性。诸如氯化锂，间甲酚和壬基苯酚的试剂用于解聚聚合物分子。解聚剂可以在掺杂分子之前或期间加入。

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