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1. 发明授权

US07116241B2 Removable memory cartridge system for use with a server or other processor-based device 有权
公开(公告)号：US07116241B2
公开(公告)日：2006-10-03
申请号：US10437571
申请日：2003-05-14
申请人： Christian H. Post , George D. Megason , Brett D. Roscoe , Paul Santeler , John M. MacLaren , John E. Larson , Jeffery Galloway , Siamak Tavallaei , Tim W. Majni , Robert Allan Lester , Anisha Anand , Eric Rose
发明人： Christian H. Post , George D. Megason , Brett D. Roscoe , Paul Santeler , John M. MacLaren , John E. Larson , Jeffery Galloway , Siamak Tavallaei , Tim W. Majni , Robert Allan Lester , Anisha Anand , Eric Rose
IPC分类号： G08B23/00
CPC分类号： G06F13/4081 , G06F13/409
摘要： A processor-based device having a plurality of memory cartridges secured within a chassis by a lever system. The processor-based device comprises an indication system to indicate memory system operating conditions. Each memory cartridge has a protective assembly to protect memory elements within the memory cartridge when the memory cartridge is removed from the processor-based device. The processor-based device is operable such that at least one memory cartridge may be removed from the processor-based device without affecting operation of the processor-based device.

2. 发明授权

US06975241B2 Removable memory cartridge system for use with a server or other processor-based device 有权
标题翻译：可移动内存盒系统，用于与服务器或其他基于处理器的设备配合使用
公开(公告)号：US06975241B2
公开(公告)日：2005-12-13
申请号：US10438150
申请日：2003-05-14
申请人： Christian H. Post , George D. Megason , Brett D. Roscoe , Paul Santeler , John M. MacLaren , John E. Larson , Jeffery Galloway , Siamak Tavallaei , Tim W. Majni , Robert Allan Lester , Anisha Anand , Eric Rose
发明人： Christian H. Post , George D. Megason , Brett D. Roscoe , Paul Santeler , John M. MacLaren , John E. Larson , Jeffery Galloway , Siamak Tavallaei , Tim W. Majni , Robert Allan Lester , Anisha Anand , Eric Rose
IPC分类号： G06F13/16 , G06F13/40 , G08B13/14 , G08B23/00
CPC分类号： G06F13/4081 , G06F13/409
摘要： A processor-based device having a plurality of memory cartridges secured within a chassis by a lever system. The processor-based device comprises an indication system to indicate memory system operating conditions. Each memory cartridge has a protective assembly to protect memory elements within the memory cartridge when the memory cartridge is removed from the processor-based device. The processor-based device is operable such that at least one memory cartridge may be removed from the processor-based device without affecting operation of the processor-based device.
摘要翻译：一种基于处理器的设备，其具有通过杠杆系统固定在底盘内的多个存储器盒。基于处理器的设备包括用于指示存储器系统操作条件的指示系统。当从基于处理器的设备移除存储器盒时，每个存储器盒具有保护组件以保护存储器盒内的存储器元件。基于处理器的设备是可操作的，使得可以从基于处理器的设备移除至少一个存储盒，而不影响基于处理器的设备的操作。

3. 发明授权

US06608564B2 Removable memory cartridge system for use with a server or other processor-based device 有权
公开(公告)号：US06608564B2
公开(公告)日：2003-08-19
申请号：US09770100
申请日：2001-01-25
申请人： Christian H. Post , George D. Megason , Brett D. Roscoe , Paul Santeler , John M. MacLaren , John E. Larson , Jeffery Galloway , Siamak Tavallaei , Tim W. Majni , Robert Allan Lester , Anisha Anand , Eric Rose
发明人： Christian H. Post , George D. Megason , Brett D. Roscoe , Paul Santeler , John M. MacLaren , John E. Larson , Jeffery Galloway , Siamak Tavallaei , Tim W. Majni , Robert Allan Lester , Anisha Anand , Eric Rose
IPC分类号： G08B2300
CPC分类号： G06F13/4081 , G06F13/409
摘要： A processor-based device having a plurality of memory cartridges secured within a chassis by a lever system. The processor-based device comprises an indication system to indicate memory system operating conditions. Each memory cartridge has a protective assembly to protect memory elements within the memory cartridge when the memory cartridge is removed from the processor-based device. The processor-based device is operable such that at least one memory cartridge may be removed from the processor-based device without affecting operation of the processor-based device.

4. 发明授权

US06747563B2 Removable memory cartridge system for use with a server or other processor-based device 有权
标题翻译：可移动内存盒系统，用于与服务器或其他基于处理器的设备配合使用
公开(公告)号：US06747563B2
公开(公告)日：2004-06-08
申请号：US10437567
申请日：2003-05-14
申请人： Christian H. Post , George D. Megason , Brett D. Roscoe , Paul Santeler , John M. MacLaren , John E. Larson , Jeffery Galloway , Siamak Tavallaei , Tim W. Majni , Robert Allan Lester , Anisha Anand , Eric Rose
发明人： Christian H. Post , George D. Megason , Brett D. Roscoe , Paul Santeler , John M. MacLaren , John E. Larson , Jeffery Galloway , Siamak Tavallaei , Tim W. Majni , Robert Allan Lester , Anisha Anand , Eric Rose
IPC分类号： G08B2300
CPC分类号： G06F13/4081 , G06F13/409
摘要： A processor-based device having a plurality of memory cartridges secured within a chassis by a lever system. The processor-based device comprises an indication system to indicate memory system operating conditions. Each memory cartridge has a protective assembly to protect memory elements within the memory cartridge when the memory cartridge is removed from the processor-based device. The processor-based device is operable such that at least one memory cartridge may be removed from the processor-based device without affecting operation of the processor-based device.
摘要翻译：一种基于处理器的设备，其具有通过杠杆系统固定在底盘内的多个存储器盒。基于处理器的设备包括用于指示存储器系统操作条件的指示系统。当从基于处理器的设备移除存储器盒时，每个存储器盒具有保护组件以保护存储器盒内的存储器元件。基于处理器的设备是可操作的，使得可以从基于处理器的设备移除至少一个存储盒，而不影响基于处理器的设备的操作。

5. 发明授权

US07320086B2 Error indication in a raid memory system 失效
标题翻译：突袭存储系统中的错误指示
公开(公告)号：US07320086B2
公开(公告)日：2008-01-15
申请号：US11291243
申请日：2005-12-01
申请人： Tim Majni , Gary J. Piccirillo , John M. MacLaren , Robert A. Lester , John E. Larson , Jerome J. Johnson , Benjamin H. Clark , Patrick L. Ferguson , Siamak Tavallaei , Jeffrey S. Autor , Christian H. Post , Dan Fink , Jeffery Galloway , Bret D. Roscoe
发明人： Tim Majni , Gary J. Piccirillo , John M. MacLaren , Robert A. Lester , John E. Larson , Jerome J. Johnson , Benjamin H. Clark , Patrick L. Ferguson , Siamak Tavallaei , Jeffrey S. Autor , Christian H. Post , Dan Fink , Jeffery Galloway , Bret D. Roscoe
IPC分类号： G06F11/00
CPC分类号： G06F11/328 , G06F11/108 , G06F11/1092 , G06F2211/1052
摘要： A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules. The system implements error interrupt control, ECC error reporting, cartridge error power down procedures in response to command errors, storage of error information in unused segments of each DIMM, hot-pug procedure indicator and remote tagging capabilities of memory cartridges and DIMMs.
摘要翻译：计算机系统包括包含半导体存储器（诸如DIMM）的多个存储器模块。该系统包括主机/数据控制器，其利用XOR引擎以条带方式在多个存储器模块上存储数据和奇偶校验信息，以创建工业标准DIMM（RAID）的冗余阵列。主机/数据控制器还交织与多个存储器模块中的每一个相关联的多个通道上的数据。系统实施错误中断控制，ECC错误报告，响应命令错误的墨盒错误关闭程序，每个DIMM的未使用的段中的错误信息的存储，热插拔过程指示器和存储卡和DIMM的远程标记功能。

6. 发明授权

US07028213B2 Error indication in a raid memory system 有权
公开(公告)号：US07028213B2
公开(公告)日：2006-04-11
申请号：US09965883
申请日：2001-09-28
申请人： Tim Majni , Gary J. Piccirillo , John M. MacLaren , Robert A. Lester , John E. Larson , Jerome J. Johnson , Benjamin H. Clark , Patrick L. Ferguson , Siamak Tavallaei , Jeffrey S. Autor , Christian H. Post , Dan Fink , Jeffery Galloway , Bret D. Roscoe
发明人： Tim Majni , Gary J. Piccirillo , John M. MacLaren , Robert A. Lester , John E. Larson , Jerome J. Johnson , Benjamin H. Clark , Patrick L. Ferguson , Siamak Tavallaei , Jeffrey S. Autor , Christian H. Post , Dan Fink , Jeffery Galloway , Bret D. Roscoe
IPC分类号： G06F11/00
CPC分类号： G06F11/328 , G06F11/108 , G06F11/1092 , G06F2211/1052
摘要： A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules. The system implements error interrupt control, ECC error reporting, cartridge error power down procedures in response to command errors, storage of error information in unused segments of each DIMM, hot-pug procedure indicator and remote tagging capabilities of memory cartridges and DIMMs.

7. 发明申请

US20060085671A1 Error indication in a raid memory system 失效
标题翻译：突袭存储系统中的错误指示
公开(公告)号：US20060085671A1
公开(公告)日：2006-04-20
申请号：US11291243
申请日：2005-12-01
申请人： Tim Majni , Gary Piccirillo , John MacLaren , Robert Lester , John Larson , Jerome Johnson , Benjamin Clark , Patrick Ferguson , Siamak Tavallaei , Jeffrey Autor , Christian Post , Dan Zink , Jeffery Galloway , Bret Roscoe
发明人： Tim Majni , Gary Piccirillo , John MacLaren , Robert Lester , John Larson , Jerome Johnson , Benjamin Clark , Patrick Ferguson , Siamak Tavallaei , Jeffrey Autor , Christian Post , Dan Zink , Jeffery Galloway , Bret Roscoe
IPC分类号： G06F11/00
CPC分类号： G06F11/328 , G06F11/108 , G06F11/1092 , G06F2211/1052
摘要： A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules. The system implements error interrupt control, ECC error reporting, cartridge error power down procedures in response to command errors, storage of error information in unused segments of each DIMM, hot-pug procedure indicator and remote tagging capabilities of memory cartridges and DIMMs.
摘要翻译：计算机系统包括包含半导体存储器（诸如DIMM）的多个存储器模块。该系统包括主机/数据控制器，其利用XOR引擎以条带方式在多个存储器模块上存储数据和奇偶校验信息，以创建工业标准DIMM（RAID）的冗余阵列。主机/数据控制器还交织与多个存储器模块中的每一个相关联的多个通道上的数据。系统实施错误中断控制，ECC错误报告，响应命令错误的墨盒错误关闭程序，每个DIMM的未使用的段中的错误信息的存储，热插拔过程指示器和存储卡和DIMM的远程标记功能。

8. 发明申请

US20110225353A1 REDUNDANT ARRAY OF INDEPENDENT DISKS (RAID) WRITE CACHE SUB-ASSEMBLY 审中-公开
标题翻译：独立磁盘冗余阵列（RAID）写入缓存子组件
公开(公告)号：US20110225353A1
公开(公告)日：2011-09-15
申请号：US13126141
申请日：2008-10-30
申请人： Robert C Elliott , Joseph E. Foster , Siamak Tavallaei
发明人： Robert C Elliott , Joseph E. Foster , Siamak Tavallaei
IPC分类号： G06F12/00 , G06F12/08
CPC分类号： G06F12/0804 , G06F2212/2022
摘要： In at least some embodiments, a computing system includes a processor and a communication bus external to the processor. The computing system also includes a Redundant Array of Independent Disks (RAID) write cache sub-assembly coupled to the communication bus, the RAID write cache sub-assembly having non-volatile memory.
摘要翻译：在至少一些实施例中，计算系统包括处理器和处理器外部的通信总线。计算系统还包括耦合到通信总线的独立磁盘冗余阵列（RAID）写高速缓存子组件，该RAID写高速缓存子组件具有非易失性存储器。

9. 发明授权

US6134579A Semaphore in system I/O space 失效
标题翻译：系统I / O空间中的信号量
公开(公告)号：US6134579A
公开(公告)日：2000-10-17
申请号：US911842
申请日：1997-08-15
申请人： Siamak Tavallaei , Jeffrey S. Autor
发明人： Siamak Tavallaei , Jeffrey S. Autor
IPC分类号： G06F15/177 , G06F9/46 , G06F13/362 , G06F9/00
CPC分类号： G06F9/52 , G06F2209/503
摘要： A computer system utilizing multiple processes includes a semaphore for controlling exclusive access of a single process to a selected resource. The semaphore is implemented in the system input/output and controlled, at least in part, by an application specific integrated circuit (ASIC). When a process is attempting to acquire an I/O resource, a read is sent to the semaphore. If the resource is available the semaphore will have a first value, and the semaphore will return that first value to the process indicating that the process has acquired the resource. The ASIC will then change the semaphore value to a second value. If the resource is not available the semaphore will have the second value, and the semaphore will return the second value to the process indicating that the resource is not available.
摘要翻译：利用多个进程的计算机系统包括用于控制单个进程对所选资源的独占访问的信号量。信号量在系统输入/输出中实现，至少部分地由专用集成电路（ASIC）控制。当进程尝试获取I / O资源时，会将读取信息发送到信号量。如果资源可用，则信号量将具有第一个值，并且信号量将返回该指示进程已获取资源的进程的第一个值。然后，ASIC将信号量值更改为第二个值。如果资源不可用，则信号量将具有第二个值，并且信号量将将第二个值返回给指示资源不可用的进程。

10. 发明申请

US20140211544A1 APPARATUS TO STORE DATA AND METHODS TO READ MEMORY CELLS 有权
标题翻译：存储数据的装置和读取记忆细胞的方法
公开(公告)号：US20140211544A1
公开(公告)日：2014-07-31
申请号：US14342431
申请日：2011-09-02
申请人： Siamak Tavallaei
发明人： Siamak Tavallaei
IPC分类号： G11C13/00
CPC分类号： G11C13/004 , G11C5/04 , G11C13/0007 , G11C13/0033 , G11C13/0069 , G11C2013/0045 , G11C2013/0047 , G11C2013/0073
摘要： Apparatus to store data and methods to read memory cells are disclosed. A disclosed example method involves, during a read cycle of a memory cell, applying a current across the memory cell to read a content of the memory cell. During a subsequent read cycle of the memory cell, a subsequent current is applied across the memory cell in the opposite direction to read the content of the memory cell.
摘要翻译：公开了存储用于读取存储器单元的数据和方法的装置。所公开的示例性方法涉及在存储器单元的读取周期期间，跨过存储器单元施加电流以读取存储器单元的内容。在存储器单元的随后的读取周期期间，沿相反方向跨越存储器单元施加随后的电流以读取存储器单元的内容。

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