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1. 发明申请

US20070174511A1 Transmit rate pacing system and method 有权
标题翻译：发送速率起搏系统及方法
公开(公告)号：US20070174511A1
公开(公告)日：2007-07-26
申请号：US11329444
申请日：2006-01-11
申请人： Ching Yu , David Riddoch , Steve Pope , John Chiang , Alok Singh , Derek Roberts
发明人： Ching Yu , David Riddoch , Steve Pope , John Chiang , Alok Singh , Derek Roberts
IPC分类号： G06F3/00
CPC分类号： G06F13/28
摘要： System and method of a pace engine for governing the different transmission rates tailored for different connections by rate pacing a plurality of queues are described. Roughly described, the pace engine includes a binning controller for receiving queues from a transmit DMA queue manager and determines the earliest allowed time for a particular queue that is stored and paced in a Work Bin, a Fast Bin, or a Slow Bin. A pace table stores information about the minimum inter-packet-gap for each connection that is coupled to the transmit DMA queue manager. A timer is coupled to the binning controller with a multi-bit continuous counter that increments at a predetermined time unit and wraps around after a predetermined amount of time.
摘要翻译：描述了用于通过速率起搏多个队列来为不同连接量身定制的不同传输速率的步调引擎的系统和方法。粗略地描述，速度引擎包括用于从发送DMA队列管理器接收队列的分档控制器，并且确定在工作仓，快速仓或慢速仓中存储和起搏的特定队列的最早允许时间。步速表存储关于耦合到发送DMA队列管理器的每个连接的最小间隔间隔的信息。定时器与具有多位连续计数器的分箱控制器耦合，该计数器以预定时间单位递增并在预定时间量之后卷绕。

2. 发明授权

US07596644B2 Transmit rate pacing system and method 有权
标题翻译：发送速率起搏系统及方法
公开(公告)号：US07596644B2
公开(公告)日：2009-09-29
申请号：US11329444
申请日：2006-01-11
申请人： Ching Yu , David Riddoch , Steve Pope , John Mingyung Chiang , Alok Singh , Derek Roberts
发明人： Ching Yu , David Riddoch , Steve Pope , John Mingyung Chiang , Alok Singh , Derek Roberts
IPC分类号： G06F3/00
CPC分类号： G06F13/28
摘要： System and method of a pace engine for governing the different transmission rates tailored for different connections by rate pacing a plurality of queues are described. Roughly described, the pace engine includes a binning controller for receiving queues from a transmit DMA queue manager and determines the earliest allowed time for a particular queue that is stored and paced in a Work Bin, a Fast Bin, or a Slow Bin. A pace table stores information about the minimum inter-packet-gap for each connection that is coupled to the transmit DMA queue manager. A timer is coupled to the binning controller with a multi-bit continuous counter that increments at a predetermined time unit and wraps around after a predetermined amount of time.
摘要翻译：描述了用于通过速率起搏多个队列来为不同连接量身定制的不同传输速率的步调引擎的系统和方法。粗略地描述，速度引擎包括用于从发送DMA队列管理器接收队列的分档控制器，并且确定在工作仓，快速仓或慢速仓中存储和起搏的特定队列的最早允许时间。步速表存储关于耦合到发送DMA队列管理器的每个连接的最小间隔间隔的信息。定时器与具有多位连续计数器的分箱控制器耦合，该计数器以预定时间单位递增并在预定时间量之后卷绕。

3. 发明申请

US20070115982A1 Hashing algorithm for network receive filtering 有权
标题翻译：用于网络接收过滤的哈希算法
公开(公告)号：US20070115982A1
公开(公告)日：2007-05-24
申请号：US11255124
申请日：2005-10-20
申请人： Steve Pope , Derek Roberts , David Riddoch , Ching Yu , John Chiang , Der-Ren Chu
发明人： Steve Pope , Derek Roberts , David Riddoch , Ching Yu , John Chiang , Der-Ren Chu
IPC分类号： H04L12/56
CPC分类号： G06F17/30867 , G06F17/30864 , H04L45/742 , H04L45/745 , H04L47/2441 , H04L47/621 , H04L49/90 , H04L67/10 , H04L69/16 , H04L69/161 , H04L69/162 , H04L69/163 , H04L69/164 , H04L69/22 , Y10S707/922
摘要： Roughly described, a network interface device is assigned a maximum extent-of-search. A hash function is applied to the header information of each incoming packet, to generate a hash code for the packet. The hash code designates a particular subset of the table within which the particular header information should be found, and an iterative search is made within that subset. If the search locates a matching entry before the search limit is exceeded, then the incoming data packet is delivered to the receive queue identified in the matching entry. But if the search reaches the search limit before a matching entry is located, then device delivers the packet to a default queue, such as a kernel queue, in the host computer system. The kernel is then responsible for delivering the packet to the correct endpoint.
摘要翻译：大致描述了网络接口设备被分配最大的搜索范围。散列函数被应用于每个输入分组的报头信息，以产生分组的哈希码。哈希代码指定在其中应当找到特定头部信息的表的特定子集，并且在该子集内进行迭代搜索。如果搜索在超出搜索限制之前找到匹配的条目，则传入数据包将被传递到匹配条目中标识的接收队列。但是，如果在找到匹配的条目之前搜索达到搜索限制，则设备会将数据包传递到主机系统中的默认队列（如内核队列）。然后，内核负责将数据包传递到正确的端点。

4. 发明申请

US20060174251A1 Transmit completion event batching 有权
公开(公告)号：US20060174251A1
公开(公告)日：2006-08-03
申请号：US11050483
申请日：2005-02-03
申请人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts , John Chiang
发明人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts , John Chiang
IPC分类号： G06F9/46
CPC分类号： H04L49/9047 , H04L49/90 , H04L49/901
摘要： Method for managing a data transmit queue, for use with a host and a network interface device. Roughly described, the host writes data buffer descriptors into a transmit descriptor queue, and the network interface device writes events to notify the host when it has completed processing of a transmit data buffer. Each of the transmit completion event descriptors notify the host of completion of a plurality of the transmit data buffers.

5. 发明申请

US20060288129A1 DMA descriptor queue read and cache write pointer arrangement 有权
公开(公告)号：US20060288129A1
公开(公告)日：2006-12-21
申请号：US11156228
申请日：2005-06-17
申请人： Steve Pope , Derek Roberts , David Riddoch , Ching Yu , John Chiang , Der-Ren Chu
发明人： Steve Pope , Derek Roberts , David Riddoch , Ching Yu , John Chiang , Der-Ren Chu
IPC分类号： G06F13/28
CPC分类号： H04L49/901 , G06F13/28 , G06F13/385 , H04L49/90
摘要： Method and apparatus for retrieving buffer descriptors from a host memory for use by a peripheral device. In an embodiment, a peripheral device such as a NIC includes a plurality of buffer descriptor caches each corresponding to a respective one of a plurality of host memory descriptor queues, and a plurality of queue descriptors each corresponding to a respective one of the host memory descriptor queues. Each of the queue descriptors includes a host memory read address pointer for the corresponding descriptor queue, and this same read pointer is used to derive algorithmically the descriptor cache write addresses at which to write buffer descriptors retrieved from the corresponding host memory descriptor queue.

6. 发明授权

US07634584B2 Packet validation in virtual network interface architecture 有权
标题翻译：虚拟网络接口架构中的数据包验证
公开(公告)号：US07634584B2
公开(公告)日：2009-12-15
申请号：US11116018
申请日：2005-04-27
申请人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts
发明人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts
IPC分类号： G06F15/16
CPC分类号： H04L63/10 , H04L47/50 , H04L49/90 , H04L49/901 , H04L49/9031 , H04L49/9063
摘要： Roughly described, a network interface device receiving data packets from a computing device for transmission onto a network, the data packets having a certain characteristic, transmits the packet only if the sending queue has authority to send packets having that characteristic. The data packet characteristics can include transport protocol number, source and destination port numbers, source and destination IP addresses, for example. Authorizations can be programmed into the NIC by a kernel routine upon establishment of the transmit queue, based on the privilege level of the process for which the queue is being established. In this way, a user process can use an untrusted user-level protocol stack to initiate data transmission onto the network, while the NIC protects the remainder of the system or network from certain kinds of compromise.
摘要翻译：大体上描述了一种从计算设备接收数据包以便传输到网络上的网络接口设备，具有一定特性的数据分组仅在发送队列具有发送具有该特性的分组的权限时发送分组。数据包特征可以包括传输协议号，源和目的端口号，源和目的IP地址。基于建立队列的进程的权限级别，可以通过内核例程在建立传输队列时将授权编程到NIC中。以这种方式，用户进程可以使用不受信任的用户级协议栈来发起到网络上的数据传输，而NIC保护系统或网络的其余部分免受某些种类的折中。

7. 发明授权

US07610413B2 Queue depth management for communication between host and peripheral device 有权
标题翻译：主机和外围设备之间通信的队列深度管理
公开(公告)号：US07610413B2
公开(公告)日：2009-10-27
申请号：US11050419
申请日：2005-02-03
申请人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts
发明人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts
IPC分类号： G09F3/00 , G06F3/01
CPC分类号： G06F13/24 , G06F13/385 , G06F13/4282
摘要： Method for managing a queue in host memory for use with a peripheral device. Roughly described, the host makes a determination of the availability of space in the queue for writing new entries, in dependence upon historical knowledge of the number of queue entries that the host has authorized the device to write, and the number of entries that the host has consumed. In dependence on that determination, the host authorizes the device to write a limited number of new entries into the queue. The device writes entries into the queue dependence upon the number authorized. The host maintains a read pointer into the queue but does not need to maintain a write pointer, and the peripheral device maintains a write pointer into the queue but does not need to maintain a read pointer.
摘要翻译：用于管理主机存储器中用于外围设备的队列的方法。粗略地描述，主机根据主机授权设备写入的队列条目的数量的历史知识以及主机的条目数量来确定队列中用于写入新条目的空间的可用性已消耗根据该确定，主机授权设备将有限数量的新条目写入队列。设备根据授权的数量将条目写入队列。主机将读指针保留在队列中，但不需要维护写指针，外围设备将写入指针保持在队列中，但不需要维护读指针。

8. 发明授权

US07769923B2 Interrupt management for multiple event queues 有权
标题翻译：多个事件队列的中断管理
公开(公告)号：US07769923B2
公开(公告)日：2010-08-03
申请号：US11050476
申请日：2005-02-03
申请人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts
发明人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts
IPC分类号： G06F3/00 , G06F13/28
CPC分类号： G06F13/24 , G06F13/385 , G06F13/4282
摘要： Method of managing interaction between a host subsystem and a peripheral device. Roughly described, the peripheral device writes an event into an individual event queue, and in conjunction therewith, also writes a wakeup event into an intermediary event queue. The wakeup event identifies the individual event queue. The host subsystem, in response to retrieval of the wakeup event from the intermediary event queue, activates an individual event handler to consume events from the individual event queue.
摘要翻译：管理主机子系统和外围设备之间的交互的方法。粗略描述，外围设备将事件写入单个事件队列中，并且与之结合，还将唤醒事件写入中间事件队列。唤醒事件标识单个事件队列。响应于从中间事件队列检索唤醒事件，主机子系统激活单独的事件处理程序以从各个事件队列消耗事件。

9. 发明授权

US07562366B2 Transmit completion event batching 有权
标题翻译：传输完成事件批处理
公开(公告)号：US07562366B2
公开(公告)日：2009-07-14
申请号：US11050483
申请日：2005-02-03
申请人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts , John Mingyung Chiang
发明人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts , John Mingyung Chiang
IPC分类号： G06F3/00 , G06F9/44 , G06F9/46 , G06F13/00
CPC分类号： H04L49/9047 , H04L49/90 , H04L49/901
摘要： Method for managing a data transmit queue, for use with a host and a network interface device. Roughly described, the host writes data buffer descriptors into a transmit descriptor queue, and the network interface device writes events to notify the host when it has completed processing of a transmit data buffer. Each of the transmit completion event descriptors notify the host of completion of a plurality of the transmit data buffers.
摘要翻译：用于管理与主机和网络接口设备一起使用的数据传输队列的方法。大致描述，主机将数据缓冲区描述符写入发送描述符队列，并且网络接口设备写入事件以在完成处理发送数据缓冲区时通知主机。每个发送完成事件描述符通知主机多个发送数据缓冲器的完成。

10. 发明申请

US20060173970A1 Including descriptor queue empty events in completion events 有权
标题翻译：在完成事件中包括描述符队列空事件
公开(公告)号：US20060173970A1
公开(公告)日：2006-08-03
申请号：US11050474
申请日：2005-02-03
申请人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts
发明人： Steve Pope , David Riddoch , Ching Yu , Derek Roberts
IPC分类号： G06F15/167
CPC分类号： G06F9/4812 , G06F13/28 , G06F13/32 , G06F13/385
摘要： Roughly described, method for managing data transmission between a host subsystem and a network interface device, in which the host writes data buffer descriptors into a DMA descriptor queue, and the network interface device writes completion events to notify the host when it has completed processing of data buffers. Each of the completion event descriptors notify the host of completion of data transfer between the NIC and one or more of the data buffers, and can also embed a queue empty notification inside the completion event.
摘要翻译：粗略地描述了用于管理主机子系统和网络接口设备之间的数据传输的方法，其中主机将数据缓冲器描述符写入DMA描述符队列，并且网络接口设备写入完成事件以在主机完成处理数据缓冲区。每个完成事件描述符通知主机NIC和一个或多个数据缓冲区之间的数据传输完成，并且还可以在完成事件中嵌入队列空通知。

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