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1. 发明申请

US20080061343A1 Metal-oxide-metal structure with improved capacitive coupling area 审中-公开
标题翻译：具有改善电容耦合面积的金属氧化物 - 金属结构
公开(公告)号：US20080061343A1
公开(公告)日：2008-03-13
申请号：US11518470
申请日：2006-09-08
申请人： Chin Kun Lan , Sheng-Wen Chen , Hung Jui Chang , Yu-Ku Lin , Ying-Lang Wang
发明人： Chin Kun Lan , Sheng-Wen Chen , Hung Jui Chang , Yu-Ku Lin , Ying-Lang Wang
IPC分类号： H01L29/94
CPC分类号： H01L23/5223 , H01L28/60 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A stacked metal-oxide-metal (MOM) capacitor structure and method of forming the same to increase an electrode/capacitor dielectric coupling area to increase a capacitance, the MOM capacitor structure including a plurality of metallization layers in stacked relationship; wherein each metallization layer includes substantially parallel spaced apart conductive electrode line portions having a first intervening capacitor dielectric; and, wherein the conductive electrode line portions are electrically interconnected between metallization layers by conductive damascene line portions formed in a second capacitor dielectric and disposed underlying the conductive electrode line portions.
摘要翻译：一种堆叠的金属氧化物金属（MOM）电容器结构及其形成方法，以增加电极/电容器介质耦合面积以增加电容，所述MOM电容器结构包括堆叠关系的多个金属化层; 其中每个金属化层包括具有第一中间电容器电介质的基本上平行的隔开的导电电极线部分; 并且其中所述导电电极线部分通过形成在第二电容器电介质中并设置在所述导电电极线部分下方的导电镶嵌线部分在金属化层之间电互连。

2. 发明授权

US07955993B2 Oxygen plasma reduction to eliminate precursor overflow in BPTEOS film deposition 有权
标题翻译：氧气等离子体还原以消除BPTEOS薄膜沉积中的前体溢出
公开(公告)号：US07955993B2
公开(公告)日：2011-06-07
申请号：US12478493
申请日：2009-06-04
申请人： Chin Kun Lan , Sheng-Wen Chen , Hung Jui Chang , Yu-Ku Lin , Ying-Lang Wang
发明人： Chin Kun Lan , Sheng-Wen Chen , Hung Jui Chang , Yu-Ku Lin , Ying-Lang Wang
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/31625 , H01L21/02129 , H01L21/02271 , H01L21/0234 , H01L21/3105 , H01L21/76826
摘要： A method including providing a semiconductor substrate in a reaction chamber; flowing a first reactant including silicon and oxygen, a boron dopant and a phosphorus dopant into the reaction chamber so that a layer of BPTEOS is deposited on the semiconductor substrate; stopping the flow of the first reactant, boron dopant and phosphorus dopant into the reaction chamber and so that a phosphorus dopant and boron dopant rich film is deposited over the layer of BPTEOS; and reducing the film comprising exposing the film to an O2 plasma.
摘要翻译：一种包括在反应室中提供半导体衬底的方法; 将包括硅和氧的第一反应物，硼掺杂剂和磷掺杂剂流动到反应室中，使得在半导体衬底上沉积BPTEOS层; 阻止第一反应物，硼掺杂剂和磷掺杂剂流入反应室，使得磷掺杂剂和硼掺杂剂富含膜沉积在BPTEOS层上; 并且还原膜包括将膜暴露于O 2等离子体。

3. 发明申请

US20100311252A1 OXYGEN PLASMA REDUCTION TO ELIMINATE PRECURSOR OVERFLOW IN BPTEOS FILM DEPOSITION 有权
标题翻译：消除BPTEOS膜沉积中前体溢出的氧气等离子体减少
公开(公告)号：US20100311252A1
公开(公告)日：2010-12-09
申请号：US12478493
申请日：2009-06-04
申请人： Chin Kun Lan , Sheng-Wen Chen , Hung Jui Chang , Yu-Ku Lin , Ying-Lang Wang
发明人： Chin Kun Lan , Sheng-Wen Chen , Hung Jui Chang , Yu-Ku Lin , Ying-Lang Wang
IPC分类号： H01L21/283 , H01L21/285
CPC分类号： H01L21/31625 , H01L21/02129 , H01L21/02271 , H01L21/0234 , H01L21/3105 , H01L21/76826
摘要： A method including providing a semiconductor substrate in a reaction chamber; flowing a first reactant including silicon and oxygen, a boron dopant and a phosphorus dopant into the reaction chamber so that a layer of BPTEOS is deposited on the semiconductor substrate; stopping the flow of the first reactant, boron dopant and phosphorus dopant into the reaction chamber and so that a phosphorus dopant and boron dopant rich film is deposited over the layer of BPTEOS; and reducing the film comprising exposing the film to an O2 plasma.
摘要翻译：一种包括在反应室中提供半导体衬底的方法; 将包括硅和氧的第一反应物，硼掺杂剂和磷掺杂剂流动到反应室中，使得在半导体衬底上沉积BPTEOS层; 阻止第一反应物，硼掺杂剂和磷掺杂剂流入反应室，使得磷掺杂剂和富含硼的掺杂剂的膜沉积在BPTEOS层上; 并且还原膜包括将膜暴露于O 2等离子体。

4. 发明申请

US20070205516A1 Low-k dielectric layer, semiconductor device, and method for fabricating the same 审中-公开
标题翻译：低k电介质层，半导体器件及其制造方法
公开(公告)号：US20070205516A1
公开(公告)日：2007-09-06
申请号：US11364088
申请日：2006-03-01
申请人： Kei-Wei Chen , Sheng-Wen Chen , Shiu-Ko Jangjian , Shih-Ho Lin , Hung-Jui Chang , Yu-Ku Lin , Ying-Lang Wang
发明人： Kei-Wei Chen , Sheng-Wen Chen , Shiu-Ko Jangjian , Shih-Ho Lin , Hung-Jui Chang , Yu-Ku Lin , Ying-Lang Wang
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/53295 , H01L21/02126 , H01L21/022 , H01L21/0234 , H01L21/3121 , H01L21/3146 , H01L21/31633 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/53271 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： Low-k dielectric layer, semiconductor device, and method for fabricating the same. The low-k dielectric layer comprises a hardened sub-layer sandwiched by two low-k dielectric sub-layers. The hardened sub-layer is formed by a method comprising bombarding the underlying low-k dielectric sub-layer utilizing hydrogen plasma or inert gas plasma. The semiconductor device comprises the low-k dielectric layer overlying an etch stop layer overlying a substrate, and a conductive material embedded in the dielectric layer and the etch stop layer, electrically connecting to the substrate.
摘要翻译：低k电介质层，半导体器件及其制造方法。低k电介质层包括夹在两个低k电介质子层之间的硬化子层。硬化的子层通过利用氢等离子体或惰性气体等离子体轰击下面的低k电介质子层的方法形成。半导体器件包括覆盖衬底上的蚀刻停止层的低k电介质层，以及电连接到衬底的埋入电介质层和蚀刻停止层中的导电材料。

5. 发明申请

US20050074554A1 Method of forming inter-metal dielectric layer structure 审中-公开
标题翻译：形成金属间介电层结构的方法
公开(公告)号：US20050074554A1
公开(公告)日：2005-04-07
申请号：US10679764
申请日：2003-10-06
申请人： Shiu-Ko Jangjian , Sheng-Wen Chen , Miao-Cheng Liao , Hung-Jui Chang , Ming-Hui Lin , Ying-Lang Wang
发明人： Shiu-Ko Jangjian , Sheng-Wen Chen , Miao-Cheng Liao , Hung-Jui Chang , Ming-Hui Lin , Ying-Lang Wang
IPC分类号： B32B17/06 , C23C16/26 , C23C16/40 , C23C16/56 , H01L21/316
CPC分类号： H01L21/02126 , C23C16/401 , C23C16/56 , H01L21/02167 , H01L21/0217 , H01L21/022 , H01L21/02211 , H01L21/02271 , H01L21/31629 , H01L21/31633
摘要： A inter-metal dielectric layer structure and the method of the same are provided. The method includes the following steps. A process gas is introduced to form a low-k dielectric layer over the substrate. A reactant gas is in situ introduced to etch the low-k dielectric layer back and to react with the process gas to form a dielectric layer containing an extra element on the low-k dielectric layer. The extra element is provided by the reactant gas. A volume ratio of the reactant gas to the process gas is larger than about 2. The reactant gas may be a nitrogen fluoride (NF3) gas for providing extra nitrogen (N) or a carbon fluoride (CxFy) gas for providing extra carbon (C).
摘要翻译：提供金属间介电层结构及其方法。该方法包括以下步骤。引入工艺气体以在衬底上形成低k电介质层。原位引入反应气体以将低k电介质层回蚀刻并与工艺气体反应，形成在低k电介质层上含有额外元素的电介质层。额外的元素由反应物气体提供。反应气体与工艺气体的体积比大于约2.反应气体可以是用于提供额外的氮（N）或氟化碳（C x F y）气体的氮氟化物（NF 3）气体，用于提供额外的碳（C ）。

6. 发明授权

US07207339B2 Method for cleaning a plasma enhanced CVD chamber 有权
标题翻译：清洁等离子体增强CVD室的方法
公开(公告)号：US07207339B2
公开(公告)日：2007-04-24
申请号：US10738740
申请日：2003-12-17
申请人： Sheng-Wen Chen , Shiu-Ko Jangjian , Hung-Jui Chang , Ying-Lang Wang
发明人： Sheng-Wen Chen , Shiu-Ko Jangjian , Hung-Jui Chang , Ying-Lang Wang
IPC分类号： B08B9/00 , B08B6/00
CPC分类号： C23C16/4405 , B08B7/00 , H01L21/67069 , Y10S134/902 , Y10S438/905
摘要： A method for plasma cleaning a CVD reactor chamber including providing a plasma enhanced CVD reactor chamber comprising residual deposited material; performing a first plasma process comprising an oxygen containing plasma; performing a second plasma process comprising an argon containing plasma; and, performing a third plasma process comprising a fluorine containing plasma.
摘要翻译：一种用于等离子体清洗CVD反应器室的方法，包括提供包含残余沉积材料的等离子体增强CVD反应器室; 执行包含含氧等离子体的第一等离子体工艺; 执行包括含氩等离子体的第二等离子体工艺; 以及执行包括含氟等离子体的第三等离子体工艺。

7. 发明申请

US20060292859A1 Damascene process using dielectic layer containing fluorine and nitrogen 审中-公开
标题翻译：使用含氟和氮的介电层的镶嵌工艺
公开(公告)号：US20060292859A1
公开(公告)日：2006-12-28
申请号：US11166237
申请日：2005-06-27
申请人： Shiu-Ko Jian , Sheng-Wen Chen , Hung-Jui Chang , Ying-Lang Wang
发明人： Shiu-Ko Jian , Sheng-Wen Chen , Hung-Jui Chang , Ying-Lang Wang
IPC分类号： H01L21/4763
CPC分类号： H01L21/76808 , H01L21/02131 , H01L21/0214 , H01L21/02211 , H01L21/02271 , H01L21/3144 , H01L21/31629
摘要： An improved damascene process for fabricating a semiconductor device. A dielectric layer comprising at least both fluorine and nitrogen is formed overlying a substrate, in which a nitrogen content in the dielectric layer is about 5% to 10%. The dielectric layer is subsequently pattered to form at least one damascene opening therein. A metal layer is formed overlying the dielectric layer and fills the damascene opening. The excess metal layer on the dielectric layer is removed to leave the metal layer in the damascene opening. A semiconductor device with the same damascene structure is also disclosed.
摘要翻译：用于制造半导体器件的改进的镶嵌工艺。形成至少包含氟和氮两者的电介质层，覆盖在基底中，其中介电层中的氮含量为约5％至10％。随后图案化介电层以在其中形成至少一个镶嵌开口。形成覆盖在电介质层上的金属层并填充镶嵌开口。去除电介质层上的多余的金属层，使金属层离开镶嵌开口。还公开了具有相同镶嵌结构的半导体器件。

8. 发明申请

US20050155625A1 Chamber cleaning method 审中-公开
标题翻译：室内清洗方式
公开(公告)号：US20050155625A1
公开(公告)日：2005-07-21
申请号：US10761654
申请日：2004-01-20
申请人： Shiu-Ko Jangjian , Sheng-Wen Chen , Hung-Jui Chang , Chen-Liang Chang , Ying-Lang Wang
发明人： Shiu-Ko Jangjian , Sheng-Wen Chen , Hung-Jui Chang , Chen-Liang Chang , Ying-Lang Wang
IPC分类号： B08B7/00 , B08B7/02 , B08B9/00 , B08B9/08 , C23C16/44
CPC分类号： C23C16/4405 , B08B7/00
摘要： A method suitable for cleaning the interior surfaces of a process chamber is disclosed. The invention is particularly effective in removing silicon nitride and silicon dioxide residues from the interior surfaces of a chemical vapor deposition (CVD) chamber. The method includes reacting nitrous oxide (N2O) gas with nitrogen trifluoride (NF3) gas in a plasma to generate nitric oxide (NO) and fluoride (F) radicals. Due to the increased density of nitric oxide radicals generated from the nitrous oxide, the etch and removal rate of the residues on the interior surfaces of the chamber is enhanced. Consequently, the quantity of nitrogen trifluoride necessary to efficiently and expeditiously carry out the chamber cleaning process is reduced.
摘要翻译：公开了一种适于清洁处理室内表面的方法。本发明特别有效地从化学气相沉积（CVD）室的内表面去除氮化硅和二氧化硅残余物。该方法包括在等离子体中使一氧化二氮（N 2 O 2 O）气体与三氟化氮（NF 3 N 3）气体反应以产生一氧化氮（NO）和氟化物（F）基团。由于由一氧化二氮产生的一氧化氮自由基的密度增加，腔室内表面上残留物的蚀刻和去除速度增强。因此，有效且快速地进行室清洁处理所需的三氟化氮的量减少。

9. 发明申请

US20050133059A1 Method for cleaning a plasma enhanced CVD chamber 有权
标题翻译：清洁等离子体增强CVD室的方法
公开(公告)号：US20050133059A1
公开(公告)日：2005-06-23
申请号：US10738740
申请日：2003-12-17
申请人： Sheng-Wen Chen , Shiu-Ko Jangjian , Hung-Jui Chang , Ying-Lang Wang
发明人： Sheng-Wen Chen , Shiu-Ko Jangjian , Hung-Jui Chang , Ying-Lang Wang
IPC分类号： B08B6/00 , B08B7/00 , C23C16/44 , H01L21/00 , H01L21/30 , H01L21/3065
CPC分类号： C23C16/4405 , B08B7/00 , H01L21/67069 , Y10S134/902 , Y10S438/905
摘要： A method for plasma cleaning a CVD reactor chamber including providing a plasma enhanced CVD reactor chamber comprising residual deposited material; performing a first plasma process comprising an oxygen containing plasma; performing a second plasma process comprising an argon containing plasma; and, performing a third plasma process comprising a fluorine containing plasma.
摘要翻译：一种用于等离子体清洗CVD反应器室的方法，包括提供包含残余沉积材料的等离子体增强CVD反应器室; 执行包含含氧等离子体的第一等离子体工艺; 执行包括含氩等离子体的第二等离子体工艺; 以及执行包括含氟等离子体的第三等离子体工艺。

10. 发明授权

US08840297B2 Back-light module 有权
标题翻译：背光模块
公开(公告)号：US08840297B2
公开(公告)日：2014-09-23
申请号：US13353325
申请日：2012-01-19
申请人： Wen-Kuei Liu , Sheng-Wen Chen
发明人： Wen-Kuei Liu , Sheng-Wen Chen
IPC分类号： F21V7/04 , F21V8/00
CPC分类号： G02B6/0021 , G02B6/0018 , G02B6/0068
摘要： A back-light module including a light guide plate (LGP), first light-emitting devices, and second light-emitting devices is provided. The LGP has a top-emitting surface, a bottom surface and a side surface. The LGP has at least one indentation. The indentation has a first light-incident sidewall and a pair of second light-incident sidewalls. The second light-incident sidewalls are located on two sides of the first light-incident sidewall and adjacent to the first light-incident sidewall. Normal vectors of the second light-incident sidewalls and the first light-incident sidewall are not parallel. The first light-emitting devices are located in the indentation, and a first light beam propagating toward the first light-incident sidewall is emitted from each of the first light-emitting devices. The second light-emitting devices are located in the indentation, and a second light beam propagating toward one of the second light-incident sidewalls is emitted from each of the second light-emitting devices.
摘要翻译：提供了包括导光板（LGP），第一发光器件和第二发光器件的背光模块。 LGP具有顶部发射表面，底表面和侧表面。 LGP至少有一个缩进。凹陷具有第一光入射侧壁和一对第二光入射侧壁。第二光入射侧壁位于第一光入射侧壁的两侧并与第一光入射侧壁相邻。第二光入射侧壁和第一光入射侧壁的法线矢量不平行。第一发光装置位于凹陷中，并且朝向第一入光侧壁传播的第一光束从每个第一发光装置发射。第二发光器件位于压痕中，并且从第二发光器件的每一个发射朝向第二光入射侧壁中的一个传播的第二光束。

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