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1. 发明申请

US20050247988A1 Semiconductor device and method for fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050247988A1
公开(公告)日：2005-11-10
申请号：US11183756
申请日：2005-07-19
申请人： Chikako Yoshida , Hiroshi Minakata , Masaomi Yamaguchi , Shinji Miyagaki , Yasuyuki Tamura
发明人： Chikako Yoshida , Hiroshi Minakata , Masaomi Yamaguchi , Shinji Miyagaki , Yasuyuki Tamura
IPC分类号： H01L21/316 , H01L21/28 , H01L21/3205 , H01L21/336 , H01L29/51 , H01L29/78 , H01L31/0328 , H01L31/113
CPC分类号： H01L29/513 , H01L21/28194 , H01L21/32055 , H01L29/517 , H01L29/6659
摘要： The semiconductor device comprises a gate insulating film including a first dielectric film of HfxAl1-xOy (0.7
摘要翻译：该半导体器件包括栅极绝缘膜，该栅极绝缘膜包括第一绝缘膜，其具有第一绝缘膜和第二绝缘膜，形成在半导体衬底上，以及与形成在第一电介质膜上的第一电介质膜不同的第二电介质膜; 以及形成在栅极绝缘膜上并包括多晶硅膜的栅电极，从而防止了在形成多晶硅膜的过程中多晶硅膜的局部异常生长，并且栅极漏电流可以大大降低。

2. 发明授权

US07741684B2 Semiconductor device and method for fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07741684B2
公开(公告)日：2010-06-22
申请号：US11183756
申请日：2005-07-19
申请人： Chikako Yoshida , Hiroshi Minakata , Masaomi Yamaguchi , Shinji Miyagaki , Yasuyuki Tamura
发明人： Chikako Yoshida , Hiroshi Minakata , Masaomi Yamaguchi , Shinji Miyagaki , Yasuyuki Tamura
IPC分类号： H01L27/088 , H01L29/78
CPC分类号： H01L29/513 , H01L21/28194 , H01L21/32055 , H01L29/517 , H01L29/6659
摘要： The semiconductor device comprises a gate insulating film including a first dielectric film of HfxAl1-xOy (0.7
摘要翻译：半导体器件包括栅极绝缘膜，该栅极绝缘膜包括在半导体衬底上形成的Hf x Al 1-x O y（0.7

3. 发明授权

US06946351B2 Method for fabricating a semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US06946351B2
公开(公告)日：2005-09-20
申请号：US10768090
申请日：2004-02-02
申请人： Chikako Yoshida , Hiroshi Minakata , Masaomi Yamaguchi , Shinji Miyagaki , Yasuyuki Tamura
发明人： Chikako Yoshida , Hiroshi Minakata , Masaomi Yamaguchi , Shinji Miyagaki , Yasuyuki Tamura
IPC分类号： H01L21/316 , H01L21/28 , H01L21/3205 , H01L21/336 , H01L29/51 , H01L29/78 , H01L31/0328 , H01L31/113
CPC分类号： H01L29/513 , H01L21/28194 , H01L21/32055 , H01L29/517 , H01L29/6659
摘要： The semiconductor device comprises a gate insulating film including a first dielectric film of HfxAl1−xOy (0.7
摘要翻译：该半导体器件包括栅极绝缘膜，该栅极绝缘膜包括第一绝缘膜，其具有第一绝缘膜和第二绝缘膜，形成在半导体衬底上，以及与形成在第一电介质膜上的第一电介质膜不同的第二电介质膜; 以及形成在栅极绝缘膜上并包括多晶硅膜的栅电极，从而防止了在形成多晶硅膜的过程中多晶硅膜的局部异常生长，并且栅极漏电流可以大大降低。

4. 发明授权

US06780699B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06780699B2
公开(公告)日：2004-08-24
申请号：US10359250
申请日：2003-02-06
申请人： Yasuyuki Tamura , Yusuke Morisaki , Yoshihiro Sugita , Kiyoshi Irino , Takayuki Aoyama , Chikako Yoshida , Yoshihiro Sugiyama , Hitoshi Tanaka , Kanetake Takasaki
发明人： Yasuyuki Tamura , Yusuke Morisaki , Yoshihiro Sugita , Kiyoshi Irino , Takayuki Aoyama , Chikako Yoshida , Yoshihiro Sugiyama , Hitoshi Tanaka , Kanetake Takasaki
IPC分类号： H01L218238
CPC分类号： H01L21/823462 , C23C16/401 , H01L21/28194 , H01L21/28202 , H01L21/3144 , H01L21/31604 , H01L21/31612 , H01L28/56 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A semiconductor device in which the insulation characteristics of an insulating film of multilayer structure including a lower-layer insulating film and a high-dielectric-constant film formed on the lower-layer insulating film are ensured, and a method for fabricating such a semiconductor device. A silicon oxide film or a silicon oxynitride film is formed on a semiconductor substrate as a lower-layer insulating film and part of the lower-layer insulating film is removed. Then a high-dielectric-constant film the dielectric constant of which is higher than that of the lower-layer insulating film is formed on the exposed semiconductor substrate and the lower-layer insulating film. If the lower-layer insulating film is a silicon oxide film, then a metallic compound not including chlorine is used for forming this high-dielectric-constant film. If the lower-layer insulating film is a silicon oxynitride film, then a metallic chloride can be used for forming this high-dielectric-constant film.
摘要翻译：一种半导体器件，其中确保了在下层绝缘膜上形成的包括下层绝缘膜和高介电常数膜的多层结构的绝缘膜的绝缘特性，以及制造这种半导体器件的方法。在作为下层绝缘膜的半导体基板上形成氧化硅膜或氧氮化硅膜，除去下层绝缘膜的一部分。然后在暴露的半导体衬底和下层绝缘膜上形成其介电常数高于下层绝缘膜的介电常数的高介电常数膜。如果下层绝缘膜是氧化硅膜，则使用不含氯的金属化合物来形成该高介电常数膜。如果下层绝缘膜是氮氧化硅膜，则可以使用金属氯化物来形成该高介电常数膜。

5. 发明授权

US07924138B2 Semiconductor device and manufacturing method of the same 失效
标题翻译：半导体器件及其制造方法相同
公开(公告)号：US07924138B2
公开(公告)日：2011-04-12
申请号：US12546089
申请日：2009-08-24
申请人： Kentaro Kinoshita , Chikako Yoshida
发明人： Kentaro Kinoshita , Chikako Yoshida
IPC分类号： H01C7/10
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/0069 , G11C2013/0083 , G11C2013/009 , G11C2213/15 , G11C2213/32 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1608 , H01L45/1625 , H01L45/1675 , Y10T29/49099
摘要： A titanium oxide film, a nickel oxide film and a top electrode are formed on a bottom electrode, and a resistance element is constituted by the bottom electrode, the titanium oxide film, the nickel oxide film and the top electrode. A thickness of the titanium oxide film is 5 nm, and a thickness of the nickel oxide film is 60 nm. A rate of oxygen in nickel oxide composing the nickel oxide film is lower than a rate of oxygen in a stoichiometric composition.
摘要翻译：在底部电极上形成氧化钛膜，氧化镍膜和顶部电极，电阻元件由底部电极，氧化钛膜，氧化镍膜和顶部电极构成。氧化钛膜的厚度为5nm，氧化镍膜的厚度为60nm。构成氧化镍膜的氧化镍中的氧的比例低于化学计量组成中的氧的比例。

6. 发明授权

US5950103A Manufacture of dielectric oxide lamination structure and electronic circuit device 失效
标题翻译：电介质氧化层压结构和电子电路装置的制造
公开(公告)号：US5950103A
公开(公告)日：1999-09-07
申请号：US726174
申请日：1996-10-04
申请人： Tsunehiro Hato , Chikako Yoshida
发明人： Tsunehiro Hato , Chikako Yoshida
IPC分类号： H01L39/00 , H01L29/06 , H01L39/02 , H01L39/22 , H01L21/4763
CPC分类号： H01L39/22
摘要： An impurity supply film made of dielectric oxide material is deposited on the surface of an underlying substrate having a surface layer made of different dielectric oxide material. An impurity absorption film made of the same dielectric oxide material as the surface layer of the underlying substrate is deposited on the impurity supply film. The underlying substrate is heated to replace a fraction of at least one type of constituent atoms other than oxygen atoms in the impurity supply film by a fraction of at least one type of constituent atoms other than oxygen atoms in the surface layer of the underlying substrate and in the impurity absorption film, for the whole thickness of the impurity supply film. A method is provided by which impurities are selectively doped in a dielectric oxide material without leaving an electrical barrier on the surface of the material.
摘要翻译：由电介质氧化物材料制成的杂质供应膜沉积在具有由不同电介质氧化物材料制成的表面层的底层衬底的表面上。由与基底的表面层相同的电介质氧化物材料制成的杂质吸收膜沉积在杂质供应膜上。底层基底被加热以通过在下面的基底的表面层中除了氧原子之外的至少一种类型的组成原子的一部分，在杂质供应膜中的除了氧原子之外的至少一种类型的构成原子的一部分，在杂质吸收膜中，对于杂质供应膜的整个厚度。提供了一种方法，通过其将杂质选择性地掺杂在电介质氧化物材料中，而不在材料的表面上留下电屏障。

7. 发明授权

US08102003B2 Resistance memory element, method of manufacturing resistance memory element and semiconductor memory device 失效
标题翻译：电阻存储元件，电阻存储元件和半导体存储器件的制造方法
公开(公告)号：US08102003B2
公开(公告)日：2012-01-24
申请号：US12473469
申请日：2009-05-28
申请人： Chikako Yoshida , Hideyuki Noshiro , Takashi Iiduka
发明人： Chikako Yoshida , Hideyuki Noshiro , Takashi Iiduka
IPC分类号： H01L29/40
CPC分类号： H01L27/101 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1633
摘要： A resistance memory element which memorizes a high resistance state and a low resistance state and is switched between the high resistance state and the low resistance state by an application of a voltage includes a first electrode layer of titanium nitride film, a resistance memory layer formed on the first electrode layer and formed of titanium oxide having a crystal structure of rutile phase, and a second electrode layer formed on the resistance memory layer.
摘要翻译：存储高电阻状态和低电阻状态并通过施加电压而在高电阻状态和低电阻状态之间切换的电阻存储元件包括氮化钛膜的第一电极层，形成在第一电极层上的电阻存储层所述第一电极层由金红石相的晶体结构的氧化钛形成，所述第二电极层形成在所述电阻记忆层上。

8. 发明申请

US20090309690A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090309690A1
公开(公告)日：2009-12-17
申请号：US12546089
申请日：2009-08-24
申请人： Kentaro Kinoshita , Chikako Yoshida
发明人： Kentaro Kinoshita , Chikako Yoshida
IPC分类号： H01C7/10 , H01C17/06
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/0069 , G11C2013/0083 , G11C2013/009 , G11C2213/15 , G11C2213/32 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1608 , H01L45/1625 , H01L45/1675 , Y10T29/49099
摘要： A titanium oxide film, a nickel oxide film and a top electrode are formed on a bottom electrode, and a resistance element is constituted by the bottom electrode, the titanium oxide film, the nickel oxide film and the top electrode. A thickness of the titanium oxide film is 5 nm, and a thickness of the nickel oxide film is 60 nm. A rate of oxygen in nickel oxide composing the nickel oxide film is lower than a rate of oxygen in a stoichiometric composition.
摘要翻译：在底部电极上形成氧化钛膜，氧化镍膜和顶部电极，电阻元件由底部电极，氧化钛膜，氧化镍膜和顶部电极构成。氧化钛膜的厚度为5nm，氧化镍膜的厚度为60nm。构成氧化镍膜的氧化镍中的氧的比例低于化学计量组成中的氧的比例。

9. 发明授权

US5416717A Circuit simulation method for a circuit realized by an LSI layout pattern based upon a circuit of a logic gate level realized by the layout pattern 失效
标题翻译：基于通过布局图案实现的逻辑门级的电路，通过LSI布局图形实现的电路的电路仿真方法
公开(公告)号：US5416717A
公开(公告)日：1995-05-16
申请号：US577434
申请日：1990-09-04
申请人： Mikako Miyama , Goichi Yokomizo , Chikako Yoshida
发明人： Mikako Miyama , Goichi Yokomizo , Chikako Yoshida
IPC分类号： G06F17/50 , G06F15/60
CPC分类号： G06F17/5081
摘要： In verifying an LSI layout pattern, the whole layout pattern is converted into circuit data and a subcircuit to be verified is picked up and subjected to simulation. After converting the layout pattern into the transistor level circuit data, the transistor level circuit data is transformed into a logic gate level circuit data while judging a clocked gate included in the subcircuit. After picking up a subcircuit in a predetermined manner, an approximate load is connected to the interface port of the picked-up subcircuit.
摘要翻译：在验证LSI布局图案时，整个布局图案被转换成电路数据，并且要检验的子电路被拾取并进行仿真。在将布局图案转换为晶体管电平电路数据之后，晶体管电平电路数据被转换为逻辑门电平电路数据，同时判断包括在子电路中的时钟门。在以预定方式拾取子电路之后，将近似负载连接到所拾取的子电路的接口端口。

10. 发明申请

US20090236581A1 RESISTANCE MEMORY ELEMENT, METHOD OF MANUFACTURING RESISTANCE MEMORY ELEMENT AND SEMICONDUCTOR MEMORY DEVICE 失效
标题翻译：电阻记忆元件，制造电阻记忆元件和半导体存储器件的方法
公开(公告)号：US20090236581A1
公开(公告)日：2009-09-24
申请号：US12473469
申请日：2009-05-28
申请人： Chikako Yoshida , Hideyuki Noshiro , Takashi Iiduka
发明人： Chikako Yoshida , Hideyuki Noshiro , Takashi Iiduka
IPC分类号： H01L47/00 , H01L21/16
CPC分类号： H01L27/101 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1633
摘要： A resistance memory element which memorizes a high resistance state and a low resistance state and is switched between the high resistance state and the low resistance state by an application of a voltage includes a first electrode layer of titanium nitride film, a resistance memory layer formed on the first electrode layer and formed of titanium oxide having a crystal structure of rutile phase, and a second electrode layer formed on the resistance memory layer.
摘要翻译：存储高电阻状态和低电阻状态并通过施加电压而在高电阻状态和低电阻状态之间切换的电阻存储元件包括氮化钛膜的第一电极层，形成在第一电极层上的电阻存储层所述第一电极层由金红石相的晶体结构的氧化钛形成，所述第二电极层形成在所述电阻记忆层上。

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