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1. 发明授权

US06309929B1 Method of forming trench MOS device and termination structure 有权
标题翻译：形成沟槽MOS器件和端接结构的方法
公开(公告)号：US06309929B1
公开(公告)日：2001-10-30
申请号：US09668906
申请日：2000-09-22
申请人： Chih-Wei Hsu , Chung-Min Liu , Ming-Che Kao , Ming-Jinn Tsai , Pu-Ju Kung
发明人： Chih-Wei Hsu , Chung-Min Liu , Ming-Che Kao , Ming-Jinn Tsai , Pu-Ju Kung
IPC分类号： H01L21336
CPC分类号： H01L29/7813 , H01L29/0661 , H01L29/402 , H01L29/407 , H01L29/66348 , H01L29/7397 , H01L29/7811 , H01L29/872 , H01L29/8725
摘要： A method for fabricating trench MOS devices and termination structure simultaneously is disclosed. The MOS devices can be Schottky diode, IGBT or DMOS depending on the semiconductor substrate prepared. The method comprises following steps: firstly, forming a plurality of first trenches for forming the trench MOS devices in an active region, and a second trench for forming the termination structure. Thereafter, a thermal oxidation process to form a gate oxide on all areas is performed. Then, the first trenches and the second trench are refilled with a first conductive material. An etching back is carried out to remove excess first conductive material so as to form spacer in the second trench and to fill the first trenches only. Next, the gate oxide layer is removed. For IGBT or DMOS device, an extra thermal oxidation and an etching step are required to form inter-conductive oxide layer whereas for Schottky diode, these two steps are skipped. Thereafter, a termination structure oxide layer is formed through deposition, lithographic process and etching. After backside unnecessary layers removal, a sputtering metal layers deposition, lithographic process and etching step are successively performed to form the first electrode with a desired ended location and the second electrode on both side of semiconductor substrate.
摘要翻译：公开了一种同时制造沟槽MOS器件和端接结构的方法。 MOS器件可以是肖特基二极管，IGBT或DMOS，取决于制备的半导体衬底。该方法包括以下步骤：首先，在有源区中形成用于形成沟槽MOS器件的多个第一沟槽和用于形成端接结构的第二沟槽。此后，进行在所有区域上形成栅极氧化物的热氧化工艺。然后，用第一导电材料再填充第一沟槽和第二沟槽。执行蚀刻以去除多余的第一导电材料，以便在第二沟槽中形成间隔物并仅填充第一沟槽。接下来，去除栅极氧化物层。对于IGBT或DMOS器件，需要额外的热氧化和蚀刻步骤以形成导电氧化物层，而对于肖特基二极管，这两个步骤被跳过。此后，通过沉积，光刻工艺和蚀刻形成端接结构氧化物层。在背面不必要的层去除之后，依次执行溅射金属层沉积，光刻工艺和蚀刻步骤以形成具有期望的端部位置的第一电极和在半导体衬底两侧的第二电极。

2. 发明授权

US06396090B1 Trench MOS device and termination structure 有权
标题翻译：沟槽MOS器件和端接结构
公开(公告)号：US06396090B1
公开(公告)日：2002-05-28
申请号：US09668663
申请日：2000-09-22
申请人： Chih-Wei Hsu , Chung-Min Liu , Ming-Che Kao , Ming-Jinn Tsai , Pu-Ju Kung
发明人： Chih-Wei Hsu , Chung-Min Liu , Ming-Che Kao , Ming-Jinn Tsai , Pu-Ju Kung
IPC分类号： H01L2974
CPC分类号： H01L29/7813 , H01L29/0661 , H01L29/402 , H01L29/407 , H01L29/66143 , H01L29/66348 , H01L29/7397 , H01L29/7811 , H01L29/872 , H01L29/8725
摘要： A termination structure for power trench MOS devices is disclosed. The MOS devices can be Schottky diode, IGBT or DMOS depending on what kinds of the semiconductor substrate are prepared. The termination structure comprises: a semiconductor substrate having a trench formed therein; a spacer-like MOS gate formed on a sidewall of the trench; a termination structure oxide layer formed in the trench to cover a portion of the spacer-like MOS gate and to cover a bottom of the trench; and a first electrode and a second electrode are, respectively, formed on a bottom surface and upper surface of the semiconductor substrate. The trench is formed from a boundary of the active region to an edge of the semiconductor substrate. The trench MOS devices are formed in the active region. In addition for IGBT and DMOS, the second electrode is isolated from MOS gate by an oxide layer; however, for Schottky diode, the second electrode is directed contact to the MOS gate.
摘要翻译：公开了功率沟槽MOS器件的端接结构。 MOS器件可以是肖特基二极管，IGBT或DMOS，这取决于准备的种类的半导体衬底。所述端接结构包括：其中形成有沟槽的半导体衬底; 形成在沟槽的侧壁上的间隔物状MOS栅极; 形成在所述沟槽中以覆盖所述间隔物状MOS栅极的一部分并覆盖所述沟槽的底部的端接结构氧化物层; 并且第一电极和第二电极分别形成在半导体衬底的底表面和上表面上。沟槽由有源区域的边界到半导体衬底的边缘形成。沟槽MOS器件形成在有源区中。另外对于IGBT和DMOS，第二电极通过氧化物层与MOS栅极隔离; 然而，对于肖特基二极管，第二电极定向接触MOS栅极。

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