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1. 发明申请

US20120171792A1 METHOD OF FABRICATING A PIXEL ARRAY 有权
标题翻译：制作像素阵列的方法
公开(公告)号：US20120171792A1
公开(公告)日：2012-07-05
申请号：US13050956
申请日：2011-03-18
申请人： Yung-Hui Yeh , Chih-Ming Lai , Chun-Cheng Cheng
发明人： Yung-Hui Yeh , Chih-Ming Lai , Chun-Cheng Cheng
IPC分类号： H01L33/02
CPC分类号： H01L27/1225 , H01L27/3262 , H01L2251/5338
摘要： A method of fabricating a pixel array is provided. A first metal layer is formed over a substrate. The metal layer is patterned to form a plurality of data lines and a plurality of drain patterns adjacent to each data line. The data lines and the drain patterns are separated from each other. An oxide semiconductor layer and a first insulation layer covering the oxide semiconductor layer are formed over the substrate. A second metal layer is formed on the first insulation layer and patterned to form a plurality of scan lines intersected with the data lines and the drain patterns. By using the scan lines as a mask, the oxide semiconductor layer and the first insulation layer are patterned to form a plurality of oxide semiconductor channels located under each scan line. Each oxide semiconductor channel is located between one data line and one drain pattern.
摘要翻译：提供了一种制造像素阵列的方法。第一金属层形成在衬底上。图案化金属层以形成与每条数据线相邻的多条数据线和多条漏极图案。数据线和漏极图案彼此分离。在基板上形成氧化物半导体层和覆盖氧化物半导体层的第一绝缘层。第二金属层形成在第一绝缘层上并被图案化以形成与数据线和漏极图案相交的多条扫描线。通过使用扫描线作为掩模，对氧化物半导体层和第一绝缘层进行图案化以形成位于每条扫描线下方的多个氧化物半导体通道。每个氧化物半导体沟道位于一个数据线和一个漏极图案之间。

2. 发明申请

US20100148168A1 INTEGRATED CIRCUIT STRUCTURE 审中-公开
标题翻译：集成电路结构
公开(公告)号：US20100148168A1
公开(公告)日：2010-06-17
申请号：US12494304
申请日：2009-06-30
申请人： Chih-Ming Lai , Chun-Cheng Cheng , Yung-Hui Yeh
发明人： Chih-Ming Lai , Chun-Cheng Cheng , Yung-Hui Yeh
IPC分类号： H01L29/24
CPC分类号： H01L29/45 , H01L27/1225 , H01L27/1233 , H01L27/1251
摘要： An integrated circuit structure including a substrate, an insulating layer, a first transistor and a second transistor is provided. The insulating layer, the first transistor and the second transistor are disposed on the substrate. The first transistor includes a first gate, a first oxide semiconductor layer, a first source and a first drain. A portion of the first source and the first drain directly contacting the first oxide semiconductor layer is composed of a Ti-containing metal. The second transistor includes a second gate, a second oxide semiconductor layer, a second source and a second drain. A portion of the second source and the second drain directly contacting the second oxide semiconductor layer is composed of a none-Ti-containing metal. In addition, the first oxide semiconductor layer and the second oxide semiconductor layer may have different thickness or different carrier concentrations.
摘要翻译：提供了包括基板，绝缘层，第一晶体管和第二晶体管的集成电路结构。绝缘层，第一晶体管和第二晶体管设置在基板上。第一晶体管包括第一栅极，第一氧化物半导体层，第一源极和第一漏极。与第一氧化物半导体层直接接触的第一源极和第一漏极的一部分由含钛金属构成。第二晶体管包括第二栅极，第二氧化物半导体层，第二源极和第二漏极。与第二氧化物半导体层直接接触的第二源极和第二漏极的一部分由不含Ti的金属构成。此外，第一氧化物半导体层和第二氧化物半导体层可以具有不同的厚度或不同的载流子浓度。

3. 发明授权

US08257992B2 Method of fabricating a pixel array 有权
标题翻译：制造像素阵列的方法
公开(公告)号：US08257992B2
公开(公告)日：2012-09-04
申请号：US13050956
申请日：2011-03-18
申请人： Yung-Hui Yeh , Chih-Ming Lai , Chun-Cheng Cheng
发明人： Yung-Hui Yeh , Chih-Ming Lai , Chun-Cheng Cheng
IPC分类号： H01L21/00
CPC分类号： H01L27/1225 , H01L27/3262 , H01L2251/5338
摘要： A method of fabricating a pixel array is provided. A first metal layer is formed over a substrate. The metal layer is patterned to form a plurality of data lines and a plurality of drain patterns adjacent to each data line. The data lines and the drain patterns are separated from each other. An oxide semiconductor layer and a first insulation layer covering the oxide semiconductor layer are formed over the substrate. A second metal layer is formed on the first insulation layer and patterned to form a plurality of scan lines intersected with the data lines and the drain patterns. By using the scan lines as a mask, the oxide semiconductor layer and the first insulation layer are patterned to form a plurality of oxide semiconductor channels located under each scan line. Each oxide semiconductor channel is located between one data line and one drain pattern.
摘要翻译：提供了一种制造像素阵列的方法。第一金属层形成在衬底上。图案化金属层以形成与每条数据线相邻的多条数据线和多条漏极图案。数据线和漏极图案彼此分离。在基板上形成氧化物半导体层和覆盖氧化物半导体层的第一绝缘层。第二金属层形成在第一绝缘层上并被图案化以形成与数据线和漏极图案相交的多条扫描线。通过使用扫描线作为掩模，对氧化物半导体层和第一绝缘层进行图案化以形成位于每条扫描线下方的多个氧化物半导体通道。每个氧化物半导体沟道位于一个数据线和一个漏极图案之间。

4. 发明申请

US20120164766A1 METHOD OF FABRICATING AN ACTIVE DEVICE ARRAY AND FABRICATING AN ORGANIC LIGHT EMITTING DIODE ARRAY 有权
标题翻译：制造有源器件阵列和制造有机发光二极管阵列的方法
公开(公告)号：US20120164766A1
公开(公告)日：2012-06-28
申请号：US13050951
申请日：2011-03-18
申请人： Yung-Hui Yeh , Chih-Ming Lai , Chun-Cheng Cheng
发明人： Yung-Hui Yeh , Chih-Ming Lai , Chun-Cheng Cheng
IPC分类号： H01L33/00 , H01L21/336
CPC分类号： H01L27/1225 , H01L27/1251 , H01L27/3258
摘要： Methods of fabricating active device array and organic light emitting diode array are provided. A first pattern metal layer is formed over a substrate. An oxide semiconductor layer is formed entirely over the substrate. A first insulation layer covering the first patterned metal layer and the oxide semiconductor layer is formed entirely on the substrate. A second patterned metal layer is formed on the first insulation layer. The oxide semiconductor layer and the first insulation layer is patterned by using the second patterned metal layer as a mask to form a first patterned oxide semiconductor layer and a first patterned insulation layer. A second insulation layer is entirely formed on the substrate. A second patterned oxide semiconductor layer is formed over the second insulation layer. A third patterned metal layer is formed over the second insulation layer.
摘要翻译：提供制造有源器件阵列和有机发光二极管阵列的方法。第一图案金属层形成在衬底上。整个衬底上形成氧化物半导体层。覆盖第一图案化金属层和氧化物半导体层的第一绝缘层整体形成在基板上。第二图案化金属层形成在第一绝缘层上。通过使用第二图案化金属层作为掩模来将氧化物半导体层和第一绝缘层图案化，以形成第一图案化氧化物半导体层和第一图案化绝缘层。在基板上完全形成第二绝缘层。第二图案化氧化物半导体层形成在第二绝缘层上。第三图案化金属层形成在第二绝缘层上。

5. 发明授权

US08263433B2 Method of fabricating an active device array and fabricating an organic light emitting diode array 有权
标题翻译：制造有源器件阵列并制造有机发光二极管阵列的方法
公开(公告)号：US08263433B2
公开(公告)日：2012-09-11
申请号：US13050951
申请日：2011-03-18
申请人： Yung-Hui Yeh , Chih-Ming Lai , Chun-Cheng Cheng
发明人： Yung-Hui Yeh , Chih-Ming Lai , Chun-Cheng Cheng
IPC分类号： H01L21/00
CPC分类号： H01L27/1225 , H01L27/1251 , H01L27/3258
摘要： Methods of fabricating active device array and organic light emitting diode array are provided. A first pattern metal layer is formed over a substrate. An oxide semiconductor layer is formed entirely over the substrate. A first insulation layer covering the first patterned metal layer and the oxide semiconductor layer is formed entirely on the substrate. A second patterned metal layer is formed on the first insulation layer. The oxide semiconductor layer and the first insulation layer is patterned by using the second patterned metal layer as a mask to form a first patterned oxide semiconductor layer and a first patterned insulation layer. A second insulation layer is entirely formed on the substrate. A second patterned oxide semiconductor layer is formed over the second insulation layer. A third patterned metal layer is formed over the second insulation layer.
摘要翻译：提供制造有源器件阵列和有机发光二极管阵列的方法。第一图案金属层形成在衬底上。整个衬底上形成氧化物半导体层。覆盖第一图案化金属层和氧化物半导体层的第一绝缘层整体形成在基板上。在第一绝缘层上形成第二图案化金属层。通过使用第二图案化金属层作为掩模来将氧化物半导体层和第一绝缘层图案化，以形成第一图案化氧化物半导体层和第一图案化绝缘层。在基板上完全形成第二绝缘层。第二图案化氧化物半导体层形成在第二绝缘层上。第三图案化金属层形成在第二绝缘层上。

6. 发明授权

US08759186B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08759186B2
公开(公告)日：2014-06-24
申请号：US13354334
申请日：2012-01-20
申请人： Yung-Hui Yeh , Chih-Ming Lai
发明人： Yung-Hui Yeh , Chih-Ming Lai
IPC分类号： H01L33/08
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1248 , H01L29/66969
摘要： A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.
摘要翻译：一种制造半导体器件的方法包括在衬底上形成金属氧化物半导体层和第一绝缘层。在第一绝缘层上形成栅极。通过使用栅极作为蚀刻掩模来对第一绝缘层进行构图，以使金属氧化物半导体层暴露于源极区和漏极区。在基板上形成介电层以覆盖栅极和氧化物半导体层，其中电介质层具有氢基和羟基中的至少一个。进行加热处理，使得氢基和羟基中的至少一个与源极区和漏极区反应。在电介质层上分别形成与源极区域和漏极区域电连接的源极电极和漏极电极。

7. 发明申请

US20130126859A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130126859A1
公开(公告)日：2013-05-23
申请号：US13354334
申请日：2012-01-20
申请人： Yung-Hui Yeh , Chih-Ming Lai
发明人： Yung-Hui Yeh , Chih-Ming Lai
IPC分类号： H01L33/08 , H01L33/44
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1248 , H01L29/66969
摘要： A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.
摘要翻译：一种制造半导体器件的方法包括在衬底上形成金属氧化物半导体层和第一绝缘层。在第一绝缘层上形成栅极。通过使用栅极作为蚀刻掩模来对第一绝缘层进行构图，以使金属氧化物半导体层暴露于源极区和漏极区。在基板上形成介电层以覆盖栅极和氧化物半导体层，其中电介质层具有氢基和羟基中的至少一个。进行加热处理，使得氢基和羟基中的至少一个与源极区和漏极区反应。在电介质层上分别形成与源极区域和漏极区域电连接的源极电极和漏极电极。

8. 发明申请

US20070152217A1 PIXEL STRUCTURE OF ACTIVE MATRIX ORGANIC LIGHT-EMITTING DIODE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：有源矩阵有机发光二极管的像素结构及其制作方法
公开(公告)号：US20070152217A1
公开(公告)日：2007-07-05
申请号：US11308015
申请日：2006-03-03
申请人： Chih-Ming Lai , Yung-Hui Yeh , Yi-Hsun Huang
发明人： Chih-Ming Lai , Yung-Hui Yeh , Yi-Hsun Huang
IPC分类号： H01L29/04
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/322 , H01L27/3265
摘要： A pixel structure of an active matrix organic light-emitting diode (AMOLED) includes an organic light-emitting diode (OLED), a data line, at least one scan line, at least one switch thin film transistor (TFT), at least one driving TFT and at least one storage capacitor with two transparent electrodes. Since both the electrodes of the transparent storage capacitor are formed by transparent material, the aperture ratio of the pixel and the area of the capacitor largely increase and can reach 50%˜95% of a pixel area. Thus, the display quality of an AMOLED panel can be improved.
摘要翻译：有源矩阵有机发光二极管（AMOLED）的像素结构包括有机发光二极管（OLED），数据线，至少一条扫描线，至少一个开关薄膜晶体管（TFT），至少一个驱动TFT和具有两个透明电极的至少一个存储电容器。由于透明储能电容器的两个电极由透明材料形成，所以像素的开口率和电容器的面积大大增加，并且可以达到象素面积的50％〜95％。因此，可以提高AMOLED面板的显示质量。

9. 发明授权

US08723278B2 Sensor element array and method of fabricating the same 有权
标题翻译：传感器元件阵列及其制造方法
公开(公告)号：US08723278B2
公开(公告)日：2014-05-13
申请号：US13411623
申请日：2012-03-04
申请人： Chih-Ming Lai , Yung-Hui Yeh
发明人： Chih-Ming Lai , Yung-Hui Yeh
IPC分类号： H01L29/84 , G02F1/1333
CPC分类号： G02F1/13338 , G06F3/044 , G06F2203/04103 , G06F2203/04111 , H01L27/0207 , H01L28/40
摘要： A sensor element array and method of fabricating the same are provided. The sensor element array is disposed on a substrate and includes a first patterned conductive layer, a channel layer, a first insulation layer, a second patterned conductive layer, a second insulation layer, and a third patterned conductive layer. The first patterned conductive layer includes a sensing line, a first power line, a source/drain pattern and a branch pattern. The channel layer includes a first channel and a second channel. Margins of the first insulation layer and the second patterned conductive layer are substantially overlapped. The second patterned conductive layer includes a selecting line, a gate pattern, and a gate connecting pattern. The second insulation layer has a first connecting opening for exposing the gate connecting pattern. The third patterned conductive layer includes a sensing electrode electrically connected to the gate connecting pattern.
摘要翻译：提供了传感器元件阵列及其制造方法。传感器元件阵列设置在基板上，并且包括第一图案化导电层，沟道层，第一绝缘层，第二图案化导电层，第二绝缘层和第三图案化导电层。第一图案化导电层包括感测线，第一电源线，源极/漏极图案和分支图案。信道层包括第一信道和第二信道。第一绝缘层和第二图案化导电层的边缘基本上重叠。第二图案化导电层包括选择线，栅极图案和栅极连接图案。第二绝缘层具有用于暴露栅极连接图案的第一连接开口。第三图案化导电层包括电连接到栅极连接图案的感测电极。

10. 发明授权

US08076741B2 Photo sensing element array substrate 有权
标题翻译：感光元件阵列基板
公开(公告)号：US08076741B2
公开(公告)日：2011-12-13
申请号：US12427758
申请日：2009-04-22
申请人： Chih-Ming Lai , Yung-Hui Yeh
发明人： Chih-Ming Lai , Yung-Hui Yeh
IPC分类号： H01L31/101 , H01L27/14
CPC分类号： H01L27/14667 , H01L27/1225 , H01L27/1446 , H01L27/14621 , H01L27/14632 , H01L29/7869
摘要： A photo sensing element array substrate is provided. The photo sensing element array substrate includes a flexible substrate and a plurality of photo sensing elements. The photo sensing elements are disposed in array on the flexible substrate. Each of the photo sensing elements includes a photo sensing thin film transistor (TFT), an oxide semiconductor TFT and a capacitor. The photo sensing TFT is disposed on the flexible substrate. The oxide semiconductor TFT is disposed on the flexible substrate. The oxide semiconductor TFT is electrically connected to the photo sensing TFT. The capacitor is disposed on the flexible substrate and electrically connected between the photo sensing TFT and the oxide semiconductor TFT. When the photo sensing element array substrate is bent, it remains unaffected from normal operation.
摘要翻译：提供了感光元件阵列基板。感光元件阵列基板包括柔性基板和多个感光元件。感光元件阵列设置在柔性基板上。每个感光元件包括感光薄膜晶体管（TFT），氧化物半导体TFT和电容器。感光TFT设置在柔性基板上。氧化物半导体TFT设置在柔性基板上。氧化物半导体TFT电连接到感光TFT。电容器设置在柔性基板上并电连接在感光TFT和氧化物半导体TFT之间。当感光元件阵列基板弯曲时，它不会受到正常操作的影响。

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