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1. 发明申请

US20060148197A1 Method for forming shallow trench isolation with rounded corners by using a clean process 审中-公开
标题翻译：通过使用清洁工艺形成具有圆角的浅沟槽隔离的方法
公开(公告)号：US20060148197A1
公开(公告)日：2006-07-06
申请号：US11134372
申请日：2005-05-23
申请人： Chia-Wei Wu , Cheng-Shun Chen , Jung-Yu Hsieh , Ling Yang
发明人： Chia-Wei Wu , Cheng-Shun Chen , Jung-Yu Hsieh , Ling Yang
IPC分类号： H01L21/76 , H01L21/302
CPC分类号： H01L21/30608 , H01L21/76232
摘要： In a method for forming STI in a silicon substrate having a pad oxide over the substrate, a hard mask is formed over the pad oxide, the hard mask and the pad oxide are patterned to form an opening, the silicon substrate is etched through the opening to form a trench, a liner oxide is formed over the trench, an STI insulator is formed in the trench, and the hard mask and the pad oxide are removed. Before the formation of the liner oxide, a clean process is performed that comprises applying silicon-consuming solution to round the top corners of the trench.
摘要翻译：在用于在衬底上具有衬垫氧化物的硅衬底中形成STI的方法中，在衬垫氧化物上方形成硬掩模，对硬掩模和衬垫氧化物进行构图以形成开口，通过开口蚀刻硅衬底为了形成沟槽，在沟槽上形成衬垫氧化物，在沟槽中形成STI绝缘体，并且去除硬掩模和衬垫氧化物。在形成衬垫氧化物之前，执行清洁工艺，其包括将消耗硅消耗溶液施加到沟槽的顶角四周。

2. 发明申请

US20130037919A1 METHODS OF FORMING TRENCHES IN SILICON AND A SEMICONDUCTOR DEVICE INCLUDING SAME 有权
标题翻译：在硅中形成铁素体的方法和包括其中的半导体器件
公开(公告)号：US20130037919A1
公开(公告)日：2013-02-14
申请号：US13206907
申请日：2011-08-10
申请人： Sanjeev Sapra , Cheng-Shun Chen , Hung-Ming Tsai , Sheng-Wei Yang
发明人： Sanjeev Sapra , Cheng-Shun Chen , Hung-Ming Tsai , Sheng-Wei Yang
IPC分类号： H01L21/306 , H01L29/06 , B82Y40/00 , B82Y99/00
CPC分类号： H01L23/5283 , B82Y30/00 , H01L21/02238 , H01L21/30604 , H01L21/3083 , H01L21/31111 , H01L29/04 , H01L29/16 , H01L2924/0002 , H01L2924/00
摘要： A method of creating a trench having a portion of a bulb-shaped cross-section in silicon is disclosed. The method comprises forming at least one trench in silicon and forming a liner in the at least one trench. The liner is removed from a bottom surface of the at least one trench to expose the underlying silicon. A portion of the underlying exposed silicon is removed to form a cavity in the silicon. At least one removal cycle is conducted to remove exposed silicon in the cavity to form a bulb-shaped cross-sectional profile, with each removal cycle comprising subjecting the silicon in the cavity to ozonated water to oxidize the silicon and subjecting the oxidized silicon to a hydrogen fluoride solution to remove the oxidized silicon. A semiconductor device structure comprising the at least one trench comprising a cavity with a bulb-shaped cross-sectional profile is also disclosed.
摘要翻译：公开了一种在硅中产生一个具有一个灯泡形横截面的沟槽的方法。该方法包括在硅中形成至少一个沟槽并在至少一个沟槽中形成衬垫。将衬垫从至少一个沟槽的底表面移除以暴露下面的硅。去除底层暴露的硅的一部分以在硅中形成空腔。进行至少一个去除周期以去除空腔中的暴露的硅以形成球形横截面轮廓，每个去除周期包括使空腔中的硅经受臭氧化水以氧化硅并将氧化的硅经受氟化氢溶液去除氧化硅。还公开了一种半导体器件结构，其包括包括具有灯泡形横截面轮廓的空腔的至少一个沟槽。

3. 发明申请

US20140126105A1 CAPACITOR STRUCTURE AND PROCESS FOR FABRICATING THE SAME 有权
标题翻译：电容器结构及其制造方法
公开(公告)号：US20140126105A1
公开(公告)日：2014-05-08
申请号：US13666984
申请日：2012-11-02
申请人： Chi-Hsiang Kuo , Cheng-Shun Chen , Chang-Yao Hsieh
发明人： Chi-Hsiang Kuo , Cheng-Shun Chen , Chang-Yao Hsieh
IPC分类号： H01G4/005 , H01L21/02
CPC分类号： H01L28/90 , H01L27/10852
摘要： A process for fabricating a capacitor is described. A template layer including a stack of at least one first layer and at least one second layer is formed over a substrate, wherein the at least one first layer and the at least one second layer have different etching selectivities and are arranged alternately. An opening is formed through the template layer. A wet etching process is performed to recess the at least one first layer relative to the at least one second layer, at the sidewall of the opening. A bottom electrode of the capacitor is formed at the bottom of the opening and on the sidewall of the opening, and then the template layer is removed.
摘要翻译：描述制造电容器的工艺。在衬底上形成包括至少一个第一层和至少一个第二层的堆叠的模板层，其中所述至少一个第一层和至少一个第二层具有不同的蚀刻选择性并交替布置。通过模板层形成开口。执行湿蚀刻工艺以在开口的侧壁处相对于至少一个第二层凹陷至少一个第一层。电容器的底部电极形成在开口的底部和开口的侧壁上，然后去除模板层。

4. 发明授权

US06753237B1 Method of shallow trench isolation fill-in without generation of void 有权
标题翻译：浅沟槽隔离填充方法不产生空隙
公开(公告)号：US06753237B1
公开(公告)日：2004-06-22
申请号：US10424657
申请日：2003-04-28
申请人： Cheng-Shun Chen
发明人： Cheng-Shun Chen
IPC分类号： H01L2176
CPC分类号： H01L21/76232 , H01L21/76235
摘要： A method of shallow trench isolation fill-in to create the void-free trenches is disclosed. First, a liner oxide layer is formed in the trenches. Next, the silicon substrate is pre-wetted with DI water, and the liner oxide layer is etched by a chemical solution. The chemical solution is an oxide etchant, such as HF solution or BOE (buffered oxide etchant). The etching rate close to an opening of a trench is faster than a bottom of the trench. Finally, the trenches are filled with a HDP oxide layer.
摘要翻译：公开了一种浅沟槽隔离填充的方法以产生无空隙的沟槽。首先，在沟槽中形成衬垫氧化物层。接下来，硅衬底用DI水预润湿，并且通过化学溶液蚀刻衬里氧化物层。化学溶液是氧化物蚀刻剂，例如HF溶液或BOE（缓冲氧化物蚀刻剂）。接近沟槽开口的蚀刻速率比沟槽的底部更快。最后，沟槽填充有HDP氧化物层。

5. 发明授权

US08043884B1 Methods of seamless gap filling 有权
标题翻译：无缝填充方法
公开(公告)号：US08043884B1
公开(公告)日：2011-10-25
申请号：US12786249
申请日：2010-05-24
申请人： Shin-Yu Nieh , Shuo-Che Chang , Hui-Lan Chang , Cheng-Shun Chen
发明人： Shin-Yu Nieh , Shuo-Che Chang , Hui-Lan Chang , Cheng-Shun Chen
IPC分类号： H01L21/00
CPC分类号： H01L21/02129 , H01L21/02164 , H01L21/022 , H01L21/0228 , H01L21/76232
摘要： A method for seamless gap filling is provided, including providing a semiconductor structure with a device layer having a gap therein, wherein the gap has an aspect ratio greater than 4. A liner layer is formed over the device layer exposed by the gap. A first un-doped oxide layer is formed over the liner layer in the gap. A doped oxide layer is formed over the first undoped oxide layer in the gap. A second un-doped oxide layer is formed over the doped oxide layer in the gap to fill the gap. An annealing process is performed on the second un-doped oxide layer, the doped oxide layer, and the first un-doped oxide to form a seamless oxide layer in the gap, wherein the seamless oxide layer has an interior doped region.
摘要翻译：提供了一种用于无缝间隙填充的方法，包括提供具有在其中具有间隙的器件层的半导体结构，其中间隙具有大于4的纵横比。在由间隙暴露的器件层上形成衬垫层。在间隙中的衬垫层上形成第一未掺杂氧化物层。在间隙中的第一未掺杂氧化物层上形成掺杂的氧化物层。在间隙中的掺杂氧化物层上形成第二未掺杂氧化物层以填充间隙。对第二未掺杂氧化物层，掺杂氧化物层和第一未掺杂氧化物进行退火处理，以在间隙中形成无缝氧化物层，其中无缝氧化物层具有内部掺杂区域。

6. 发明授权

US06703322B2 Method of forming multiple oxide layers with different thicknesses in a linear nitrogen doping process 有权
标题翻译：在线性氮掺杂过程中形成具有不同厚度的多个氧化物层的方法
公开(公告)号：US06703322B2
公开(公告)日：2004-03-09
申请号：US10064668
申请日：2002-08-05
申请人： June-Min Yao , Cheng-Shun Chen , Shu-Ya Hsu
发明人： June-Min Yao , Cheng-Shun Chen , Shu-Ya Hsu
IPC分类号： H01L2131
CPC分类号： H01L21/26506 , H01L21/3185 , H01L21/823462 , Y10S438/981
摘要： Multiple oxide layers with different thicknesses are formed on a semiconductor substrate with a silicon surface, having a first and second region. A sacrificial oxide layer is formed on the silicon surface to cover both the first region and the second region, with a mask layer formed on the surface of the sacrificial oxide layer. By defining and patterning the mask layer, a first opening and a second opening, having predetermined surface areas, are formed in portions of the first and second regions of the mask layer to expose portions of the. The sacrificial oxide layer has a surface area equal to the first predetermined surface area, and portions of the sacrificial oxide layer having a surface area equal to the second predetermined surface area. A linear nitrogen doping process is then performed to simultaneously implant nitrogen ions with a first and second predetermined concentration into the first and second region, through the first opening and the second opening, respectively. Thereafter, the mask layer and the sacrificial oxide layer are removed, respectively. An oxidation process is performed to two silicon oxide layers with different thicknesses in the first and second regions.
摘要翻译：在具有第一和第二区域的具有硅表面的半导体衬底上形成具有不同厚度的多个氧化物层。牺牲氧化物层形成在硅表面上，以覆盖第一区域和第二区域，掩模层形成在牺牲氧化物层的表面上。通过限定和图案化掩模层，具有预定表面积的第一开口和第二开口形成在掩模层的第一和第二区域的一部分中，以暴露部分。牺牲氧化物层的表面积等于第一预定表面积，牺牲氧化物层的表面积等于第二预定表面积的部分。然后进行线性氮掺杂过程，以分别通过第一开口和第二开口将第一和第二预定浓度的氮离子注入第一和第二区域。此后，分别去除掩模层和牺牲氧化物层。对第一和第二区域中具有不同厚度的两个氧化硅层进行氧化处理。

7. 发明授权

US09831303B2 Capacitor structure and process for fabricating the same 有权
公开(公告)号：US09831303B2
公开(公告)日：2017-11-28
申请号：US13666984
申请日：2012-11-02
申请人： Chi-Hsiang Kuo , Cheng-Shun Chen , Chang-Yao Hsieh
发明人： Chi-Hsiang Kuo , Cheng-Shun Chen , Chang-Yao Hsieh
IPC分类号： H01G4/30 , H01G4/232 , H01G4/005 , H01L29/94 , H01L49/02 , H01L27/108
CPC分类号： H01L28/90 , H01L27/10852
摘要： A process for fabricating a capacitor is described. A template layer including a stack of at least one first layer and at least one second layer is formed over a substrate, wherein the at least one first layer and the at least one second layer have different etching selectivities and are arranged alternately. An opening is formed through the template layer. A wet etching process is performed to recess the at least one first layer relative to the at least one second layer, at the sidewall of the opening. A bottom electrode of the capacitor is formed at the bottom of the opening and on the sidewall of the opening, and then the template layer is removed.

8. 发明授权

US09117759B2 Methods of forming bulb-shaped trenches in silicon 有权
标题翻译：在硅中形成球形沟槽的方法
公开(公告)号：US09117759B2
公开(公告)日：2015-08-25
申请号：US13206907
申请日：2011-08-10
申请人： Sanjeev Sapra , Cheng-Shun Chen , Hung-Ming Tsai , Sheng-Wei Yang
发明人： Sanjeev Sapra , Cheng-Shun Chen , Hung-Ming Tsai , Sheng-Wei Yang
IPC分类号： H01L21/3205 , H01L21/306 , H01L21/02 , H01L21/308 , H01L21/311 , B82Y30/00
CPC分类号： H01L23/5283 , B82Y30/00 , H01L21/02238 , H01L21/30604 , H01L21/3083 , H01L21/31111 , H01L29/04 , H01L29/16 , H01L2924/0002 , H01L2924/00
摘要： A method of creating a trench having a portion of a bulb-shaped cross-section in silicon is disclosed. The method comprises forming at least one trench in silicon and forming a liner in the at least one trench. The liner is removed from a bottom surface of the at least one trench to expose the underlying silicon. A portion of the underlying exposed silicon is removed to form a cavity in the silicon. At least one removal cycle is conducted to remove exposed silicon in the cavity to form a bulb-shaped cross-sectional profile, with each removal cycle comprising subjecting the silicon in the cavity to ozonated water to oxidize the silicon and subjecting the oxidized silicon to a hydrogen fluoride solution to remove the oxidized silicon. A semiconductor device structure comprising the at least one trench comprising a cavity with a bulb-shaped cross-sectional profile is also disclosed.
摘要翻译：公开了一种在硅中产生一个具有一个灯泡形横截面的沟槽的方法。该方法包括在硅中形成至少一个沟槽并在至少一个沟槽中形成衬垫。将衬垫从至少一个沟槽的底表面移除以暴露下面的硅。去除底层暴露的硅的一部分以在硅中形成空腔。进行至少一个去除周期以去除空腔中的暴露的硅以形成球形横截面轮廓，每个去除周期包括使空腔中的硅经受臭氧化水以氧化硅并将氧化的硅经受氟化氢溶液去除氧化硅。还公开了一种半导体器件结构，其包括包括具有灯泡形横截面轮廓的空腔的至少一个沟槽。

9. 发明授权

US08858615B2 Preventing vascular stenosis of cardiovascular stent 有权
标题翻译：预防心血管支架血管狭窄
公开(公告)号：US08858615B2
公开(公告)日：2014-10-14
申请号：US12782974
申请日：2010-05-19
申请人： Cheng-Shun Chen , Yih-Sharng Chen , Nai-Kuan Chou , Hsi-Yu Yu , Sheng-Yao Lin
发明人： Cheng-Shun Chen , Yih-Sharng Chen , Nai-Kuan Chou , Hsi-Yu Yu , Sheng-Yao Lin
IPC分类号： A61F2/06 , A61F2/915
CPC分类号： A61F2/915 , A61F2002/91575 , A61F2230/0013
摘要： A novel cardiovascular stent for preventing vascular stenosis is disclosed. The basic components of the cardiovascular stent of the present invention include V-shape rib unit, multi-link unit and connective ring unit. In addition, each ring rib part is formed by a plurality of double V-shape rib units that are connected together via the bridging portions of the multi-link units. Also, each connective part comprises a plurality of connective ring units. The integrally formed stent of the present invention is formed with the ring rib parts that are connected together by the connective parts.
摘要翻译：公开了一种用于预防血管狭窄的新型心血管支架。本发明的心血管支架的基本部件包括V形肋单元，多连杆单元和连接环单元。此外，每个环形肋部分由多个双V形肋单元形成，所述双V形肋单元经由多连杆单元的桥接部连接在一起。此外，每个连接部分包括多个连接环单元。本发明的一体形成的支架形成有通过连接部连接在一起的环状肋部。

10. 发明申请

US20110288631A1 Preventing Vascular Stenosis of Cardiovascular Stent 有权
标题翻译：预防心血管支架血管狭窄
公开(公告)号：US20110288631A1
公开(公告)日：2011-11-24
申请号：US12782974
申请日：2010-05-19
申请人： Cheng-Shun Chen , Yih-Sharng Chen , Nai-Kuan Chou , Hsi-Yu Yu , Sheng-Yao Lin
发明人： Cheng-Shun Chen , Yih-Sharng Chen , Nai-Kuan Chou , Hsi-Yu Yu , Sheng-Yao Lin
IPC分类号： A61F2/82
CPC分类号： A61F2/915 , A61F2002/91575 , A61F2230/0013
摘要： A novel cardiovascular stent for preventing vascular stenosis is disclosed. The basic components of the cardiovascular stent of the present invention include V-shape rib unit, multi-link unit and connective ring unit. In addition, each ring rib part is formed by a plurality of double V-shape rib units that are connected together via the bridging portions of the multi-link units. Also, each connective part comprises a plurality of connective ring units. The integrally formed stent of the present invention is formed with the ring rib parts that are connected together by the connective parts.
摘要翻译：公开了一种用于预防血管狭窄的新型心血管支架。本发明的心血管支架的基本部件包括V形肋单元，多连杆单元和连接环单元。此外，每个环形肋部分由多个双V形肋单元形成，所述双V形肋单元经由多连杆单元的桥接部连接在一起。此外，每个连接部分包括多个连接环单元。本发明的一体形成的支架形成有通过连接部连接在一起的环状肋部。

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