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1. 发明授权

US09801777B2 Walking aid device 有权
公开(公告)号：US09801777B2
公开(公告)日：2017-10-31
申请号：US15272753
申请日：2016-09-22
申请人： Chia-Pao Chang , Ying-Hsiang Lin , Yu-Cheng Chang
发明人： Chia-Pao Chang , Ying-Hsiang Lin , Yu-Cheng Chang
IPC分类号： A61H3/04 , B60B33/00 , B60B33/06
CPC分类号： A61H3/04 , A61H2003/046 , A61H2201/1635 , A61H2201/1671 , B60B33/0063 , B60B33/0081 , B60B33/0094 , B60B33/063 , B60B2200/22 , B60B2200/26
摘要： A walking aid device includes a support body inclusive of a plurality of support elements extending toward the ground. Each support element is coupled to a caster and a brake unit. Each brake unit has a clutching surface. The clutching surface controllably clutches a wheel of the caster or the ground to thereby generate friction for stopping the walking aid device.

2. 发明申请

US20170087043A1 WALKING AID DEVICE 审中-公开
公开(公告)号：US20170087043A1
公开(公告)日：2017-03-30
申请号：US15272753
申请日：2016-09-22
申请人： Chia-Pao Chang , Ying-Hsiang Lin , Yu-Cheng Chang
发明人： Chia-Pao Chang , Ying-Hsiang Lin , Yu-Cheng Chang
IPC分类号： A61H3/04 , B60B33/00
CPC分类号： A61H3/04 , A61H2003/046 , A61H2201/1635 , A61H2201/1671 , B60B33/0063 , B60B33/0081 , B60B33/0094 , B60B33/063 , B60B2200/22 , B60B2200/26
摘要： A walking aid device includes a support body inclusive of a plurality of support elements extending toward the ground. Each support element is coupled to a caster and a brake unit. Each brake unit has a clutching surface. The clutching surface controllably clutches a wheel of the caster or the ground to thereby generate friction for stopping the walking aid device.

3. 发明授权

US07283116B2 Scan driver and scan driving system with low input voltage, and their level shift voltage circuit 有权
标题翻译：具有低输入电压的扫描驱动和扫描驱动系统及其电平转换电压电路
公开(公告)号：US07283116B2
公开(公告)日：2007-10-16
申请号：US10760410
申请日：2004-01-21
申请人： Jun-Ren Shih , Chia-Pao Chang , Bowen Wang , Jan-Ruei Lin
发明人： Jun-Ren Shih , Chia-Pao Chang , Bowen Wang , Jan-Ruei Lin
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/2096 , G09G2310/0267 , G09G2310/0289 , G09G2330/021
摘要： Scan driver and driving system with low input voltage and their level shift circuit are disclosed. The scan driver includes a latch unit, a level shift circuit and a buffer. The latch unit generates a first control signal and a second control signal. The level shift circuit is connected to the latch unit to receive the first control signal, the second control signal, a first clock signal and a second clock signal, so as to output a scan signal with high voltage level. The buffer enhances driving ability of the scan signal for driving thin-film transistors (TFTs) of a display panel.
摘要翻译：公开了具有低输入电压的扫描驱动器和驱动系统及其电平移位电路。扫描驱动器包括锁存单元，电平移位电路和缓冲器。锁存单元产生第一控制信号和第二控制信号。电平移位电路连接到锁存单元以接收第一控制信号，第二控制信号，第一时钟信号和第二时钟信号，以输出具有高电压电平的扫描信号。该缓冲器增强用于驱动显示面板的薄膜晶体管（TFT）的扫描信号的驱动能力。

4. 发明申请

US20060055688A1 Method of resolving display delay 有权
标题翻译：解决显示延迟的方法
公开(公告)号：US20060055688A1
公开(公告)日：2006-03-16
申请号：US11074653
申请日：2005-03-09
申请人： Bou-Chi Chang , Chang-Ho Liou , Hsin-Mao Huang , Chia-Pao Chang
发明人： Bou-Chi Chang , Chang-Ho Liou , Hsin-Mao Huang , Chia-Pao Chang
IPC分类号： G09G5/00
CPC分类号： G09G3/3648 , G09G2310/0216 , G09G2310/0251 , G09G2320/0252 , G09G2320/0261
摘要： A method of resolving display delay is disclosed. The method of resolving display delay comprises the steps of: dividing a period of turning on scan lines of an image is into at least two sections; and charging at least one section of the period while discharging the other sections of the period for enabling the charging of scan lines (i.e. enabling pixel displaying) and the discharging of scan lines (i.e. erasing pixel displaying) are performed with a designated number of scan lines apart so as to achieve the purpose of preventing the liquid crystal display from generating display delay and image-sticking phenomena.
摘要翻译：公开了一种解决显示延迟的方法。解决显示延迟的方法包括以下步骤：将图像的扫描线的打开周期划分为至少两个部分; 并且在使用扫描线的充电（即，使能像素显示）和扫描线的放电（即，擦除像素显示）的周期的其他部分放电期间，至少充满一段时间，以指定的扫描次数分隔开，以达到防止液晶显示器产生显示延迟和图像残留现象的目的。

5. 发明授权

US07538751B2 Method of resolving display delay 有权
标题翻译：解决显示延迟的方法
公开(公告)号：US07538751B2
公开(公告)日：2009-05-26
申请号：US11074653
申请日：2005-03-09
申请人： Bou-Chi Chang , Chang-Ho Liou , Hsin-Mao Huang , Chia-Pao Chang
发明人： Bou-Chi Chang , Chang-Ho Liou , Hsin-Mao Huang , Chia-Pao Chang
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G2310/0216 , G09G2310/0251 , G09G2320/0252 , G09G2320/0261
摘要： A method of resolving display delay includes dividing a period of turning on scan lines of an image into at least two sections. At least one section of the period is for charging pixels while pixels are discharged during the other sections of the period for enabling the charging of scan lines (i.e., enabling pixel displaying). The discharging of scan lines (i.e., erasing pixel displaying) is performed a designated number of scan lines apart so as to achieve the purpose of preventing the liquid crystal display from generating display delay and exhibiting an image-sticking phenomena.
摘要翻译：解决显示延迟的方法包括将图像的扫描线的打开周期划分为至少两个部分。该周期的至少一个部分用于对像素进行充电，而在周期的其他部分期间，像素被放电以使得能够对扫描线进行充电（即，使能像素显示）。扫描线的放电（即擦除像素显示）被分开指定数量的扫描线，以达到防止液晶显示器产生显示延迟和呈现图像残留现象的目的。

6. 发明授权

US07385866B2 Load-balanced apparatus of memory 有权
标题翻译：负载均衡的存储器
公开(公告)号：US07385866B2
公开(公告)日：2008-06-10
申请号：US11347052
申请日：2006-02-03
申请人： Chih-Sheng Lin , Chia-Pao Chang , Jan-Ruei Lin
发明人： Chih-Sheng Lin , Chia-Pao Chang , Jan-Ruei Lin
IPC分类号： G11C7/02
CPC分类号： G11C7/067 , G11C7/062 , G11C7/14
摘要： A memory device is provided. The device comprises a sense amplifier having a cell input terminal and a reference input terminal, a first sub-array coupled to the cell input terminal through a first switch and coupled to the reference input terminal through a second switch, a second sub-array coupled to the cell input terminal through a third switch and coupled to the reference input terminal through a fourth switch, and a reference cell array coupled between the second switch and the fourth switch and coupled to the reference input terminal.
摘要翻译：提供存储器件。该器件包括具有单元输入端和参考输入端的读出放大器，通过第一开关耦合到单元输入端并通过第二开关耦合到参考输入端的第一子阵列，第二子阵列耦合通过第三开关耦合到单元输入端，并通过第四开关耦合到参考输入端，以及耦合在第二开关和第四开关之间并耦合到参考输入端的参考单元阵列。

7. 发明授权

US07394295B2 Sense amplifier 有权
标题翻译：感应放大器
公开(公告)号：US07394295B2
公开(公告)日：2008-07-01
申请号：US11515882
申请日：2006-09-06
申请人： Chia-Pao Chang , Chin-Sheng Lin , Keng-Li Su
发明人： Chia-Pao Chang , Chin-Sheng Lin , Keng-Li Su
IPC分类号： H03K5/22
CPC分类号： H03F3/345 , G11C7/062 , G11C7/067 , G11C2207/063 , H03F3/45273 , H03F2200/453 , H03F2200/462
摘要： The invention relates to a sense amplifier comprising the following element: a first current mirror unit coupled to a high voltage source, outputting a first current and a second current according to a first reference current, wherein the second current is twice the first current; a second current mirror unit coupled to a high voltage source, outputting a third current according to a second reference current; a first impedor coupled to the second current and a low voltage source; a second impedor coupled to the third current and a low voltage source; a third current mirror coupled to the first, second and third currents, and the first current is regarded as the reference current of the third current mirror unit, thus, the current which flows through the first impedor is the first current, and the current which flows through the second impedor is a fourth current.
摘要翻译：本发明涉及一种包括以下元件的读出放大器：耦合到高电压源的第一电流镜单元，根据第一参考电流输出第一电流和第二电流，其中第二电流是第一电流的两倍; 耦合到高电压源的第二电流镜单元，根据第二参考电流输出第三电流; 耦合到第二电流的第一阻抗器和低电压源; 耦合到第三电流的第二阻抗器和低电压源; 耦合到第一，第二和第三电流的第三电流镜，第一电流被认为是第三电流镜单元的参考电流，因此流过第一阻抗器的电流是第一电流，流过第二阻抗器的是第四电流。

8. 发明申请

US20080019192A1 Memory and multi-state sense amplifier thereof 有权
标题翻译：存储器和多状态读出放大器
公开(公告)号：US20080019192A1
公开(公告)日：2008-01-24
申请号：US11797725
申请日：2007-05-07
申请人： Min-Chuan Wang , Ching-Sheng Lin , Chia-Pao Chang , Keng-Li Su
发明人： Min-Chuan Wang , Ching-Sheng Lin , Chia-Pao Chang , Keng-Li Su
IPC分类号： G11C7/20
CPC分类号： G11C7/14 , G11C7/06 , G11C7/062 , G11C11/5642 , G11C2207/063 , G11C2211/5634 , G11C2211/5645
摘要： The invention provides a multi-state sense amplifier, coupled to at least one memory cell and a plurality of reference cells. The source follower, coupled between a first node and the output terminal of the memory cell, clamps the voltage drop across the memory cell to generate a memory cell current flowing through the first node. The source follower circuit, coupled between a plurality of second nodes and the output terminals of the reference cells, clamps the voltage drops across the reference cells to generate a plurality of reference currents respectively flowing through the second nodes. The current mirror circuit, coupled to the first node and the second nodes, duplicates the memory cell current of the first node to affect the reference currents on the second nodes, thereby generating a memory cell voltage on the first node and a plurality of reference voltages on the second nodes.
摘要翻译：本发明提供一种耦合到至少一个存储单元和多个参考单元的多状态读出放大器。耦合在第一节点和存储器单元的输出端之间的源极跟随器钳位在存储器单元两端的电压降，以产生流经第一节点的存储单元电流。耦合在多个第二节点和参考单元的输出端子之间的源极跟随器电路钳位参考单元上的电压降，以产生分别流过第二节点的多个参考电流。耦合到第一节点和第二节点的电流镜像电路复制第一节点的存储器单元电流，以影响第二节点上的参考电流，从而在第一节点上产生存储单元电压，并产生多个参考电压在第二个节点上。

9. 发明申请

US20070170956A1 Sense amplifier 有权
标题翻译：感应放大器
公开(公告)号：US20070170956A1
公开(公告)日：2007-07-26
申请号：US11515882
申请日：2006-09-06
申请人： Keng-Li Su , Chia-Pao Chang , Chin-Sheng Lin
发明人： Keng-Li Su , Chia-Pao Chang , Chin-Sheng Lin
IPC分类号： H03F3/45
CPC分类号： H03F3/345 , G11C7/062 , G11C7/067 , G11C2207/063 , H03F3/45273 , H03F2200/453 , H03F2200/462
摘要： The invention relates to a sense amplifier comprising the following element: a first current mirror unit coupled to a high voltage source, outputting a first current and a second current according to a first reference current, wherein the second current is twice the first current; a second current mirror unit coupled to a high voltage source, outputting a third current according to a second reference current; a first impedor coupled to the second current and a low voltage source; a second impedor coupled to the third current and a low voltage source; a third current mirror coupled to the first, second and third currents, and the first current is regarded as the reference current of the third current mirror unit, thus, the current which flows through the first impedor is the first current, and the current which flows through the second impedor is a fourth current.
摘要翻译：本发明涉及一种包括以下元件的读出放大器：耦合到高电压源的第一电流镜单元，根据第一参考电流输出第一电流和第二电流，其中第二电流是第一电流的两倍; 耦合到高电压源的第二电流镜单元，根据第二参考电流输出第三电流; 耦合到第二电流的第一阻抗器和低电压源; 耦合到第三电流的第二阻抗器和低电压源; 耦合到第一，第二和第三电流的第三电流镜，第一电流被认为是第三电流镜单元的参考电流，因此流过第一阻抗器的电流是第一电流，流过第二阻抗器的是第四电流。

10. 发明授权

US07554836B2 Data write in control circuit for toggle magnetic random access memory 失效
标题翻译：数据写入控制电路用于切换磁性随机存取存储器
公开(公告)号：US07554836B2
公开(公告)日：2009-06-30
申请号：US11966240
申请日：2007-12-28
申请人： Young-Shying Chen , Chung-Chih Wang , Chia-Pao Chang , Chien-Chung Hung
发明人： Young-Shying Chen , Chung-Chih Wang , Chia-Pao Chang , Chien-Chung Hung
IPC分类号： G11C17/00
CPC分类号： G11C11/16 , G11C11/1693
摘要： A data write in control circuit for magnetic random access memory is configured with a first transistor, a second transistor connected to the first transistor, a transmission gate connected to the first transistor, a comparator having two input terminal connected to the first transistor, a storage capacitor having one end connected to the first transistor and the other end connected to a power source or a ground, and a logic circuit having one end connected to the output terminal of the comparator and the other end receiving data to be written in.
摘要翻译：用于磁性随机存取存储器的控制电路中的数据写入配置有第一晶体管，连接到第一晶体管的第二晶体管，连接到第一晶体管的传输栅极，具有连接到第一晶体管的两个输入端的比较器，电容器，其一端连接到第一晶体管，另一端连接到电源或地，以及逻辑电路，其一端连接到比较器的输出端，另一端接收要写入的数据。

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