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    • 2. 发明申请
    • APPARATUS FOR FABRICATING IB-IIIA-VIA2 COMPOUND SEMICONDUCTOR THIN FILMS
    • 用于制备IB-IIIA-VIA2化合物半导体薄膜的装置
    • US20130008380A1
    • 2013-01-10
    • US13610798
    • 2012-09-11
    • Chia-Chih CHUANGYu Huang
    • Chia-Chih CHUANGYu Huang
    • H01L21/203
    • H01L21/02568C23C14/0623C23C14/228C23C14/24H01L21/02614
    • An apparatus for fabricating IB-IIIA-VIA2 compound semiconductor thin films is provided, including a reaction chamber, a pressure control unit connected with the reaction chamber, a pedestal disposed in the reaction chamber wherein the at least one substrate includes elements of group IB and group IIIA, a first group VIA element supply unit connecting with the reaction chamber for providing vaporized first group VIA elements into the reaction chamber, and a plasma unit disposed in the reaction chamber. In one embodiment, during a reaction in the reaction chamber, the vaporized first group VIA elements flow through the high density plasma region and transform into ionized first group VIA elements, and the ionized first group VIA elements diffuse into the at least one substrate comprising elements of group IB and group IIIA to form a IB-IIIA-VIA2 compound semiconductor thin film thereover.
    • 提供一种用于制造IB-IIIA-VIA2化合物半导体薄膜的装置,包括反应室,与反应室连接的压力控制单元,设置在反应室中的基座,其中至少一个基板包括组1B和 组IIIA,与反应室连接的用于将蒸发的第一组VIA元件提供到反应室中的第一组VIA元件供应单元和设置在反应室中的等离子体单元。 在一个实施方案中,在反应室中的反应期间,蒸发的第一组VIA元素流过高密度等离子体区域并转化成电离的第一组VIA元素,并且离子化的第一组VIA元素扩散到至少一个包含元素 的IB和IIIA族以形成IB-IIIA-VIA2化合物半导体薄膜。
    • 8. 发明授权
    • Compactor independent direct diagnosis of test hardware
    • 压缩机独立直接诊断测试硬件
    • US08280688B2
    • 2012-10-02
    • US12790049
    • 2010-05-28
    • Yu HuangWu-Tung ChengJanusz Rajski
    • Yu HuangWu-Tung ChengJanusz Rajski
    • G06F11/30G06F11/00
    • G01R31/318547G06F11/267G06F11/27
    • Methods, apparatus, and systems for performing fault diagnosis are disclosed herein. In one exemplary embodiment, a failure log is received comprising entries indicative of compressed test responses to chain patterns and compressed test responses to scan patterns. A faulty scan chain in the circuit-under-test is identified based at least in part on one or more of the entries indicative of the compressed test responses to chain patterns. One or more faulty scan cell candidates in the faulty scan chain are identified based at least in part on one or more of the entries indicative of the compressed test responses to scan patterns. The one or more identified scan cell candidates can be reported. Computer-readable media comprising computer-executable instructions for causing a computer to perform any of the disclosed methods are also provided. Likewise, computer-readable media storing lists of fault candidates identified by any of the disclosed methods are also provided.
    • 本文公开了用于执行故障诊断的方法,装置和系统。 在一个示例性实施例中,接收到故障日志,其包括指示对链模式的压缩测试响应的条目和对扫描模式的压缩测试响应。 至少部分地基于指示压缩的测试对链模式的测试响应的一个或多个条目来识别被测电路中的有缺陷的扫描链。 至少部分地基于指示对扫描模式的压缩测试响应的一个或多个条目来识别故障扫描链中的一个或多个错误的扫描小区候选。 可以报​​告一个或多个识别的扫描单元候选。 还提供了包括用于使计算机执行任何所公开的方法的计算机可执行指令的计算机可读介质。 同样,还提供了存储通过任何所公开的方法识别的故障候选列表的计算机可读介质。