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1. 发明授权

US06559566B2 End shield constructed with a separate component holder 有权
公开(公告)号：US06559566B2
公开(公告)日：2003-05-06
申请号：US09782458
申请日：2001-02-12
申请人： Chetan O. Modi , Stanley C. Meyer , Donald Morgan , Thomas A. Pacello
发明人： Chetan O. Modi , Stanley C. Meyer , Donald Morgan , Thomas A. Pacello
IPC分类号： H02K500
CPC分类号： H02K5/15 , H02K17/30
摘要： An end shield for an electric motor is provided with an integrally formed component compartment. The component compartment is mounted on a peripheral edge of the end shield. The component compartment has a hollow interior volume and a motor component used for controlling operation of the motor is received in the component compartment. The motor component is housed and protected in the component compartment.

2. 发明申请

US20070171753A1 Method and system for low power refresh of dynamic random access memories 审中-公开
标题翻译：动态随机存取存储器的低功率刷新方法和系统
公开(公告)号：US20070171753A1
公开(公告)日：2007-07-26
申请号：US11731058
申请日：2007-03-30
申请人： Donald Morgan , Greg Blodgett
发明人： Donald Morgan , Greg Blodgett
IPC分类号： G11C7/00
CPC分类号： G11C11/40622 , G11C5/14 , G11C11/406 , G11C11/408 , G11C2211/4061 , G11C2211/4067
摘要： A method and system for operating a DRAM device in either a high power, full density mode or a low power, half density mode. In the full density mode, each data bit is stored in a single memory cell, and, in the half density mode, each data bit is stored in two memory cells that are refreshed at the same time to permit a relatively slow refresh rate. When transitioning from the full density mode to the half density mode, data are copied from each row of memory cells storing data to an adjacent row of memory cells. The adjacent row of memory cells are made free to store data from an adjacent row by remapping the most significant bit of the row address to the least significant bit of the row address, and then remapping all of the remaining bits of the row address to the next highest order bit.
摘要翻译：一种用于以高功率，全密度模式或低功率，半密度模式操作DRAM装置的方法和系统。在全密度模式下，每个数据位被存储在单个存储器单元中，并且在半密度模式下，每个数据位被存储在同时刷新的两个存储器单元中以允许相对较慢的刷新率。当从全密度模式转换到半密度模式时，将数据从存储数据的每行存储单元复制到相邻行的存储器单元。通过将行地址的最高有效位重新映射到行地址的最低有效位，然后将行地址的所有剩余位重新映射到相邻行的相应行的相邻行，使相邻行的存储器单元可以存储来自相邻行的数据下一个最高位。

3. 发明授权

US5834869A Blower motor housing 失效
标题翻译：风机电机外壳
公开(公告)号：US5834869A
公开(公告)日：1998-11-10
申请号：US867626
申请日：1997-06-02
申请人： Donald Morgan , Nicholas R. Daniels
发明人： Donald Morgan , Nicholas R. Daniels
IPC分类号： H02K5/167 , H02K7/14 , H02K5/16
CPC分类号： H02K5/1675 , H02K7/14
摘要： A blower motor housing for a fuel burner has a generally "cup" shaped configuration with an open end that communicates with an opening in a side wall of a burner housing. The motor housing is mounted to the burner housing with the open end in register with the opening in the burner housing, thereby joining the interior of the motor housing with the interior of the burner housing. The electric motor is mounted within the motor housing with at least a portion of the stator winding extending axially beyond the open end of the motor housing and into the interior of the burner housing. A squirrel cage blower wheel is mounted to the motor shaft substantially concentric with the stator winding and extends at least partially along the axial length of the stator winding so that, during operation of the burner, cool intake air is moved past the stator winding as it is drawn into the blower wheel.
摘要翻译：用于燃料燃烧器的鼓风机马达壳体具有大致“杯”形构造，其开口端与燃烧器壳体的侧壁中的开口连通。马达壳体安装到燃烧器壳体上，开口端与燃烧器壳体中的开口对准，从而将马达壳体的内部与燃烧器壳体的内部连接。电动机安装在电动机壳体内，其中定子绕组的至少一部分轴向延伸超过电动机壳体的开口端并进入燃烧器壳体的内部。鼠笼式鼓风机叶轮安装到基本上与定子绕组同心的马达轴上，并且至少部分地沿着定子绕组的轴向长度延伸，使得在燃烧器的操作期间，冷却的进气被移动经过定子绕组被吸入鼓风机轮。

4. 发明授权

US07536665B1 User-guided autorouting 有权
标题翻译：用户引导自动布线
公开(公告)号：US07536665B1
公开(公告)日：2009-05-19
申请号：US11492021
申请日：2006-07-25
申请人： Greg Horlick , Randall Lawson , Donald Morgan , Paul Musto , Joe Smedley , Ken Wadland , Richard Woodward , Sean Bergan , Walter M. Katz
发明人： Greg Horlick , Randall Lawson , Donald Morgan , Paul Musto , Joe Smedley , Ken Wadland , Richard Woodward , Sean Bergan , Walter M. Katz
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： A mechanism is provided for the user to define a circuit design intent or strategy in the form of data that is stored with the design database. An autorouter then uses this guidance from the user to create a plan for routing the design. The user can then modify their guidance to the router until the results for the plan are acceptable. Using the planned flow, the autorouter can complete the design, creating detailed paths including etch segments and vias. Allowing such interaction with an autorouter significantly reduces the routing time and hence time-to-market.
摘要翻译：提供了一种用于用户以与设计数据库一起存储的数据形式定义电路设计意图或策略的机制。然后，自动布线器使用用户的指导来创建路由设计的计划。然后，用户可以修改他们对路由器的指导，直到计划的结果可以接受。使用计划流程，自动布线器可以完成设计，创建包括蚀刻段和通孔的详细路径。允许与自动布线器的这种交互显着地减少了路由时间，从而缩短了上市时间。

5. 发明申请

US20070171752A1 Method and system for low power refresh of dynamic random access memories 失效
公开(公告)号：US20070171752A1
公开(公告)日：2007-07-26
申请号：US11731039
申请日：2007-03-30
申请人： Donald Morgan , Greg Blodgett
发明人： Donald Morgan , Greg Blodgett
IPC分类号： G11C7/00
CPC分类号： G11C11/40622 , G11C5/14 , G11C11/406 , G11C11/408 , G11C2211/4061 , G11C2211/4067
摘要： A method and system for operating a DRAM device in either a high power, full density mode or a low power, half density mode. In the full density mode, each data bit is stored in a single memory cell, and, in the half density mode, each data bit is stored in two memory cells that are refreshed at the same time to permit a relatively slow refresh rate. When transitioning from the full density mode to the half density mode, data are copied from each row of memory cells storing data to an adjacent row of memory cells. The adjacent row of memory cells are made free to store data from an adjacent row by remapping the most significant bit of the row address to the least significant bit of the row address, and then remapping all of the remaining bits of the row address to the next highest order bit.

6. 发明申请

US20050083763A1 Multiple configuration multiple chip memory device and method 失效
公开(公告)号：US20050083763A1
公开(公告)日：2005-04-21
申请号：US10961576
申请日：2004-10-08
申请人： Donald Morgan , Todd Merritt
发明人： Donald Morgan , Todd Merritt
IPC分类号： G11C5/06 , G11C8/00 , G11C8/12 , G11C11/408
CPC分类号： G11C11/408 , G11C5/06 , G11C8/00
摘要： A memory integrated circuit can be used either alone or as a pair to provide a memory device having twice the capacity of the single integrated circuit. The larger capacity memory device is addressed using an extra row address bit. The extra row address bit is used either to alternately enable each of the memory integrated circuits in one configuration or is remapped to become an extra column address bit in another configuration.

7. 发明授权

US5305438A Video storage, processing, and distribution system using recording format independent hierarchical storages and processors 失效
标题翻译：视频存储，处理和分配系统使用记录格式独立的分层存储和处理器
公开(公告)号：US5305438A
公开(公告)日：1994-04-19
申请号：US885502
申请日：1992-05-19
申请人： Michael T. MacKay , Donald Morgan , Matthew R. Adams
发明人： Michael T. MacKay , Donald Morgan , Matthew R. Adams
IPC分类号： H04N5/76 , G11B27/00 , G11B27/031 , H04N5/765 , H04N5/782 , H04N5/91 , H04N5/92 , H04N5/926 , H04N7/26 , G06F15/62
CPC分类号： H04N5/91 , G11B27/002 , G11B27/031 , H04N19/40 , H04N5/9261 , G11B2220/41 , G11B2220/415 , G11B2220/90 , H04N5/782
摘要： A video image storage, processing, and distribution system is provided with a processing and a distribution subsystem. The processing subsystem comprises at least one high performance video signal input device, one recording format independent hierarchy of storage, at least one recording format and resolution independent video data processor, and a high performance digital data recorder. The distribution subsystem comprises an archive library of recording format independent high performance digital tapes and instrument data players, a recording format independent hierarchy of staging storage, at least one recording format independent video distribution control processor, and a RF signal generation subsystem. The hierarchical storage of the processing subsystem comprises a first level of high performance random access mass storage amenable to large volume storage and high performance file transfers, and a second level of high performance random access storage amenable to high performance byte manipulations. The hierarchical staging storage comprises a first level of high performance random access storage amenable to high performance file transfers. Together, these elements cooperate to store, process, and distribute a high volume of video data on demand.
摘要翻译：视频图像存储，处理和分配系统具有处理和分发子系统。处理子系统包括至少一个高性能视频信号输入设备，一个记录格式独立的存储层级，至少一个记录格式和独立于分辨率的视频数据处理器以及高性能数字数据记录器。分发子系统包括记录格式独立的高性能数字磁带和仪器数据播放器的归档库，分段存储的记录格式独立层级，至少一个记录格式独立的视频分配控制处理器和RF信号生成子系统。处理子系统的分级存储包括适于大容量存储和高性能文件传输的第一级高性能随机存取大容量存储，以及适用于高性能字节操作的第二级高性能随机存取存储。分级分级存储包括适于高性能文件传输的第一级高性能随机存取存储器。这些元素一起合作，按需存储，处理和分发大量的视频数据。

8. 发明申请

US20070005390A1 BUSINESS CERTIFICATION METHOD 审中-公开
标题翻译：业务认证方法
公开(公告)号：US20070005390A1
公开(公告)日：2007-01-04
申请号：US11428404
申请日：2006-07-02
申请人： Donald Morgan
发明人： Donald Morgan
IPC分类号： G06Q99/00
CPC分类号： G06Q10/087 , G06Q30/018 , G06Q50/10
摘要： An improved method for certifying service/product providers. This is accomplished by first determining the requirements of operation of such service/product provider, such as insurance coverage, bonding information and the like. These requirements are then verified as being met so that a consumer or business partner need not know or verify the requirements, or verify that the requirements have been sufficiently satisfied. Once all the requirements of the service/product provider are verified by the certifier, the service/product provider's name and other selected information can be published so that potential customers, business partners and/or employers can more easily find the service/product providers which meet not only their needs, but service/product providers which meet all of the legal and regulatory requirements that may be applicable in a given field, geographical area or other subset of the business community.
摘要翻译：一种用于认证服务/产品提供商的改进方法。这是通过首先确定这种服务/产品提供商的操作要求，例如保险覆盖，绑定信息等来实现的。然后验证这些要求是否符合要求，以便消费者或业务合作伙伴不需要知道或验证要求，或验证要求是否得到充分满足。一旦服务/产品提供商的所有要求都由验证者验证，服务/产品提供商的名称和其他选定的信息可以被发布，以便潜在客户，商业伙伴和/或雇主可以更容易地找到服务/产品提供者满足他们的需求，但满足可能适用于指定领域，地理区域或商业社区其他子集的所有法律和法规要求的服务/产品提供商。

9. 发明申请

US20060181947A1 Method and system for low power refresh of dynamic random access memories 失效
公开(公告)号：US20060181947A1
公开(公告)日：2006-08-17
申请号：US11402479
申请日：2006-04-11
申请人： Donald Morgan , Greg Blodgett
发明人： Donald Morgan , Greg Blodgett
IPC分类号： G11C7/00
CPC分类号： G11C11/40622 , G11C5/14 , G11C11/406 , G11C11/408 , G11C2211/4061 , G11C2211/4067
摘要： A method and system for operating a DRAM device in either a high power, full density mode or a low power, half density mode. In the full density mode, each data bit is stored in a single memory cell, and, in the half density mode, each data bit is stored in two memory cells that are refreshed at the same time to permit a relatively slow refresh rate. When transitioning from the full density mode to the half density mode, data are copied from each row of memory cells storing data to an adjacent row of memory cells. The adjacent row of memory cells are made free to store data from an adjacent row by remapping the most significant bit of the row address to the least significant bit of the row address, and then remapping all of the remaining bits of the row address to the next highest order bit.

10. 发明授权

US06346790B1 Induction motor system with an induction motor and an electrically isolated voltage modulation motor controller 失效
标题翻译：感应电机系统带有感应电机和电气隔离电压调节电机控制器
公开(公告)号：US06346790B1
公开(公告)日：2002-02-12
申请号：US09548047
申请日：2000-04-12
申请人： William Harry Kemp , Dale Andrew Van Spengen , Donald Morgan
发明人： William Harry Kemp , Dale Andrew Van Spengen , Donald Morgan
IPC分类号： H02P318
CPC分类号： H02P25/04
摘要： An induction motor system operable in a wet environment comprises an induction motor and an apparatus for controlling the speed of the motor. The motor is adapted to be coupled to an AC source for supplying an AC signal. The motor includes a rotor having rotor laminations. The reflected rotor resistance over reflected rotor reactance ratio of the motor is adjusted to be greater than one. The controlling apparatus includes a switching device, user controls, controller means and isolation means. The switching device is connected in series with the motor and is operative in either a high impedance state wherein significant current flow through the motor is prevented or a low impedance state wherein current flow through the motor is substantially undisturbed. The user controls provide motor speed input signals. The controller means receives the motor speed input signals from the user controls, and switches the switching device between its low and high impedance states in a predetermined sequence for inducing a phase angle delay in the AC signal. The isolation means electrically isolates the controller means from the AC source and includes coupling means for optically coupling the switching device to the controller means.
摘要翻译：在潮湿环境中可操作的感应电动机系统包括感应电动机和用于控制电动机速度的装置。电动机适于耦合到用于提供AC信号的AC电源。电动机包括具有转子叠片的转子。电机反射转子电抗比反映的转子电抗比被调整为大于1。控制装置包括开关装置，用户控制装置，控制装置和隔离装置。开关装置与电动机串联连接，并且在高阻抗状态下工作，其中防止电流流过电动机的大量电流或其中电流流过电动机的电流基本上不受干扰的低阻抗状态。用户控制提供电机速度输入信号。控制器装置从用户控制器接收电动机速度输入信号，并以预定的顺序将开关装置切换在其低阻抗状态和高阻态之间，以引起AC信号中的相位角延迟。隔离装置将控制器装置与AC源电隔离，并且包括用于将开关装置光耦合到控制器装置的耦合装置。

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