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1. 发明申请

US20050077627A1 Copper wiring with high temperature superconductor (HTS) layer 有权
标题翻译：铜线与高温超导体（HTS）层
公开(公告)号：US20050077627A1
公开(公告)日：2005-04-14
申请号：US10684224
申请日：2003-10-10
申请人： Chen-Hua Yu , Horng-Huei Tseng , Chenming Hu , Chao-Hsiung Wang
发明人： Chen-Hua Yu , Horng-Huei Tseng , Chenming Hu , Chao-Hsiung Wang
IPC分类号： H01L21/768 , H01L23/532 , H01L21/4763 , H01L23/48
CPC分类号： H01L21/76846 , H01L21/76849 , H01L21/7685 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of forming the semiconductor devices using an HTS (High Temperature Superconductor) layer in combination with a typical diffusion layer between the dielectric material and the copper (or other metal) conductive wiring. The HTS layer includes a superconductor material comprised of barium copper oxide and a rare earth element. The rare earth element yttrium is particularly suitable. For semiconductor devices having other semiconductor circuits or elements above the wiring, a capping layer of HTS material is deposited over the wiring before a cover layer of dielectric is deposited.
摘要翻译：使用HTS（高温超导体）层与介电材料和铜（或其它金属）导电布线之间的典型扩散层组合形成半导体器件的半导体器件和方法。 HTS层包括由氧化钡钡和稀土元素构成的超导体材料。稀土元素钇特别适合。对于具有其它半导体电路或布线之上的元件的半导体器件，在沉积覆盖层的电介质之前，在布线上沉积HTS材料的覆盖层。

2. 发明授权

US07105928B2 Copper wiring with high temperature superconductor (HTS) layer 有权
标题翻译：铜线与高温超导体（HTS）层
公开(公告)号：US07105928B2
公开(公告)日：2006-09-12
申请号：US10684224
申请日：2003-10-10
申请人： Chen-Hua Yu , Horng-Huei Tseng , Chenming Hu , Chao-Hsiung Wang
发明人： Chen-Hua Yu , Horng-Huei Tseng , Chenming Hu , Chao-Hsiung Wang
IPC分类号： H01L23/52
CPC分类号： H01L21/76846 , H01L21/76849 , H01L21/7685 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and methods of forming the semiconductor devices using an HTS (High Temperature Superconductor) layer in combination with a typical diffusion layer between the dielectric material and the copper (or other metal) conductive wiring. The HTS layer includes a superconductor material comprised of barium copper oxide and a rare earth element. The rare earth element yttrium is particularly suitable. For semiconductor devices having other semiconductor circuits or elements above the wiring, a capping layer of HTS material is deposited over the wiring before a cover layer of dielectric is deposited.
摘要翻译：使用HTS（高温超导体）层与介电材料和铜（或其它金属）导电布线之间的典型扩散层组合形成半导体器件的半导体器件和方法。 HTS层包括由氧化钡钡和稀土元素构成的超导体材料。稀土元素钇特别适合。对于具有其它半导体电路或布线之上的元件的半导体器件，在沉积覆盖层的电介质之前，在布线上沉积HTS材料的覆盖层。

3. 发明授权

US07452805B2 Aluminum based conductor for via fill and interconnect 有权
标题翻译：用于通孔填充和互连的铝基导体
公开(公告)号：US07452805B2
公开(公告)日：2008-11-18
申请号：US11385923
申请日：2006-03-20
申请人： Chao-Hsiung Wang , Chien-Chao Huang , Chenming Hu , Horng-Huei Tseng
发明人： Chao-Hsiung Wang , Chien-Chao Huang , Chenming Hu , Horng-Huei Tseng
IPC分类号： H01L21/4763
CPC分类号： H01L21/76843 , H01L21/2855 , H01L21/76838 , H01L21/76849 , H01L21/76877
摘要： A semiconductor device including a dielectric layer having a opening form therein having a cross-sectional area of less than 1 μm2 and a PVD aluminum base conductor filled in the opening.
摘要翻译：一种半导体器件，包括其中具有小于1μm2的横截面积的开口形式的电介质层和填充在该开口中的PVD铝基底导体。

4. 发明申请

US20070218686A1 Alluminum base conductor for via fill interconnect 有权
标题翻译：用于通孔填充互连的铝基底导体
公开(公告)号：US20070218686A1
公开(公告)日：2007-09-20
申请号：US11385923
申请日：2006-03-20
申请人： Chao-Hsiung Wang , Chien-Chao Huang , Chenming Hu , Horng-Huei Tseng
发明人： Chao-Hsiung Wang , Chien-Chao Huang , Chenming Hu , Horng-Huei Tseng
IPC分类号： H01L21/44
CPC分类号： H01L21/76843 , H01L21/2855 , H01L21/76838 , H01L21/76849 , H01L21/76877
摘要： A semiconductor device including a dielectric layer having a opening form therein having a cross-sectional area of less than 1 μm2 and a PVD aluminum base conductor filled in the opening.
摘要翻译：一种半导体器件，包括其中具有小于1μm2的横截面积的开口形式的电介质层和填充在该开口中的PVD铝基底导体。

5. 发明授权

US06958291B2 Interconnect with composite barrier layers and method for fabricating the same 有权
标题翻译：与复合阻挡层互连及其制造方法
公开(公告)号：US06958291B2
公开(公告)日：2005-10-25
申请号：US10654757
申请日：2003-09-04
申请人： Chen-Hua Yu , Horng-Huei Tseng , Syun-Ming Jang , Chenming Hu
发明人： Chen-Hua Yu , Horng-Huei Tseng , Syun-Ming Jang , Chenming Hu
IPC分类号： H01L21/768 , H01L21/4763
CPC分类号： H01L21/76846
摘要： Composite ALD-formed diffusion barrier layers. In a preferred embodiment, a composite conductive layer is composed of a diffusion barrier layer and/or a low-resistivity metal layer formed by atomic layer deposition (ALD) lining a damascene opening in dielectrics, serving as diffusion blocking and/or adhesion improvement. The preferred composite diffusion barrier layers are dual titanium nitride layers or dual tantalum nitride layers, triply laminar of tantalum, tantalum nitride and tantalum-rich nitride, or tantalum, tantalum nitride and tantalum, formed sequentially on the opening by way of ALD.
摘要翻译：复合ALD形成的扩散阻挡层。在优选实施例中，复合导电层由扩散阻挡层和/或由电介质中的镶嵌开口衬底的原子层沉积（ALD）形成的低电阻金属层组成，用作扩散阻挡和/或粘附改善。优选的复合扩散阻挡层是通过ALD在开口上依次形成的双氮化钛层或双氮化钽层，三层层状的钽，氮化钽和富钽的氮化物，或钽，氮化钽和钽。

6. 发明申请

US20060027932A1 Interconnect with composite barrier layers and method for fabricating the same 有权
标题翻译：与复合阻挡层互连及其制造方法
公开(公告)号：US20060027932A1
公开(公告)日：2006-02-09
申请号：US11240216
申请日：2005-09-30
申请人： Chen-Hua Yu , Horng-Huei Tseng , Syun-Ming Jang , Chenming Hu
发明人： Chen-Hua Yu , Horng-Huei Tseng , Syun-Ming Jang , Chenming Hu
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L21/76846
摘要： Composite ALD-formed diffusion barrier layers. In a preferred embodiment, a composite conductive layer is composed of a diffusion barrier layer and/or a low-resistivity metal layer formed by atomic layer deposition (ALD) lining a damascene opening in dielectrics, serving as diffusion blocking and/or adhesion improvement. The preferred composite diffusion barrier layers are dual titanium nitride layers or dual tantalum nitride layers, triply laminar of tantalum, tantalum nitride and tantalum-rich nitride, or tantalum, tantalum nitride and tantalum, formed sequentially on the opening by way of ALD.
摘要翻译：复合ALD形成的扩散阻挡层。在优选实施例中，复合导电层由扩散阻挡层和/或由电介质中的镶嵌开口衬底的原子层沉积（ALD）形成的低电阻金属层组成，用作扩散阻挡和/或粘附改善。优选的复合扩散阻挡层是通过ALD在开口上依次形成的双氮化钛层或双氮化钽层，三层层状的钽，氮化钽和富钽的氮化物，或钽，氮化钽和钽。

7. 发明授权

US07265447B2 Interconnect with composite layers and method for fabricating the same 有权
标题翻译：与复合层互连及其制造方法
公开(公告)号：US07265447B2
公开(公告)日：2007-09-04
申请号：US11240216
申请日：2005-09-30
申请人： Chen-Hua Yu , Horng-Huei Tseng , Syun-Ming Jang , Chenming Hu
发明人： Chen-Hua Yu , Horng-Huei Tseng , Syun-Ming Jang , Chenming Hu
IPC分类号： H01L23/48
CPC分类号： H01L21/76846
摘要： Composite ALD-formed diffusion barrier layers. In a preferred embodiment, a composite conductive layer is composed of a diffusion barrier layer and/or a low-resistivity metal layer formed by atomic layer deposition (ALD) lining a damascene opening in dielectrics, serving as diffusion blocking and/or adhesion improvement. The preferred composite diffusion barrier layers are dual titanium nitride layers or dual tantalum nitride layers, triply laminar of tantalum, tantalum nitride and tantalum-rich nitride, or tantalum, tantalum nitride and tantalum, formed sequentially on the opening by way of ALD.
摘要翻译：复合ALD形成的扩散阻挡层。在优选实施例中，复合导电层由扩散阻挡层和/或由电介质中的镶嵌开口衬底的原子层沉积（ALD）形成的低电阻金属层组成，用作扩散阻挡和/或粘附改善。优选的复合扩散阻挡层是通过ALD在开口上依次形成的双氮化钛层或双氮化钽层，三层层状的钽，氮化钽和富钽的氮化物，或钽，氮化钽和钽。

8. 发明申请

US20050054191A1 Interconnect with composite barrier layers and method for fabricating the same 有权
公开(公告)号：US20050054191A1
公开(公告)日：2005-03-10
申请号：US10654757
申请日：2003-09-04
申请人： Chen-Hua Yu , Horng-Huei Tseng , Syun-Ming Jang , Chenming Hu
发明人： Chen-Hua Yu , Horng-Huei Tseng , Syun-Ming Jang , Chenming Hu
IPC分类号： H01L21/768 , H01L21/4763
CPC分类号： H01L21/76846
摘要： Composite ALD-formed diffusion barrier layers. In a preferred embodiment, a composite conductive layer is composed of a diffusion barrier layer and/or a low-resistivity metal layer formed by atomic layer deposition (ALD) lining a damascene opening in dielectrics, serving as diffusion blocking and/or adhesion improvement. The preferred composite diffusion barrier layers are dual titanium nitride layers or dual tantalum nitride layers, triply laminar of tantalum, tantalum nitride and tantalum-rich nitride, or tantalum, tantalum nitride and tantalum, formed sequentially on the opening by way of ALD.

9. 发明申请

US20090155965A1 METHOD OF FABRICATING A NON-FLOATING BODY DEVICE WITH ENHANCED PERFORMANCE 有权
标题翻译：制造具有增强性能的非浮动体装置的方法
公开(公告)号：US20090155965A1
公开(公告)日：2009-06-18
申请号：US12391307
申请日：2009-02-24
申请人： Horng-Huei Tseng , Jhy-Chyum Guo , Chenming Hu , Da-Chi Lin
发明人： Horng-Huei Tseng , Jhy-Chyum Guo , Chenming Hu , Da-Chi Lin
IPC分类号： H01L21/336 , H01L21/762 , H01L21/76
CPC分类号： H01L29/7842 , H01L21/76232 , H01L21/76264 , H01L21/76283 , H01L29/0653 , H01L29/1054 , H01L29/7848 , H01L2924/0002 , H01L2924/00
摘要： Provided is a method that includes forming a first semiconductor layer on a semiconductor substrate, growing a second semiconductor layer on the first semiconductor layer, forming composite shapes on the first semiconductor layer, each composite shape comprising of an overlying oxide-resistant shape and an underlying second semiconductor shape, with portions of the first semiconductor layer exposed between the composite shapes, forming spacers on sides of the composite shapes, forming buried silicon oxide regions in exposed top portions of the first semiconductor layer, and in portions of the first semiconductor layer located underlying second semiconductor shapes, selectively removing the oxide-resistant shapes and spacers resulting in the second semiconductor shapes, and forming a semiconductor device in a second semiconductor shape wherein a first portion of the semiconductor device overlays the first semiconductor layer and wherein second portions of the semiconductor device overlays a buried silicon oxide region.
摘要翻译：提供了一种方法，其包括在半导体衬底上形成第一半导体层，在第一半导体层上生长第二半导体层，在第一半导体层上形成复合形状，每个复合形状包括上覆氧化物形状和基底第二半导体形状，第一半导体层的部分暴露在复合形状之间，在复合形状的侧面上形成间隔物，在第一半导体层的暴露的顶部形成掩埋的氧化硅区域，并且在第一半导体层的部分位置潜在的第二半导体形状，选择性地去除导致第二半导体形状的耐氧化形状和间隔物，以及形成第二半导体形状的半导体器件，其中半导体器件的第一部分覆盖第一半导体层，并且其中第二部分半导体器件叠加 y是一个埋置的氧化硅区域。

10. 发明申请

US20050156156A1 Method of fabricating a non-floating body device with enhanced performance 有权
标题翻译：制造具有增强性能的非浮体装置的方法
公开(公告)号：US20050156156A1
公开(公告)日：2005-07-21
申请号：US11032403
申请日：2005-01-10
申请人： Horng-Huei Tseng , Jyh-Chyurn Guo , Chenming Hu , Da-Chi Lin
发明人： Horng-Huei Tseng , Jyh-Chyurn Guo , Chenming Hu , Da-Chi Lin
IPC分类号： H01L21/762 , H01L29/06 , H01L29/10
CPC分类号： H01L29/7842 , H01L21/76232 , H01L21/76264 , H01L21/76283 , H01L29/0653 , H01L29/1054 , H01L29/7848 , H01L2924/0002 , H01L2924/00
摘要： Provided is a semiconductor transistor device including a substrate having at least two regions, a semiconductive region extending to a first surface of the substrate and an insulative region extending to a second surface of the substrate. The semiconductor transistor device also includes a patterned semiconductor structure overlying both surfaces of the substrate. The patterned semiconductor structure includes a source or drain region overlying the second surface of the substrate. The semiconductor transistor device further includes a patterned gate structure overlying the patterned semiconductor structure.
摘要翻译：提供了一种半导体晶体管器件，其包括具有至少两个区域的衬底，延伸到衬底的第一表面的半导体区域和延伸到衬底的第二表面的绝缘区域。半导体晶体管器件还包括覆盖在衬底的两个表面上的图案化半导体结构。图案化的半导体结构包括覆盖在衬底的第二表面上的源极或漏极区域。半导体晶体管器件还包括覆盖图案化半导体结构的图案化栅极结构。

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