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    • 1. 发明申请
    • DEEP WELL STRUCTURES WITH SINGLE DEPTH SHALLOW TRENCH ISOLATION REGIONS
    • 深深的结构与单深深浅的分离分离区域
    • US20120178237A1
    • 2012-07-12
    • US13418994
    • 2012-03-13
    • Charles W. Koburger, IIIPeter ZeitzoffMariko Takayanagi
    • Charles W. Koburger, IIIPeter ZeitzoffMariko Takayanagi
    • H01L21/762
    • H01L21/76229H01L21/823878H01L27/0921
    • A method of forming a semiconductor device includes defining a first type region and a second type region in a substrate, t separated by one or more inter-well STI structures; etching and filling, in at least one of the first type region and the second type region, one or more intra-well STI structures for isolating semiconductor devices formed within a same polarity well, wherein the one or more inter-well STI structures are formed at a substantially same depth with respect to the one or more intra-well STI structures; implanting, a main well region, wherein a bottom of the main well region is disposed above a bottom of the one or more inter-well and intra-well STI features; and implanting, one or more deep well regions that couple main well regions, wherein the one or more deep well regions are spaced away from the one or more inter-well STI structures.
    • 一种形成半导体器件的方法包括:在衬底中限定由一个或多个阱间STI结构分离的第一类型区域和第二类型区域; 蚀刻和填充在第一类型区域和第二类型区域中的至少一个区域中的一个或多个井下STI结构,用于隔离在相同极性阱内形成的半导体器件,其中形成一个或多个阱间STI结构 相对于一个或多个井内STI结构基本相同的深度; 植入,主井区,其中主井区的底部设置在所述一个或多个井间和井内STI特征的底部之上; 以及植入,连接主井区域的一个或多个深井区域,其中所述一个或多个深井区域与所述一个或多个井间STI结构间隔开。
    • 2. 发明授权
    • Deep well structures with single depth shallow trench isolation regions
    • 深井结构,具有单深度浅沟槽隔离区
    • US08846486B2
    • 2014-09-30
    • US13418994
    • 2012-03-13
    • Charles W. Koburger, IIIPeter ZeitzoffMariko Takayanagi
    • Charles W. Koburger, IIIPeter ZeitzoffMariko Takayanagi
    • H01L21/761H01L21/8238H01L21/762H01L27/092
    • H01L21/76229H01L21/823878H01L27/0921
    • A method of forming a semiconductor device includes defining a first type region and a second type region in a substrate, t separated by one or more inter-well STI structures; etching and filling, in at least one of the first type region and the second type region, one or more intra-well STI structures for isolating semiconductor devices formed within a same polarity well, wherein the one or more inter-well STI structures are formed at a substantially same depth with respect to the one or more intra-well STI structures; implanting, a main well region, wherein a bottom of the main well region is disposed above a bottom of the one or more inter-well and intra-well STI features; and implanting, one or more deep well regions that couple main well regions, wherein the one or more deep well regions are spaced away from the one or more inter-well STI structures.
    • 一种形成半导体器件的方法包括:在衬底中限定由一个或多个阱间STI结构分离的第一类型区域和第二类型区域; 蚀刻和填充在第一类型区域和第二类型区域中的至少一个区域中的一个或多个井下STI结构,用于隔离在相同极性阱内形成的半导体器件,其中形成一个或多个阱间STI结构 相对于一个或多个井内STI结构基本相同的深度; 植入,主井区,其中主井区的底部设置在所述一个或多个井间和井内STI特征的底部之上; 以及植入,连接主井区域的一个或多个深井区域,其中所述一个或多个深井区域与所述一个或多个井间STI结构间隔开。
    • 3. 发明授权
    • Deep well structures with single depth shallow trench isolation regions
    • 深井结构,具有单深度浅沟槽隔离区
    • US08198700B2
    • 2012-06-12
    • US12691196
    • 2010-01-21
    • Charles W. Koburger, IIIPeter ZeitzoffMariko Takayanagi
    • Charles W. Koburger, IIIPeter ZeitzoffMariko Takayanagi
    • H01L27/092
    • H01L21/76229H01L21/823878H01L27/0921
    • A semiconductor device structure includes a first type region and a second type region defined in a substrate, the first type region and second type region separated by one or more inter-well shallow trench isolation (STI) structures. At least one of the first type region and the second type region has one or more intra-well STI structures formed therein for isolating semiconductor devices formed within a same polarity well. The inter-well STI structures are formed at a substantially same depth with respect to the intra-well STI structures. A main well region is formed such that a bottom of the main well region is disposed above a bottom of the inter-well and intra-well STI features. One or more deep well regions couple the main well regions otherwise isolated by the intra-well STI structures, wherein the deep well regions are spaced away from the inter-well STI structures.
    • 半导体器件结构包括限定在衬底中的第一类型区域和第二类型区域,第一类型区域和第二类型区域被一个或多个阱间浅沟槽隔离(STI)结构隔开。 第一类型区域和第二类型区域中的至少一个具有形成在其中的一个或多个井内STI结构,用于隔离在相同极性内形成的半导体器件。 井间STI结构相对于井内STI结构形成在基本相同的深度。 形成主阱区域,使得主阱区域的底部设置在井间和井内STI特征的底部之上。 一个或多个深井区域连接主井区域,否则由井内STI结构隔离,其中深井区域与井间STI结构间隔开。
    • 4. 发明申请
    • DEEP WELL STRUCTURES WITH SINGLE DEPTH SHALLOW TRENCH ISOLATION REGIONS
    • 深深的结构与单深深浅的分离分离区域
    • US20110175190A1
    • 2011-07-21
    • US12691196
    • 2010-01-21
    • Charles W. Koburger, IIIPeter ZeitzoffMariko Takayanagi
    • Charles W. Koburger, IIIPeter ZeitzoffMariko Takayanagi
    • H01L29/06H01L21/762
    • H01L21/76229H01L21/823878H01L27/0921
    • A semiconductor device structure includes a first type region and a second type region defined in a substrate, the first type region and second type region separated by one or more inter-well shallow trench isolation (STI) structures. At least one of the first type region and the second type region has one or more intra-well STI structures formed therein for isolating semiconductor devices formed within a same polarity well. The inter-well STI structures are formed at a substantially same depth with respect to the intra-well STI structures. A main well region is formed such that a bottom of the main well region is disposed above a bottom of the inter-well and intra-well STI features. One or more deep well regions couple the main well regions otherwise isolated by the intra-well STI structures, wherein the deep well regions are spaced away from the inter-well STI structures.
    • 半导体器件结构包括限定在衬底中的第一类型区域和第二类型区域,第一类型区域和第二类型区域被一个或多个阱间浅沟槽隔离(STI)结构隔开。 第一类型区域和第二类型区域中的至少一个具有形成在其中的一个或多个井内STI结构,用于隔离在相同极性内形成的半导体器件。 井间STI结构相对于井内STI结构形成在基本相同的深度。 形成主阱区域,使得主阱区域的底部设置在井间和井内STI特征的底部之上。 一个或多个深井区域连接主井区域,否则由井内STI结构隔离,其中深井区域与井间STI结构间隔开。