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1. 发明授权

US08497206B2 Method of processing backside copper layer for semiconductor chips 有权
标题翻译：处理半导体芯片背面铜层的方法
公开(公告)号：US08497206B2
公开(公告)日：2013-07-30
申请号：US12757458
申请日：2010-04-09
申请人： Chang-Hwang Hua , Wen Chu
发明人： Chang-Hwang Hua , Wen Chu
IPC分类号： H01L21/441 , H01L29/41
CPC分类号： H01L21/76898 , H01L21/76849 , H01L21/76873 , H01L21/78 , H01L23/481 , H01L29/0657 , H01L29/41708 , H01L29/41725 , H01L2924/0002 , H01L2924/00
摘要： A method of processing copper backside metal layer for semiconductor chips is disclosed. The backside of a semiconductor wafer, with electronic devices already fabricated on the front side, is first coated with a thin metal seed layer by either electroless plating or sputtering. Then, the copper backside metal layer is coated on the metal seed layer. The metal seed layer not only increases the adhesion between the front side metal layer and the copper backside metal layer through backside via holes, but also prevents metal peeling from semiconductor's substrate after subsequent fabrication processes, which is helpful for increasing the reliability of device performances. Suitable materials for the metal seed layer includes Pd, Au, Ni, Ag, Co, Cr, Pt, or their alloys, such as NiP, NiB, AuSn, Pt—Rh and the likes. The use of Pd as seed layer is particularly useful for the copper backside metal layer, because the Pd layer also acts as a diffusion barrier to prevent Cu atoms entering the semiconductor wafer.
摘要翻译：公开了一种用于半导体芯片的铜背面金属层的处理方法。已经制造在前侧的电子器件的半导体晶片的背面首先通过化学镀或溅射涂覆有薄金属种子层。然后，将铜背面金属层涂覆在金属籽晶层上。金属种子层不仅通过背面通孔增加了前侧金属层和铜背面金属层之间的粘附性，而且还防止了后续制造工艺中的半导体基板的金属剥离，这有助于提高器件性能的可靠性。用于金属种子层的合适材料包括Pd，Au，Ni，Ag，Co，Cr，Pt或它们的合金，例如NiP，NiB，AuSn，Pt-Rh等。使用Pd作为种子层对于铜背面金属层特别有用，因为Pd层还用作扩散阻挡层以防止Cu原子进入半导体晶片。

2. 发明申请

US20110059610A1 Method of using an electroless plating for depositing a metal seed layer for the subsequent plated backside metal film 有权
公开(公告)号：US20110059610A1
公开(公告)日：2011-03-10
申请号：US12656073
申请日：2010-01-15
申请人： Chang-Hwang Hua , Wen Chu
发明人： Chang-Hwang Hua , Wen Chu
IPC分类号： H01L21/3205
CPC分类号： H01L21/76898
摘要： A method of backside metal process for semiconductor electronic devices, particularly of using an electroless plating for depositing a metal seed layer for the plated backside metal film. The backside of a semiconductor wafer, with electronic devices already fabricated on the front side, is first coated with a thin metal seed layer by electroless plating. Then, the backside metal layer, such as a gold layer or a copper layer, is coated on the metal seed layer. The metal seed layer not only increases the adhesion between the front side metal layer and the backside metal layer through backside via holes, but also prevents metal peeling after subsequent fabrication processes. This is helpful for increasing the reliability of device performances. Suitable materials for the metal seed layer includes Pd, Au, Ni, Ag, Co, Cr, Cu, Pt, or their alloys, such as NiP, NiB, AuSn, Pt—Rh and the likes.

3. 发明授权

US08003532B2 Method of using an electroless plating for depositing a metal seed layer for the subsequent plated backside metal film 有权
标题翻译：使用化学镀以沉积后续镀覆的背面金属膜的金属种子层的方法
公开(公告)号：US08003532B2
公开(公告)日：2011-08-23
申请号：US12656073
申请日：2010-01-15
申请人： Chang-Hwang Hua , Wen Chu
发明人： Chang-Hwang Hua , Wen Chu
IPC分类号： H01L21/78 , H01L21/46 , H01L21/301 , H01L21/44
CPC分类号： H01L21/76898
摘要： A method of backside metal process for semiconductor electronic devices, particularly of using an electroless plating for depositing a metal seed layer for the plated backside metal film. The backside of a semiconductor wafer, with electronic devices already fabricated on the front side, is first coated with a thin metal seed layer by electroless plating. Then, the backside metal layer, such as a gold layer or a copper layer, is coated on the metal seed layer. The metal seed layer not only increases the adhesion between the front side metal layer and the backside metal layer through backside via holes, but also prevents metal peeling after subsequent fabrication processes. This is helpful for increasing the reliability of device performances. Suitable materials for the metal seed layer includes Pd, Au, Ni, Ag, Co, Cr, Cu, Pt, or their alloys, such as NiP, NiB, AuSn, Pt—Rh and the likes.
摘要翻译：一种用于半导体电子器件的背面金属工艺的方法，特别是使用化学镀来沉积用于镀覆的背面金属膜的金属籽晶层。已经制造在前侧的电子器件的半导体晶片的背面首先通过化学镀被薄金属种子层涂覆。然后，将金属层或铜层等背面金属层涂覆在金属种子层上。金属种子层不仅通过背面通孔增加前侧金属层和背面金属层之间的粘附力，而且防止后续制造工艺中的金属剥离。这有助于提高设备性能的可靠性。用于金属种子层的合适的材料包括Pd，Au，Ni，Ag，Co，Cr，Cu，Pt或它们的合金，例如NiP，NiB，AuSn，Pt-Rh等。

4. 发明授权

US08911551B2 Electroless plating apparatus and method 有权
标题翻译：化学镀设备及方法
公开(公告)号：US08911551B2
公开(公告)日：2014-12-16
申请号：US13196179
申请日：2011-08-02
申请人： Jason Chen , Nakano Liu , Winson Shao , Wen Chu , Chang-Hwang Hua
发明人： Jason Chen , Nakano Liu , Winson Shao , Wen Chu , Chang-Hwang Hua
IPC分类号： B05C11/00 , C23C18/16 , H01L21/768 , H01L21/288
CPC分类号： H01L21/288 , C23C18/1619 , C23C18/1666 , C23C18/1669 , H01L21/76843
摘要： An electroless plating apparatus and method designed specifically for plating at least one semiconductor wafer are disclosed. The apparatus comprises a container, a wafer holder, an electrolyte supplying unit, and an ultrasonic-vibration unit. The container is provided with at least an inlet and used for containing electrolyte. The wafer holder is provided within the container. The electrolyte supplying unit is used to supply the electrolyte into the container via the inlet. The ultrasonic-vibration unit consisting of at least one frequency ultrasonic transducer is disposed in the container for producing a uniform flow of electrolyte in the container. Thereby, the wafers can be uniformly plated, especially for wafers with fine via-holes or trench structures.
摘要翻译：公开了专门用于电镀至少一个半导体晶片的化学镀设备和方法。该装置包括容器，晶片保持器，电解质供给单元和超声波振动单元。容器设有至少一个入口并用于容纳电解质。晶片保持器设置在容器内。电解质供给单元用于经由入口将电解质供给到容器中。由至少一个频率超声波换能器组成的超声波振动单元设置在容器中，用于在容器中产生均匀的电解液流。因此，可以均匀地镀覆晶片，特别是对于具有精细通孔或沟槽结构的晶片。

5. 发明申请

US20110201192A1 METHOD OF PROCESSING BACKSIDE COPPER LAYER FOR SEMICONDUCTOR CHIPS 有权
标题翻译：用于半导体晶片的后端铜层的处理方法
公开(公告)号：US20110201192A1
公开(公告)日：2011-08-18
申请号：US12757458
申请日：2010-04-09
申请人： Chang-Hwang HUA , Wen Chu
发明人： Chang-Hwang HUA , Wen Chu
IPC分类号： H01L21/768
CPC分类号： H01L21/76898 , H01L21/76849 , H01L21/76873 , H01L21/78 , H01L23/481 , H01L29/0657 , H01L29/41708 , H01L29/41725 , H01L2924/0002 , H01L2924/00
摘要： A method of processing copper backside metal layer for semiconductor chips is disclosed. The backside of a semiconductor wafer, with electronic devices already fabricated on the front side, is first coated with a thin metal seed layer by either electroless plating or sputtering. Then, the copper backside metal layer is coated on the metal seed layer. The metal seed layer not only increases the adhesion between the front side metal layer and the copper backside metal layer through backside via holes, but also prevents metal peeling from semiconductor's substrate after subsequent fabrication processes, which is helpful for increasing the reliability of device performances. Suitable materials for the metal seed layer includes Pd, Au, Ni, Ag, Co, Cr, Pt, or their alloys, such as NiP, NiB, AuSn, Pt—Rh and the likes. The use of Pd as seed layer is particularly useful for the copper backside metal layer, because the Pd layer also acts as a diffusion barrier to prevent Cu atoms entering the semiconductor wafer.
摘要翻译：公开了一种用于半导体芯片的铜背面金属层的处理方法。已经制造在前侧的电子器件的半导体晶片的背面首先通过化学镀或溅射涂覆有薄金属种子层。然后，将铜背面金属层涂覆在金属籽晶层上。金属种子层不仅通过背面通孔增加了前侧金属层和铜背面金属层之间的粘附性，而且还防止了后续制造工艺中的半导体基板的金属剥离，这有助于提高器件性能的可靠性。用于金属种子层的合适材料包括Pd，Au，Ni，Ag，Co，Cr，Pt或它们的合金，例如NiP，NiB，AuSn，Pt-Rh等。使用Pd作为种子层对于铜背面金属层特别有用，因为Pd层还用作扩散阻挡层以防止Cu原子进入半导体晶片。

6. 发明申请

US20130207266A1 Copper Interconnect for III-V Compound Semiconductor Devices 审中-公开
标题翻译：铜互连用于III-V复合半导体器件
公开(公告)号：US20130207266A1
公开(公告)日：2013-08-15
申请号：US13533303
申请日：2012-06-26
申请人： Chang-Hwang Hua , Wen Chu
发明人： Chang-Hwang Hua , Wen Chu
IPC分类号： H01L23/535
CPC分类号： H01L23/53238 , H01L27/0605 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a copper interconnect for III-V compound semiconductor devices, which comprises a metal contact layer and a copper-containing metal layer, in which the metal contact layer is formed of a material selected from a group consisting of Ti/Pd/Cu, Ti/NiV/Cu, TiW/TiWN/TiW/Cu, TiW/TiWN/TiW/Au, TiW/Cu, and TiW/Au, and the copper-containing metal layer comprises a copper layer. The copper-containing metal layer further includes a metal protection layer covering on the copper layer to prevent the copper layer from oxidation. The metal protection layer is formed of Ni/Au, Ni/Pd/Au, NiV/Au, or solder.
摘要翻译：本发明提供了一种用于III-V族化合物半导体器件的铜互连，其包括金属接触层和含铜金属层，其中金属接触层由选自Ti / Pd / Cu，Ti / NiV / Cu，TiW / TiWN / TiW / Cu，TiW / TiWN / TiW / Au，TiW / Cu和TiW / Au，含铜金属层包含铜层。含铜金属层还包括覆盖在铜层上的金属保护层，以防止铜层氧化。金属保护层由Ni / Au，Ni / Pd / Au，NiV / Au或焊料形成。

7. 发明申请

US20130034959A1 ELECTROLESS PLATING APPARATUS AND METHOD 有权
标题翻译：电沉积设备和方法
公开(公告)号：US20130034959A1
公开(公告)日：2013-02-07
申请号：US13196179
申请日：2011-08-02
申请人： Jason CHEN , Nakano Liu , Winson Shao , Wen Chu , Chang-Hwang Hua
发明人： Jason CHEN , Nakano Liu , Winson Shao , Wen Chu , Chang-Hwang Hua
IPC分类号： H01L21/3205 , B05C11/10 , B05C11/00
CPC分类号： H01L21/288 , C23C18/1619 , C23C18/1666 , C23C18/1669 , H01L21/76843
摘要： An electroless plating apparatus and method designed specifically for plating at least one semiconductor wafer are disclosed. The apparatus comprises a container, a wafer holder, an electrolyte supplying unit, and an ultrasonic-vibration unit. The container is provided with at least an inlet and used for containing electrolyte. The wafer holder is provided within the container. The electrolyte supplying unit is used to supply the electrolyte into the container via the inlet. The ultrasonic-vibration unit consisting of at least one frequency ultrasonic transducer is disposed in the container for producing a uniform flow of electrolyte in the container. Thereby, the wafers can be uniformly plated, especially for wafers with fine via-holes or trench structures.
摘要翻译：公开了专门用于电镀至少一个半导体晶片的化学镀设备和方法。该装置包括容器，晶片保持器，电解质供给单元和超声波振动单元。容器设有至少一个入口，用于容纳电解液。晶片保持器设置在容器内。电解质供给单元用于经由入口将电解质供给到容器中。由至少一个频率超声波换能器组成的超声波振动单元设置在容器中，用于在容器中产生均匀的电解液流。因此，可以均匀地镀覆晶片，特别是对于具有精细通孔或沟槽结构的晶片。

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