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    • 1. 发明授权
    • Parallel multiplier that supports multiple numbers with different bit
lengths
    • 支持多个不同位长数字的并行乘法器
    • US5943250A
    • 1999-08-24
    • US734277
    • 1996-10-21
    • Chang Soo KimLe T. NguyenRoney S. Wong
    • Chang Soo KimLe T. NguyenRoney S. Wong
    • G06F7/52
    • G06F7/5338G06F2207/3828
    • A parallel multiplier for multiplying a multiplicand and multiplier with large bit lengths as well as simultaneously multiplying several multiplicands and multipliers with smaller bit lengths is disclosed. The parallel multiplier receives an N-bit multiplicand operand, an M-bit multiplier operand, and a data length signal. The parallel multiplier calculates an N+M bit product of an N-bit multiplicand from the multiplicand operand and an M-bit multiplier from the multiplier operand when the data length signal selects a first bit length. Furthermore, the parallel multiplier simultaneously calculates an (N+M)/2 bit first product of an N/2 bit first multiplicand from the multiplicand operand and an M/2 bit first multiplier from the multiplier operand, and an (N+M)/2 bit second product of an N/2 bit second multiplicand from the multiplicand operand and an M/2 bit second multiplier from the multiplier operand when the data length signal selects a second bit length.
    • 公开了一种并行乘法器,用于将乘法器和乘法器与大位长度相乘,以及同时乘以具有较小位长度的多个乘法器和乘法器。 并行乘法器接收N位被乘数操作数,M位乘法器操作数和数据长度信号。 当数据长度信号选择第一位长度时,并行乘法器计算来自乘法器操作数的N位被乘数的N + M位乘积和来自乘法器操作数的M位乘法器。 此外,并行乘法器同时计算来自乘法器操作数的N / 2位第一被乘数的第(N + M)/ 2位第一乘积和来自乘法器操作数的M / 2位第一乘法器,并且(N + M) 当从数据长度信号选择第二位长度时,来自乘法器操作数的N / 2位第二被乘数的2位第二乘积和来自乘法器操作数的M / 2位第二乘法器。