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    • 2. 发明申请
    • Variable-frequency flyback converter with synchronous rectification function
    • 具有同步整流功能的变频反激式转换器
    • US20050276079A1
    • 2005-12-15
    • US10911558
    • 2004-08-05
    • Tae ParkSung KimChan Jang
    • Tae ParkSung KimChan Jang
    • H02M3/28H02M3/335
    • H02M3/33576
    • Disclosed herein is a variable-frequency flyback. The flyback converter comprises a flyback transformer having secondary windings for drive and detection for providing first and second induced voltages induced from an input voltage in first and second turn ratios with a primary winding, respectively, a voltage detector for detecting the second induced voltage, a switching controller for determining, on the basis of a level of the voltage detected by the voltage detector, whether a current load state is the mini load state and outputting a first switching signal according to a result of the determination, a first switch for switching the supply of the second induced voltage in response to the second induced voltage and the first switching signal, and a synchronous rectifier for performing a switching operation depending on a state of the first switch, the synchronous rectifier having its source and drain connected to any one of a voltage output line or ground line connected to the drive secondary winding and its gate connected to the first switch.
    • 这里公开的是可变频率回扫。 反激式转换器包括具有用于驱动和检测的次级绕组的回扫变压器,用于分别用初级绕组提供从第一和第二匝数比的输入电压感应的第一和第二感应电压,用于检测第二感应电压的电压检测器 开关控制器,用于根据由电压检测器检测到的电压的电平,根据确定结果确定当前负载状态是微型负载状态并输出第一开关信号;第一开关,用于切换 响应于第二感应电压和第一开关信号提供第二感应电压,以及同步整流器,用于根据第一开关的状态执行开关操作,其源极和漏极连接到第一开关的任一个 连接到驱动次级绕组的电压输出线或地线,其栅极连接到f 第一开关
    • 4. 发明申请
    • Heat Exchanger for Common Use for Boiler and Hot Water Supply
    • 热交换器用于锅炉和热水供应
    • US20070204980A1
    • 2007-09-06
    • US10592651
    • 2005-03-19
    • Young KimSung Kim
    • Young KimSung Kim
    • F28F1/10
    • F28F1/24F28D7/0066F28D7/024F28D7/08F28D7/085F28F9/001
    • A heat exchanger for common use for both a boiler and a hot water supply is provided, which includes a plurality of inner plate members (110) having inner plate member grooves formed on either side of the upper end thereof, and a burner provided on the bottom surface thereof, to thereby perform a combustion chamber function; combustion heat fin tubes (120) formed of a number of heat exchange tubes on the outer circumferential surface of which transfer heat fins are formed; an insulation member (130) which is installed in an identical area along the inner walls of the inner plate members; and an independent heat exchanger body which is connected with the combustion heat fin tubes. Thus, a heat exchanger for a condensing or noncondensing gas boiler can be manufactured at low cost, through the common heat exchanger Further, two kinds of heat exchangers can be manufactured through a single common heat exchanger to thereby make an additional process unnecessary.
    • 提供了一种用于锅炉和热水供应的常用热交换器,其包括多个内板构件(110),其具有形成在其上端的任一侧上的内板构件槽和设置在其上的燃烧器 从而进行燃烧室功能; 由形成有传热散热片的外周面上的多个热交换管形成的燃烧热翅片管(120) 绝缘构件(130),其沿着所述内板构件的内壁安装在相同的区域中; 以及与燃烧散热片管连接的独立的热交换器主体。 因此,可以通过公共热交换器以低成本制造用于冷凝或非冷凝燃气锅炉的热交换器。此外,可以通过单个共用热交换器制造两种热交换器,从而不需要额外的处理。
    • 5. 发明申请
    • Microprocessor suitable for constructing multi-processor system and method for controlling reset and processor ID thereof
    • 适用于构造多处理器系统的微处理器及其复位控制方法及其处理器ID
    • US20070136567A1
    • 2007-06-14
    • US11633811
    • 2006-12-05
    • Young KimSung KimKyoung ParkSeong KimMyung Kim
    • Young KimSung KimKyoung ParkSeong KimMyung Kim
    • G06F15/177
    • G06F15/02G06F15/16
    • Provided are a microprocessor suitable for constructing a multi-processor system and a method for controlling the reset and processor ID of the microprocessor. The microprocessor includes decoder receiving a reset ID having a predetermined binary value and a reset signal and decoding the reset ID, an ID generator receiving the decoding result of the decoder and generating at least one microprocessor ID and a reset ID of a microprocessor serially connected to the microprocessor, and a reset vector unit selecting a reset vector according to the decoding result of the decoder. The multi-processor system is constructed such that independent microprocessors of the system respectively generate their own reset vectors and processor IDs when a reset signal is input to the multi-processor system to initialize it. Thus, all the microprocessors of the system can be simultaneously started up when the reset signal is disabled. Accordingly, a resetting process in the multi-processor system is simplified, a period of time required for starting up the microprocessor is reduced, and the multi-processor system is easily designed.
    • 提供了适用于构造多处理器系统的微处理器和用于控制微处理器的复位和处理器ID的方法。 微处理器包括解码器,其接收具有预定二进制值的复位ID和复位信号,并对复位ID进行解码; ID生成器接收解码器的解码结果,并生成至少一个微处理器ID和与微处理器串行连接的微处理器的复位ID 微处理器和复位向量单元根据解码器的解码结果来选择复位向量。 多处理器系统被构造成使得当复位信号被输入到多处理器系统以初始化时,系统的独立微处理器分别产生它们自己的复位向量和处理器ID。 因此,当复位信号被禁止时,系统的所有微处理器都可以同时启动。 因此,简化了多处理器系统中的复位处理,减少了启动微处理器所需的时间,容易地设计多处理器系统。