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1. 发明申请

US20100304549A1 METHOD OF FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE 失效
标题翻译：形成半导体器件隔离层的方法
公开(公告)号：US20100304549A1
公开(公告)日：2010-12-02
申请号：US12815317
申请日：2010-06-14
申请人： Cha Deok DONG , Whee Won Cho , Jung Geun Kim , Cheol Mo Jeong , Suk Joong Kim , Jung Gu Lee
发明人： Cha Deok DONG , Whee Won Cho , Jung Geun Kim , Cheol Mo Jeong , Suk Joong Kim , Jung Gu Lee
IPC分类号： H01L21/76
CPC分类号： H01L27/11521 , H01L21/76232
摘要： A method of forming an isolation layer of a semiconductor device includes forming first trenches in an isolation region of a semiconductor substrate. Sidewalls and a bottom surface of each of the first trenches are oxidized by a radical oxidization process to form a first oxide layer. An oxidization-prevention spacer is formed on the sidewalls of each of the first trenches. Second trenches are formed in the isolation region below the corresponding first trenches, wherein each second trench is narrower and deeper than the corresponding first trench. The second trenches are filled with a second oxide layer. The first trenches are filled with an insulating layer.
摘要翻译：形成半导体器件的隔离层的方法包括在半导体衬底的隔离区域中形成第一沟槽。每个第一沟槽的侧壁和底表面被自由基氧化过程氧化以形成第一氧化物层。在每个第一沟槽的侧壁上形成防氧化间隔物。第二沟槽形成在对应的第一沟槽下方的隔离区域中，其中每个第二沟槽比相应的第一沟槽更窄和更深。第二沟槽填充有第二氧化物层。第一沟槽填充有绝缘层。

2. 发明申请

US20080102579A1 METHOD OF FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE 失效
标题翻译：形成半导体器件隔离层的方法
公开(公告)号：US20080102579A1
公开(公告)日：2008-05-01
申请号：US11617690
申请日：2006-12-28
申请人： Cha Deok Dong , Whee Won Cho , Jung Geun Kim , Cheol Mo Jeong , Suk Joong Kim , Jung Gu Lee
发明人： Cha Deok Dong , Whee Won Cho , Jung Geun Kim , Cheol Mo Jeong , Suk Joong Kim , Jung Gu Lee
IPC分类号： H01L21/8242
CPC分类号： H01L27/11521 , H01L21/76232
摘要： A method of forming an isolation layer of a semiconductor device includes forming first trenches in an isolation region of a semiconductor substrate. A spacer is formed on sidewalls of each of the first trenches. Second trenches are formed in the isolation region below the corresponding first trenches. Each second trench is narrower and deeper than the corresponding first trench. A first oxide layer is formed on sidewalls and a bottom surface of each of the second trenches. The first trench is filled with an insulating layer.
摘要翻译：形成半导体器件的隔离层的方法包括在半导体衬底的隔离区域中形成第一沟槽。间隔件形成在每个第一沟槽的侧壁上。第二沟槽形成在对应的第一沟槽下方的隔离区域中。每个第二沟槽比相应的第一沟槽更窄和更深。第一氧化物层形成在每个第二沟槽的侧壁和底表面上。第一沟槽填充有绝缘层。

3. 发明授权

US07977205B2 Method of forming isolation layer of semiconductor device 失效
标题翻译：形成半导体器件隔离层的方法
公开(公告)号：US07977205B2
公开(公告)日：2011-07-12
申请号：US12815317
申请日：2010-06-14
申请人： Cha Deok Dong , Whee Won Cho , Jung Geun Kim , Cheol Mo Jeong , Suk Joong Kim , Jung Gu Lee
发明人： Cha Deok Dong , Whee Won Cho , Jung Geun Kim , Cheol Mo Jeong , Suk Joong Kim , Jung Gu Lee
IPC分类号： H01L21/76
CPC分类号： H01L27/11521 , H01L21/76232
摘要： A method of forming an isolation layer of a semiconductor device includes forming first trenches in an isolation region of a semiconductor substrate. Sidewalls and a bottom surface of each of the first trenches are oxidized by a radical oxidization process to form a first oxide layer. An oxidization-prevention spacer is formed on the sidewalls of each of the first trenches. Second trenches are formed in the isolation region below the corresponding first trenches, wherein each second trench is narrower and deeper than the corresponding first trench. The second trenches are filled with a second oxide layer. The first trenches are filled with an insulating layer.
摘要翻译：形成半导体器件的隔离层的方法包括在半导体衬底的隔离区域中形成第一沟槽。每个第一沟槽的侧壁和底表面被自由基氧化过程氧化以形成第一氧化物层。在每个第一沟槽的侧壁上形成防氧化间隔物。第二沟槽形成在对应的第一沟槽下方的隔离区域中，其中每个第二沟槽比相应的第一沟槽更窄和更深。第二沟槽填充有第二氧化物层。第一沟槽填充有绝缘层。

4. 发明授权

US07736991B2 Method of forming isolation layer of semiconductor device 失效
标题翻译：形成半导体器件隔离层的方法
公开(公告)号：US07736991B2
公开(公告)日：2010-06-15
申请号：US11617690
申请日：2006-12-28
申请人： Cha Deok Dong , Whee Won Cho , Jung Geun Kim , Cheol Mo Jeong , Suk Joong Kim , Jung Gu Lee
发明人： Cha Deok Dong , Whee Won Cho , Jung Geun Kim , Cheol Mo Jeong , Suk Joong Kim , Jung Gu Lee
IPC分类号： H01L21/76
CPC分类号： H01L27/11521 , H01L21/76232
摘要： A method of forming an isolation layer of a semiconductor device includes forming first trenches in an isolation region of a semiconductor substrate. A spacer is formed on sidewalls of each of the first trenches. Second trenches are formed in the isolation region below the corresponding first trenches. Each second trench is narrower and deeper than the corresponding first trench. A first oxide layer is formed on sidewalls and a bottom surface of each of the second trenches. The first trench is filled with an insulating layer.
摘要翻译：形成半导体器件的隔离层的方法包括在半导体衬底的隔离区域中形成第一沟槽。间隔件形成在每个第一沟槽的侧壁上。第二沟槽形成在对应的第一沟槽下方的隔离区域中。每个第二沟槽比相应的第一沟槽更窄和更深。第一氧化物层形成在每个第二沟槽的侧壁和底表面上。第一沟槽填充有绝缘层。

5. 发明申请

US20080268612A1 METHOD OF FORMING ISOLATION LAYER IN SEMICONDUCTOR DEVICE 审中-公开
标题翻译：在半导体器件中形成隔离层的方法
公开(公告)号：US20080268612A1
公开(公告)日：2008-10-30
申请号：US11962611
申请日：2007-12-21
申请人： Whee Won Cho , Cheol Mo Jeong , Jung Geun Kim , Suk Joong Kim , Jong Hye Cho
发明人： Whee Won Cho , Cheol Mo Jeong , Jung Geun Kim , Suk Joong Kim , Jong Hye Cho
IPC分类号： H01L21/762
CPC分类号： H01L21/76232
摘要： The present invention discloses to a method of forming an isolation layer in a semiconductor device. In particular, the method of forming an isolation layer in a semiconductor device of the present invention comprises the steps of providing a semiconductor substrate on which a trench is formed; forming spacers on side walls of the trench; forming a first insulating layer to fill a portion of the trench such that a deposition rate on the semiconductor substrate which is a bottom surface of the trench and exposed between the spacers is higher than that on a surface of the space; and forming a second insulating layer on the first insulating layer so as to fill the trench with the second insulating layer. An O3-TEOS layer on the exposed semiconductor substrate which is a bottom surface of the trench is grown faster than that on a surface of the spacer formed of an oxide layer or a nitride layer to prevent the O3-TEOS layers grown on the side walls from coming into contact with each other, and so it is possible to inhibit a generation of a seam and to enhance a gap-filling characteristic for the trench.
摘要翻译：本发明公开了一种在半导体器件中形成隔离层的方法。特别地，本发明的半导体器件中形成隔离层的方法包括以下步骤：提供其上形成有沟槽的半导体衬底; 在沟槽的侧壁上形成间隔物; 形成第一绝缘层以填充所述沟槽的一部分，使得作为所述沟槽的底表面并暴露在所述间隔物之间的所述半导体衬底上的沉积速率高于所述空间的表面上的沉积速率; 以及在所述第一绝缘层上形成第二绝缘层以便用所述第二绝缘层填充所述沟槽。作为沟槽底面的暴露的半导体衬底上的O 3 -TOS层比由氧化物层或氮化物层形成的间隔物的表面上生长得快，以防止O 在侧壁上生长的3层以上的层彼此接触，因此可以抑制接缝的产生并且增强沟槽的间隙填充特性。

6. 发明申请

US20080003823A1 Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20080003823A1
公开(公告)日：2008-01-03
申请号：US11647765
申请日：2006-12-29
申请人： Whee Won Cho , Seung Hee Hong , Suk Joong Kim , Cheol Mo Jeong
发明人： Whee Won Cho , Seung Hee Hong , Suk Joong Kim , Cheol Mo Jeong
IPC分类号： H01L21/44 , H01L21/465
CPC分类号： H01L21/76829 , H01L21/76802 , H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device includes the steps of forming an interlayer insulating layer and an etch-stop nitride layer over a semiconductor substrate, etching the etch-stop nitride layer and the interlayer insulating layer to form contact holes, forming contacts in the contact holes, forming an oxide layer on the entire surface including the contacts, etching the oxide layer using the etch-stop nitride layer as a target, thus forming trenches through which the contacts and the etch-stop nitride layer adjacent to the contacts are exposed, and forming bit lines in the trenches.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在半导体衬底上形成层间绝缘层和蚀刻停止氮化物层，蚀刻蚀刻停止氮化物层和层间绝缘层以形成接触孔，在触点中形成触点在包括触点的整个表面上形成氧化物层，使用蚀刻 - 停留氮化物层作为靶蚀刻氧化层，从而形成沟槽，触点和与触点相邻的蚀刻 - 停止氮化物层通过该沟槽暴露，并在沟槽中形成位线。

7. 发明授权

US07892919B2 Method of forming isolation layer in semiconductor device 失效
标题翻译：在半导体器件中形成隔离层的方法
公开(公告)号：US07892919B2
公开(公告)日：2011-02-22
申请号：US12163328
申请日：2008-06-27
申请人： Jung Geun Kim , Cheol Mo Jeong , Whee Won Cho
发明人： Jung Geun Kim , Cheol Mo Jeong , Whee Won Cho
IPC分类号： H01L21/8242
CPC分类号： H01L21/76232
摘要： The invention discloses a method of forming an isolation layer in a semiconductor device. The method includes providing a semiconductor substrate having a trench formed therein; forming a first insulating layer in the trench; and forming a densified second insulating layer on the first insulating layer. In the above method, a void is not generated in the isolation layer so a bending phenomenon of an active region can be reduced or prevented to improve an electrical characteristic of the semiconductor.
摘要翻译：本发明公开了一种在半导体器件中形成隔离层的方法。该方法包括提供其中形成有沟槽的半导体衬底; 在沟槽中形成第一绝缘层; 以及在所述第一绝缘层上形成致密的第二绝缘层。在上述方法中，在隔离层中不会产生空隙，因此可以减少或防止有源区的弯曲现象来改善半导体的电特性。

8. 发明申请

US20080003754A1 Method of forming gate of flash memory device 失效
标题翻译：形成闪存器件门的方法
公开(公告)号：US20080003754A1
公开(公告)日：2008-01-03
申请号：US11646777
申请日：2006-12-28
申请人： Cheol Mo Jeong , Whee Won Cho , Jung Geun Kim , Seong Hwan Myung
发明人： Cheol Mo Jeong , Whee Won Cho , Jung Geun Kim , Seong Hwan Myung
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521
摘要： A method of forming a gate of a flash memory device, including the steps of forming a gate on a semiconductor substrate and forming an oxide layer on the entire surface of the gate, forming a nitride layer on a sidewall of the oxide layer in a spacer form, performing a polishing process so that a top surface of the gate is exposed, and then stripping the nitride layer to form an opening, forming a barrier metal layer on a sidewall of the opening, and forming a tungsten layer in the opening.
摘要翻译：一种形成闪速存储器件的栅极的方法，包括以下步骤：在半导体衬底上形成栅极并在栅极的整个表面上形成氧化物层，在间隔物的氧化物层的侧壁上形成氮化物层形成，进行抛光处理使得栅极的顶表面露出，然后剥离氮化物层以形成开口，在开口的侧壁上形成阻挡金属层，并在开口中形成钨层。

9. 发明申请

US20080003745A1 Method of manufacturing a flash memory device 审中-公开
标题翻译：制造闪存装置的方法
公开(公告)号：US20080003745A1
公开(公告)日：2008-01-03
申请号：US11646860
申请日：2006-12-28
申请人： Seong Hwan Myung , Jung Geun Kim , Whee Won Cho , Cheol Mo Jeong
发明人： Seong Hwan Myung , Jung Geun Kim , Whee Won Cho , Cheol Mo Jeong
IPC分类号： H01L21/336
CPC分类号： H01L27/11524 , H01L27/115 , H01L27/11521
摘要： The present invention relates to a method of manufacturing a flash memory device. The method includes the steps of forming cell gate patterns and select transistor gate patterns on a semiconductor substrate; forming a low dielectric layer on the resultant structure; etching the low dielectric layer, leavinin gaps adjacent the cell gate patterns; and, forming a nitride layer spacer on one side wall of each of the select transistor gate patterns. The resulting flash memory device has an improved rate of change in the threshold voltage and reduces the contact resistance when a self-aligned contact method is subsequently performed.
摘要翻译：本发明涉及一种制造闪速存储器件的方法。该方法包括在半导体衬底上形成单元栅极图案和选择晶体管栅极图案的步骤; 在所得结构上形成低介电层; 蚀刻低介电层，与细胞栅极图案相邻的叶绿素间隙; 并且在每个选择晶体管栅极图案的一个侧壁上形成氮化物层间隔物。所产生的闪速存储器件在随后执行自对准接触方法时具有改善的阈值电压变化率并降低接触电阻。

10. 发明申请

US20060270152A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING TUNGSTEN GATES ELECTRODE 有权
标题翻译：制造具有钨电极的半导体器件的方法
公开(公告)号：US20060270152A1
公开(公告)日：2006-11-30
申请号：US11164804
申请日：2005-12-06
申请人： Cheol Mo Jeong , Whee Won Cho , Jung Geun Kim
发明人： Cheol Mo Jeong , Whee Won Cho , Jung Geun Kim
IPC分类号： H01L21/8242
CPC分类号： H01L21/28273 , H01L27/11521
摘要： Disclosed herein is a method of manufacturing semiconductor devices. The method includes the steps of forming a gate oxide film, a polysilicon film and a nitride film on a semiconductor substrate, and patterning the gate oxide film, the polysilicon film and the nitride film to form poly gates, forming a spacer at the side of the poly gate, forming a sacrifice nitride film on the entire surface, and then forming an interlayer insulation film on the entire surface, polishing the sacrifice nitride film formed on the interlayer insulation film and the poly gates so that the nitride film is exposed, removing top portions of the sacrifice nitride film while removing the nitride film, forming an insulation film spacer at the side exposed through removal of the nitride film, and filling a portion from which the sacrifice oxide film is removed with an insulation film, and forming the tungsten gates in portions from which the nitride films are moved.
摘要翻译：这里公开了半导体器件的制造方法。该方法包括在半导体衬底上形成栅极氧化膜，多晶硅膜和氮化物膜的步骤，以及对栅极氧化膜，多晶硅膜和氮化物膜进行构图以形成多晶硅栅极，在在整个表面上形成牺牲氮化物膜，然后在整个表面上形成层间绝缘膜，研磨在层间绝缘膜和多晶硅栅上形成的牺牲氮化物膜，使得氮化物膜露出，去除牺牲氮化物膜的顶部，同时去除氮化物膜，在通过去除氮化物膜暴露的一侧形成绝缘膜间隔物，并且用绝缘膜填充去除牺牲氧化物膜的部分，并形成钨栅极在其中移动氮化物膜的部分中。

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