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1. 发明专利

JP2013077844A Local preferred direction architecture, tools and apparatus 审中-公开
标题翻译：本地优选方向架构，工具和装置
公开(公告)号：JP2013077844A
公开(公告)日：2013-04-25
申请号：JP2013007856
申请日：2013-01-18
申请人： Cadence Design Systems Inc , ケイデンスデザインシステムズインコーポレイテッド
发明人： ASMUS HETZEL , ANISH MALHOTRA , FUJIMURA AKI , JACQUES ETIENNE , JON FRANKLE , DAVID S HARRISON , HEATH FEATHER , ALEXANDER MATVEEV , KING ROGER
IPC分类号： H01L21/82 , G06F17/50
CPC分类号： G06F17/5077
摘要： PROBLEM TO BE SOLVED: To provide an apparatus for routing a net using a "local preferred direction (LPD)" wiring model.SOLUTION: An LPD wiring model for use with one or more EDA tools (such as placing, routing, etc.,) is provided. The LPD wiring model allows at least one wiring layer to have a set of regions that each have a different preferred direction than the particular wiring layer. In addition, each region has a local preferred direction that differs from the local preferred direction of at least one other region in the set. Furthermore, at least two regions have two different polygonal shapes and no region in the set encompasses another region in the set.
摘要翻译：要解决的问题：提供一种使用“本地优选方向（LPD）”布线模型布线网络的装置。
解决方案：提供了一种用于一个或多个EDA工具（如放置，布线等）的LPD接线模型。 LPD布线模型允许至少一个布线层具有各自具有与特定布线层不同的优选方向的一组区域。此外，每个区域具有局部优选方向，其不同于该组中至少一个其它区域的局部优选方向。此外，至少两个区域具有两个不同的多边形形状，并且该集合中的区域不包含该组中的另一区域。版权所有（C）2013，JPO＆INPIT

2. 发明专利

AU2003216145A8 Method and apparatus for synthesis 未知
公开(公告)号：AU2003216145A8
公开(公告)日：2003-09-29
申请号：AU2003216145
申请日：2003-01-31
申请人： CADENCE DESIGN SYSTEMS INC
发明人： TEIG STEVEN , ASMUS HETZEL
IPC分类号： G06F17/50 , G06F9/455

3. 发明专利

AU2003216145A1 METHOD AND APPARATUS FOR SYNTHESIS 未知
公开(公告)号：AU2003216145A1
公开(公告)日：2003-09-29
申请号：AU2003216145
申请日：2003-01-31
申请人： CADENCE DESIGN SYSTEMS INC
发明人： TEIG STEVEN , ASMUS HETZEL
IPC分类号： G06F17/50 , G06F9/455

4. 发明公开

EP1470506A4 METHOD AND APPARATUS FOR SYNTHESIS 审中-公开
标题翻译：方法和设备合成
公开(公告)号：EP1470506A4
公开(公告)日：2008-04-02
申请号：EP03744591
申请日：2003-01-31
申请人： CADENCE DESIGN SYSTEMS INC
发明人： TEIG STEVEN , ASMUS HETZEL
IPC分类号： G06F17/50 , G06F9/455
CPC分类号： G06F17/505 , G06F17/5045 , Y10S707/99931 , Y10S707/99943
摘要： Some embodiments of the invention provide a method for pre-tabulating sub-networks. This method (1) generates a sub-network that performs a function, (2) generates a parameter based on this function, and (3) stores the sub-network in a storage structure base don the generated parameter. In some embodiments, the generated sub-network has several circuit elements. Also, in some embodiments, the generated sub-network performs a set of two or more functions. Some embodiments store each generated sub-network in an encoded manner. Some embodiments provide a method for producing a circuit description of a design. This method (1) selects a candidate sub-network from the design, (2) identifies an output function performed by the sub-network, (3) based on the identified output function, identifies a replacement sub-network from a storage structure that stores replacement sub-networks, and (49 replaces the selected candidate sub-network with the identified replacement sub-network in certain conditions. In some embodiments, this method is performed to map a design to a particular technology library. Some embodiments provide a data storage structure that stores a plurality of sub-networks based on parameters derived from the output functions of the sub-networks.

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