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1. 发明专利

DE69221632D1 未知
公开(公告)号：DE69221632D1
公开(公告)日：1997-09-18
申请号：DE69221632
申请日：1992-10-29
申请人： CUBE INC I , QUICKTURN DESIGN SYSTEMS INC
发明人： JENQ YIH-CHYUN , LOFSTROM KEITH , HUANG THOMAS B
IPC分类号： H03K19/0175 , H03K5/02 , H04L5/16 , H03K17/16
摘要： A bi-directional bus repeater includes two unidirectional bus repeaters connected for retransmitting signals in opposite directions between two buses. When an external bus driver pulls either bus low, one of the unidirectional bus repeaters pulls the other bus low. When the external bus driver allows the bus to rise to the high logic level, the unidirectional bus repeater temporarily supplies a high charging current to the other bus to quickly pull it up. Each unidirectional bus repeater also generates signals indicating when it is actively pulling its output bus up or down and the indicating signals inhibit one unidirectional bus repeater from actively driving its output when the other unidirectional bus repeater is actively driving its output.

2. 发明专利

DE69221632T2 未知
公开(公告)号：DE69221632T2
公开(公告)日：1998-03-19
申请号：DE69221632
申请日：1992-10-29
申请人： CUBE INC I , QUICKTURN DESIGN SYSTEMS INC
发明人： JENQ YIH-CHYUN , LOFSTROM KEITH , HUANG THOMAS B
IPC分类号： H03K19/0175 , H03K5/02 , H04L5/16 , H03K17/16
摘要： A bi-directional bus repeater includes two unidirectional bus repeaters connected for retransmitting signals in opposite directions between two buses. When an external bus driver pulls either bus low, one of the unidirectional bus repeaters pulls the other bus low. When the external bus driver allows the bus to rise to the high logic level, the unidirectional bus repeater temporarily supplies a high charging current to the other bus to quickly pull it up. Each unidirectional bus repeater also generates signals indicating when it is actively pulling its output bus up or down and the indicating signals inhibit one unidirectional bus repeater from actively driving its output when the other unidirectional bus repeater is actively driving its output.

3. 发明专利

DE69229873T2 未知
公开(公告)号：DE69229873T2
公开(公告)日：2000-05-04
申请号：DE69229873
申请日：1992-10-29
申请人： CUBE INC I
发明人： HSIEH WEN-JAI , JENQ YIH-CHYUN , HORNG CHI-SONG , LOFSTROM KEITH
IPC分类号： H03K19/173 , G06F13/40 , H03K19/0175 , H03K19/177 , G06F13/00
摘要： A bi-directional buffer includes first and second unidirectional buffers connected for retransmitting signals in opposite directions between first and second buses. When an external bus driver pulls the first bus low, the first unidirectional buffer pulls the second bus low and generates a signal inhibiting the second unidirectional buffer from actively driving the first bus. When the external bus driver allows the first bus to return to the high logic level, the first unidirectional buffer temporarily supplies a high charging current to the second bus to quickly pull it up. Similarly, when an external bus driver pulls the second bus low, the second unidirectional buffer pulls the first bus low and generates a signal inhibiting the first unidirectional buffer from actively driving the second bus. When the external bus driver allows the second bus to return to the high logic level, the second buffer temporarily supplies a high charging current to the first bus to quickly pull it up. The bi-directional buffer includes a register for storing and reading out data representing successive logic states of a signal on the first bus, thereby providing a history of data appearing on the bus.

4. 发明专利

DE69229873D1 未知
公开(公告)号：DE69229873D1
公开(公告)日：1999-09-30
申请号：DE69229873
申请日：1992-10-29
申请人： CUBE INC I
发明人： HSIEH WEN-JAI , JENQ YIH-CHYUN , HORNG CHI-SONG , LOFSTROM KEITH
IPC分类号： H03K19/173 , G06F13/40 , H03K19/0175 , H03K19/177 , G06F13/00
摘要： A bi-directional buffer includes first and second unidirectional buffers connected for retransmitting signals in opposite directions between first and second buses. When an external bus driver pulls the first bus low, the first unidirectional buffer pulls the second bus low and generates a signal inhibiting the second unidirectional buffer from actively driving the first bus. When the external bus driver allows the first bus to return to the high logic level, the first unidirectional buffer temporarily supplies a high charging current to the second bus to quickly pull it up. Similarly, when an external bus driver pulls the second bus low, the second unidirectional buffer pulls the first bus low and generates a signal inhibiting the first unidirectional buffer from actively driving the second bus. When the external bus driver allows the second bus to return to the high logic level, the second buffer temporarily supplies a high charging current to the first bus to quickly pull it up. The bi-directional buffer includes a register for storing and reading out data representing successive logic states of a signal on the first bus, thereby providing a history of data appearing on the bus.

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