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    • 3. 发明专利
    • Semiconductor device and method for manufacturing the same
    • 半导体器件及其制造方法
    • JP2014033059A
    • 2014-02-20
    • JP2012172396
    • 2012-08-02
    • Connectec Japan Corpコネクテックジャパン株式会社
    • SHIMOISHIZAKA NOZOMINAKANO TAKAHIROHIRATA KATSUNORI
    • H01L21/60
    • PROBLEM TO BE SOLVED: To reduce a position shift between an electrode of a semiconductor element and a wiring board due to dimensional changes of the wiring board in flip-chip mounting.SOLUTION: A wiring board 31 comprises: first, second, third, fourth element electrode rows 9, 11, 13, 15 of a semiconductor element 3 from the external side of a region of the semiconductor element; and first, second, third, fourth of bonding wiring rows 4, 6, 5, 7 for bonded to the element electrode rows respectively. A pitch between each of conductor wiring forming the first and third bonding wiring rows continuously changes so as to be wider than a pitch between the first and third element electrode rows in external side of the semiconductor element region and to be narrower than the pitch between the first and third element electrode rows at a tip on a center side of the semiconductor element. A pitch between each of conductor wiring forming the second and fourth bonding wiring rows continuously changes so as to be narrower than a pitch between the second and fourth element electrode rows in external side of the semiconductor element region and to be wider than the pitch between the second and fourth element electrode rows at the tip on the center side of the semiconductor element.
    • 要解决的问题:为了减少倒装芯片安装中由于布线板的尺寸变化导致的半导体元件的电极和布线板之间的位置偏移。解决方案:布线板31包括:第一,第二,第三,第四 半导体元件3的从半导体元件的区域的外侧的元件电极列9,11,13,15; 以及用于分别结合到元件电极列的键合布线行4,6,5,7的第一,第二,第三和第四。 形成第一和第三接合布线的导线之间的间距连续地变化,以比半导体元件区的外侧的第一和第三元件电极列之间的间距宽,并且比第 在半导体元件的中心侧的尖端处的第一和第三元件电极列。 形成第二和第四接合布线列的每个导体布线之间的间距连续变化,以便比半导体元件区域的外侧中的第二和第四元件电极列之间的间距更窄,并且宽于 第二和第四元件电极列在半导体元件的中心侧的尖端处。