专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

GB2374442B Method for controlling the order of datagrams 未知
公开(公告)号：GB2374442B
公开(公告)日：2005-03-23
申请号：GB0203633
申请日：2002-02-14
申请人： CLEARSPEED TECHNOLOGY LTD , CLEARSPEED SOLUTIONS LTD , CLEARSPEED TECHNOLOGY PLC
发明人： CAMERON KEN
IPC分类号： G06F13/36 , G06F1/10 , G06F17/50 , H04L12/28 , H04L12/54 , H04L12/701 , H04L12/747 , G06F7/00

2. 发明专利

GB2415561A Comparing data from sets at same positions 未知
公开(公告)号：GB2415561A
公开(公告)日：2005-12-28
申请号：GB0413862
申请日：2004-06-21
申请人： CLEARSPEED TECHNOLOGY LTD , CLEARSPEED SOLUTIONS LTD , CLEARSPEED TECHNOLOGY PLC
发明人： CAMERON KEN
IPC分类号： H04N7/26 , H04N7/36
摘要： A function between a first set of data (a to h etc) and a succession of second sets of data (A to H etc) from an image frame is evaluated. Evaluating means (75, 76) for evaluating data items in the first set with data items in corresponding positions in a succession of second data sets; characterised by a plurality of evaluating means for simultaneously evaluating a data item in the first data set with a corresponding data item in each of n second data sets in the succession, and local memory means (71 to 73) for retaining at least one of the corresponding data items in a second data set, whereby the retained data item is reused in an evaluation of the next data item in the first data set with n data items in corresponding positions in at least the next second data set in the succession. The method avoids having to re-fetch the same data for successive operations. The results are accumulated (77, 78). The technique may perform a convolution between the data sets to emulate a filter or perform an effect (eg a blur or sharpen) or may be used as a video compression process to search for a block of image data in an image frame so as to encode a subsequent frame by reference to the closeness of the match and the offset of the matching block.

4. 发明申请

WO2004045160A3 DATA PACKET HANDLING IN COMPUTER OR COMMUNICATION SYSTEMS 审中-公开
标题翻译：数据包处理在计算机或通信系统中
公开(公告)号：WO2004045160A3
公开(公告)日：2004-12-02
申请号：PCT/GB0304854
申请日：2003-11-11
申请人： CLEARSPEED TECHNOLOGY PLC , SPENCER ANTHONY , CAMERON KEN
发明人： SPENCER ANTHONY , CAMERON KEN
IPC分类号： H04L12/54 , H04L12/823 , H04L12/851 , H04L12/861 , H04L12/863 , H04L12/869 , H04L12/875 , H04L12/56
CPC分类号： H04L47/32 , H04L47/2441 , H04L47/50 , H04L47/562 , H04L47/60 , H04L47/6215 , H04L47/624 , H04L49/90 , H04L49/9042
摘要： The ordering of packet flows, comprising sequences of data packets, in a communication or computer system, is performed by assigning an exit number to each packet; queuing the packets in buffer means; and outputting the queued packets in a predetermined order according to an order list determined by the exit numbers assigned to each packet before it was queued. The exit number information is preferably assigned to packet records, which are queued in a separate buffer means to the packets, the records being of fixed length and shorter than the data portions. The packet record buffer means comprise groups of bins, each bin containing a range of exit numbers, the bins for higher exit number packet records having a larger range than bins for lower exit number packet records. Lower exit number packet records in a bin are subdivided into a plurality of bins, each containing packet records corresponding to a smaller range of exit numbers. Secondary bins may be created to temporarily store records assigned to a bin that is currently being emptied. The bins may be filled by means of a parallel processor, preferably a SIMD array processor.
摘要翻译：在通信或计算机系统中包括数据分组序列的分组流的排序通过向每个分组分配出口号码来执行; 以缓冲装置排队; 并且根据在排队之前分配给每个分组的出口号确定的顺序列表，以预定顺序输出排队的分组。出口号信息优选地分配给分组记录，分组记录在分组的单独缓冲装置中排队，记录具有固定长度并且短于数据部分。分组记录缓冲装置包括一组分组，每个分组包含一个出口编号的范围，用于较高出口编号分组记录的分段具有比用于较低出口编号分组记录的分组大的范围。一个存储区中的较低出口数量的数据包记录被细分成多个存储区，每个存储区包含对应于较小范围的出口号码的数据包记录。可以创建辅助箱以临时存储分配给当前正在清空的仓的记录。箱可以通过并行处理器，优选地是SIMD阵列处理器来填充。

5. 发明申请

WO2004045160A8 DATA PACKET HANDLING IN COMPUTER OR COMMUNICATION SYSTEMS 审中-公开
标题翻译：数据包处理在计算机或通信系统中
公开(公告)号：WO2004045160A8
公开(公告)日：2005-04-14
申请号：PCT/GB0304854
申请日：2003-11-11
申请人： CLEARSPEED TECHNOLOGY PLC , SPENCER ANTHONY , CAMERON KEN
发明人： SPENCER ANTHONY , CAMERON KEN
IPC分类号： H04L12/54 , H04L12/823 , H04L12/851 , H04L12/861 , H04L12/863 , H04L12/869 , H04L12/875 , H04L12/56
CPC分类号： H04L47/32 , H04L47/2441 , H04L47/50 , H04L47/562 , H04L47/60 , H04L47/6215 , H04L47/624 , H04L49/90 , H04L49/9042
摘要： The ordering of packet flows, comprising sequences of data packets, in a communication or computer system, is performed by assigning an exit number to each packet; queuing the packets in buffer means; and outputting the queued packets in a predetermined order according to an order list determined by the exit numbers assigned to each packet before it was queued. The exit number information is preferably assigned to packet records, which are queued in a separate buffer means to the packets, the records being of fixed length and shorter than the data portions. The packet record buffer means comprise groups of bins, each bin containing a range of exit numbers, the bins for higher exit number packet records having a larger range than bins for lower exit number packet records. Lower exit number packet records in a bin are subdivided into a plurality of bins, each containing packet records corresponding to a smaller range of exit numbers. Secondary bins may be created to temporarily store records assigned to a bin that is currently being emptied. The bins may be filled by means of a parallel processor, preferably a SIMD array processor.
摘要翻译：在通信或计算机系统中包括数据分组序列的分组流的排序通过向每个分组分配出口号码来执行; 在缓冲装置中排队; 并且根据由分配给每个分组排队之前的出口号确定的顺序列表，以预定顺序输出排队的分组。出口号信息优选地被分配给分组记录，分组记录在分组的单独缓冲装置中排队，记录具有固定长度并且短于数据部分。分组记录缓冲装置包括一组分组，每个分组包含一个出口编号范围，较高出口编号分组记录的分段具有比较小出口编号分组记录的分段大的范围。一个存储区中的较低出口编号的数据包记录被细分为多个存储区，每个存储区都包含对应于较小范围的退出编号的数据包记录。可以创建辅助箱以临时存储分配给当前正在清空的仓的记录。箱可以通过并行处理器，优选地是SIMD阵列处理器来填充。

6. 发明专利

GB2410349A Data processing architectures 未知
公开(公告)号：GB2410349A
公开(公告)日：2005-07-27
申请号：GB0506813
申请日：2002-02-14
申请人： CLEARSPEED TECHNOLOGY PLC
发明人： RHOADES JOHN , CAMERON KEN , WINSER PAUL , MCCONNELL RAY , FAULDS GORDON , MCINTOSH-SMITH SIMON , SPENCER ANTHONY , BOND JEFF , DEJAEGHER MATTHIAS , HALAMISH DANNY , PANESAR GAJINDER
IPC分类号： G06F15/80
摘要： A data processing architecture comprising: a parallel array of processing elements arranged in a single instruction multiple data processing array; a hardware accelerator unit operable to receive, in series, processing requests from the processing elements and to return processing results to respective processing elements when those processing results are available; and an input/output system which is operable to transfer respective processing requests from the processing elements to the hardware accelerator, and to return processing results to the processing elements concerned, wherein the processing elements are operable to process the returned processing results when all such results are returned, or after a predetermined time period.

7. 发明专利

GB2412537B Data packet handling in computer or communication systems 未知
公开(公告)号：GB2412537B
公开(公告)日：2006-02-01
申请号：GB0511587
申请日：2003-11-11
申请人： CLEARSPEED TECHNOLOGY PLC
发明人： SPENCER ANTHONY , CAMERON KEN
IPC分类号： H04L12/54 , H04L47/32 , H04L47/56
摘要： Variable size data packets are queued in a communication system by generating from each data packet a record portion of predetermined fixed size containing information about each packet and storing only data portions of the packets in independent memory locations in a first memory. The record portions are only stored in one or more managed queues in a second memory having fixed size memory locations equal in size to the size of the record portions. The first memory is larger than the second memory; and the memory locations in the first memory are arranged in blocks having a plurality of different sizes. The memory locations are allocated to the data portions according to the size of the data portions.

8. 发明专利

GB2412537A Data packet handling in computer or communication systems 未知
公开(公告)号：GB2412537A
公开(公告)日：2005-09-28
申请号：GB0511587
申请日：2003-11-11
申请人： CLEARSPEED TECHNOLOGY PLC
发明人： SPENCER ANTHONY , CAMERON KEN
IPC分类号： H04L12/54 , H04L47/32 , H04L47/56 , H04L12/56
摘要： The ordering of packet flows, comprising sequences of data packets, in a communication or computer system, is performed by assigning an exit number to each packet; queuing the packets in buffer means; and outputting the queued packets in a predetermined order according to an order list determined by the exit numbers assigned to each packet before it was queued. The exit number information is preferably assigned to packet records, which are queued in a separate buffer means to the packets, the records being of fixed length and shorter than the data portions. The packet record buffer means comprise groups of bins, each bin containing a range of exit numbers, the bins for higher exit number packet records having a larger range than bins for lower exit number packet records. Lower exit number packet records in a bin are subdivided into a plurality of bins, each containing packet records corresponding to a smaller range of exit numbers. Secondary bins may be created to temporarily store records assigned to a bin that is currently being emptied. The bins may be filled by means of a parallel processor, preferably a SIMD array processor.

9. 发明专利

GB2410350B Data processing architectures 未知
公开(公告)号：GB2410350B
公开(公告)日：2005-11-09
申请号：GB0506818
申请日：2002-02-14
申请人： CLEARSPEED TECHNOLOGY PLC
发明人： RHOADES JOHN , CAMERON KEN , WINSER PAUL , MCCONNELL RAY , FAULDS GORDON , MCINTOSH-SMITH SIMON , SPENCER ANTHONY , BOND JEFF , DEJAEGHER MATTIAS , HALAMISH DANNY , PANESAR GAJINDER
IPC分类号： G06F15/80

10. 发明专利

GB2410350A Data processing architectures 未知
公开(公告)号：GB2410350A
公开(公告)日：2005-07-27
申请号：GB0506818
申请日：2002-02-14
申请人： CLEARSPEED TECHNOLOGY PLC
发明人： RHOADES JOHN , CAMERON KEN , WINSER PAUL , MCCONNELL RAY , FAULDS GORDON , MCINTOSH-SMITH SIMON , SPENCER ANTHONY , BOND JEFF , DEJAEGHER MATTHIAS , HALAMISH DANNY , PANESAR GAJINDER
IPC分类号： G06F15/80
摘要： An input/output system for transferring data to and from a plurality of processing elements arranged in a single instruction multiple data (SIMD) array, the system being operable to transfer data packets of different sizes to respective ones of the processing elements in the array.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式