会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明专利
    • Single ended switched capacitor circuit
    • 单端开关电容电路
    • JP2006081165A
    • 2006-03-23
    • JP2005227404
    • 2005-08-05
    • Cirrus Logic Incシラス ロジック、インコーポレイテッド
    • GABORIAU JOHANN GWEISER JOSEPH J
    • H03H19/00H03K5/08H03M1/08
    • H03M1/08
    • PROBLEM TO BE SOLVED: To remove the effect of common mode noise in a single end non-differential switched capacitor circuit.
      SOLUTION: The circuit creates a capacitance divider using sampling capacitors Cs to create a stable and a noise-free common mode voltage (Vcom) signal. Once created, this Vcom signal is coupled between large common mode capacities Ccom which are preferably located outside to further be controlled in their values. Thereafter, the voltage Vcom can be stabilized while data are disconnected. In this way, the Vcom signal is not provided to the circuit, but instead, cleanly generated within the circuit itself when needed. Thereafter, the generated Vcom signal is made parallel with an integration capacitor C1 to generate the non-differential output voltage Vout. Then, the sampling capacitors Cs are shorted to remove charge stored in them and the process is repeated.
      COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:消除单端非差分开关电容电路中共模噪声的影响。

      解决方案:该电路使用采样电容器Cs创建一个电容分压器,以产生稳定和无噪声的共模电压(Vcom)信号。 一旦创建,该Vcom信号耦合在大型共模容量Ccom之间,优选位于外部,以进一步控制其值。 此后,电压Vcom可以在数据断开时稳定。 以这种方式,Vcom信号不提供给电路,而是在需要时在电路本身内干净地产生。 此后,所生成的Vcom信号与积分电容器C1并联,以产生非差分输出电压Vout。 然后,采样电容器Cs短路以除去其中存储的电荷,并重复该过程。 版权所有(C)2006,JPO&NCIPI

    • 3. 发明专利
    • DE602005012029D1
    • 2009-02-12
    • DE602005012029
    • 2005-08-05
    • CIRRUS LOGIC INC
    • GABORIAU JOHANN GWEISER JOSEPH J
    • H03M1/08
    • A single-ended, non-differential switched capacitor circuit (50) is disclosed which removes the effect of common mode noise. To this end, the circuit (50) creates a capacitance divider using the sampling capacitors (Cs) to create a stable and noise-free common mode voltage (Vcom) signal. Once created, this Vcom signal is coupled across a large common mode capacitance (Ccom) which is preferably off chip, to further control its value. Thereafter, the voltage Vcom is preferably allowed to settle while the data is disconnected. In this way, the Vcom signal is not provided to the circuit (50), but instead is cleanly generated within the circuit (50) itself when needed. Thereafter, the generated Vcom signal is paralleled with the integration capacitor (C1) to produce the non-differential output voltage Vout. Then, the sampling capacitors (Cs) are shorted to remove any charges stored on them and the process is repeated.