专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2008131075A2 LARGE GRAIN, MULTI-CRYSTALLINE SEMICONDUCTOR INGOT FORMATION METHOD AND SYSTEM 审中-公开
标题翻译：大颗粒，多晶半导体成像方法与系统
公开(公告)号：WO2008131075A2
公开(公告)日：2008-10-30
申请号：PCT/US2008060589
申请日：2008-04-17
申请人： CALISOLAR INC , LINKE DIETER , HEUER MATTHIAS , KIRSCHT FRITZ , RAKOTONIANA JEAN PATRICE , OUNADJELA KAMEL
发明人： LINKE DIETER , HEUER MATTHIAS , KIRSCHT FRITZ , RAKOTONIANA JEAN PATRICE , OUNADJELA KAMEL
IPC分类号： C30B15/20
CPC分类号： C30B11/002 , C01B33/037 , C30B11/003 , C30B28/06 , C30B29/06 , H01L31/1804 , Y02E10/547 , Y02P70/521 , Y10T117/1008
摘要： Techniques for the formation of a large grain, multi-crystalline semiconductor ingot and include forming a silicon melt in a crucible, the crucible capable of locally controlling thermal gradients within the silicon melt. The local control of thermal gradients preferentially forms silicon crystals in predetermined regions within the silicon melt by locally reducing temperatures is the predetermined regions. The method and system control the rate at which the silicon crystals form using local control of thermal gradients for inducing the silicon crystals to obtain preferentially maximal sizes and, thereby, reducing the number of grains for a given volume. The process continues the thermal gradient control and the rate control step to form a multi crystalline silicon ingot having reduced numbers of grains for a given volume of the silicon ingot.
摘要翻译：用于形成大晶粒，多晶半导体锭的技术包括在坩埚中形成硅熔体，该坩埚能够局部地控制硅熔体内的热梯度。热梯度的局部控制优先在硅熔体内的预定区域中形成硅晶体，局部降低温度是预定区域。该方法和系统通过局部控制热梯度来控制硅晶体的形成速度，以便诱导硅晶体优先获得最大尺寸，从而减少给定体积的晶粒数。该过程继续进行热梯度控制和速率控制步骤以形成对于给定体积的硅锭具有减少的晶粒数量的多晶硅锭。

2. 发明申请

WO2008095111A3 METHOD AND SYSTEM FOR FORMING A HIGHER PURITY SEMICONDUCTOR INGOT USING LOW PURITY SEMICONDUCTOR FEEDSTOCK 审中-公开
标题翻译：使用低纯度半导体原料来形成较高纯度半导体的方法和系统
公开(公告)号：WO2008095111A3
公开(公告)日：2008-10-16
申请号：PCT/US2008052676
申请日：2008-01-31
申请人： CALISOLAR INC , HEUER MATTHIAS , KIRSCHT FRITZ , LINKE DIETER , RAKOTONIANA JEAN PATRICE , OUNADJELA KAMEL
发明人： HEUER MATTHIAS , KIRSCHT FRITZ , LINKE DIETER , RAKOTONIANA JEAN PATRICE , OUNADJELA KAMEL
IPC分类号： C30B27/02 , C30B30/00
CPC分类号： C30B29/06 , C30B11/04 , C30B11/14 , Y10T117/1092
摘要： Techniques for the formation of a higher purity semiconductor ingot using a low purity semiconductor feedstock include associating within a crucible a low-grade silicon feedstock, which crucible forms a process environment of said molten silicon. The process associates with the low-grade silicon feedstock, a quantity of the at least one metal and includes forming within the crucible a molten solution (e.g., a binary or ternary solution) of molten silicon and the metal at a temperature below the melting temperature of said low-grade silicon feedstock. A silicon seed crystal associates with the molten solution within the crucible for inducing directional silicon crystallization. The process further forms a silicon ingot from a portion of the molten solution in association with the silicon seed. The silicon ingot includes at least one silicon crystalline formation grown in the induced directional silicon crystallization process. The resulting silicon ingot has a silicon purity substantially exceeding the silicon purity of said low grade silicon feedstock.
摘要翻译：使用低纯度半导体原料形成更高纯度半导体晶锭的技术包括在坩埚内使低级硅原料缔合，该坩埚形成所述熔融硅的工艺环境。该方法与低级硅原料即一定量的至少一种金属相关联，并且包括在坩埚内形成熔融硅和金属的熔融溶液（例如二元或三元溶液），其温度低于熔化温度的所述低品位硅原料。硅籽晶与坩埚内的熔化溶液结合以诱导定向硅结晶。该方法还从与硅籽晶相关的熔融溶液的一部分形成硅锭。硅锭包括在感应的定向硅结晶过程中生长的至少一个硅晶体结构。得到的硅锭具有基本上超过所述低品位硅原料的硅纯度的硅纯度。

3. 发明申请

WO2010005736A3 GERMANIUM-ENRICHED SILICON MATERIAL FOR MAKING SOLAR CELLS 审中-公开
标题翻译：富含锗的硅材料用于制备太阳能电池
公开(公告)号：WO2010005736A3
公开(公告)日：2010-03-04
申请号：PCT/US2009047539
申请日：2009-06-16
申请人： CALISOLAR INC , KIRSCHT FRITZ , ABROSIMOVA VERA , HEUER MATTHIAS , JOUINI ANIS , LINKE DIETER , KAES MARTIN , RAKOTONIAINA JEAN PATRICE , OUNADJELA KAMEL
发明人： KIRSCHT FRITZ , ABROSIMOVA VERA , HEUER MATTHIAS , JOUINI ANIS , LINKE DIETER , KAES MARTIN , RAKOTONIAINA JEAN PATRICE , OUNADJELA KAMEL
IPC分类号： H01L31/00
CPC分类号： C30B29/06 , C30B11/00 , C30B11/04 , C30B11/08 , C30B13/00 , C30B13/08 , C30B13/10 , C30B15/00 , C30B15/02 , C30B15/04 , C30B29/52 , H01L31/028 , Y02E10/547 , Y10T117/1024 , Y10T117/1068
摘要： Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. Common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, mainly increased material strength. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells. A silicon material with a germanium concentration in the range (50-200) ppmw demonstrates an increased material strength, where best practical ranges depend on the material quality generated.
摘要翻译：描述了使用各种等级的硅原料形成硅锭和晶体的技术。共同的特征是向熔体添加预定量的锗，并执行结晶以将锗掺入相应晶体硅材料的硅晶格中。这种掺入的锗导致各个硅材料特性的改进，主要是材料强度的增加。这导致在太阳能电池制造中应用这些材料以及从这些太阳能电池制造模块时产生积极效果。锗浓度在（50-200）ppmw范围内的硅材料表现出增加的材料强度，其中最佳实际范围取决于所产生的材料质量。

4. 发明申请

WO2010126639A1 PROCESS CONTROL FOR UMG-SI MATERIAL PURIFICATION 审中-公开
标题翻译：用于UMG-SI材料纯化的过程控制
公开(公告)号：WO2010126639A1
公开(公告)日：2010-11-04
申请号：PCT/US2010023798
申请日：2010-02-10
申请人： CALISOLAR INC , OUNADJELA KAMEL , WALERYSIAK MARCIN , JOUINI ANIS , HEUER MATTHIAS , SIDELKHEIR OMAR , BLOSSSE ALAIN , KIRSCHT FRITZ
发明人： OUNADJELA KAMEL , WALERYSIAK MARCIN , JOUINI ANIS , HEUER MATTHIAS
IPC分类号： C01B33/02
CPC分类号： C01B33/037 , C30B11/00 , C30B11/002 , C30B11/003 , C30B29/06 , C30B35/007
摘要： A process control method for UMG-Si purification by performing a directional solidification of molten UMG-Si to form a silicon ingot is described. The ingot is divided into bricks and the resistivity profile of each silicon brick is mapped. A crop line for removing the impurities concentrated and captured in the ingot during the directional solidification is calculated based on the resistivity map. The concentrated impurities are then removed by cropping each brick along that brick's calculated crop line.
摘要翻译：描述了通过执行熔融UMG-Si的定向凝固以形成硅锭的UMG-Si纯化的工艺控制方法。铸锭分为砖块，每块硅砖的电阻率分布图。基于电阻率图计算在定向凝固期间去除在锭中浓缩和捕获的杂质的作物线。然后通过沿着砖的计算作物线裁剪每个砖，去除浓缩的杂质。

5. 发明申请

WO2009114446A2 A SOLAR CELL AND FABRICATION METHOD USING CRYSTALLINE SILICON BASED ON LOWER GRADE FEEDSTOCK MATERIALS 审中-公开
标题翻译：一种基于较低级材料的晶体硅太阳能电池和制造方法
公开(公告)号：WO2009114446A2
公开(公告)日：2009-09-17
申请号：PCT/US2009036469
申请日：2009-03-09
申请人： CALISOLAR INC , OUNADJELA KAMEL , RAKOTONIAINA JEAN PATRICE , KAES MARTIN , ZICKERMANN DIRK , BLOSSE ALAIN , ZERGA ABDELLATIF , HEUER MATTHIAS , KIRSCHT FRITZ
发明人： OUNADJELA KAMEL , RAKOTONIAINA JEAN PATRICE , KAES MARTIN , ZICKERMANN DIRK , BLOSSE ALAIN , ZERGA ABDELLATIF , HEUER MATTHIAS , KIRSCHT FRITZ
IPC分类号： H01L31/00 , H01L31/042
CPC分类号： C23C18/1692 , C23C18/1603 , C23C18/1605 , C23C18/1653 , C23C18/32 , C25D7/12 , H01L31/02168 , H01L31/02245 , H01L31/0236 , H01L31/02363 , H01L31/068 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： Formation of a solar cell device from upgraded metallurgical grade silicon which has received at least one defect engineering process and including a low contact resistance electrical path. An anti- reflective coating is formed on an emitter layer and back contacts are formed on a back surface of the bulk silicon substrate. This photovoltaic device may be fired to form back surface field temperatures sufficiently low to avoid reversal of previous defect engineering processes. The process further forms openings in the anti-reflective coating and a low contact resistance metal layer, such as nickel layer, over the openings in the coating. The process may anneal the low contact resistance metal layer to form n- doped portion and complete an electrically conduct path to the n-doped layer. This low temperature metallization (e.g.,
摘要翻译：从升级的冶金级硅形成太阳能电池装置，其已经接收了至少一个缺陷工程过程并且包括低接触电阻的电路径。在发射极层上形成抗反射涂层，在体硅衬底的后表面上形成背面触点。该光伏器件可以被烧制以形成足够低的背表面场温度，以避免先前的缺陷工程过程的逆转。该方法在涂层的开口上进一步形成抗反射涂层中的开口和低接触电阻金属层，例如镍层。该工艺可以使低接触电阻金属层退火以形成n掺杂部分并且完成到n掺杂层的导电路径。这种低温金属化（例如，<700℃）支持使用UMG硅用于太阳能装置形成，而不会改变早期的缺陷工程过程。

6. 发明专利

IL250936D0 Method for purifying halogenated oligosilanes 未知
公开(公告)号：IL250936D0
公开(公告)日：2017-04-30
申请号：IL25093617
申请日：2017-03-05
申请人： PSC POLYSILANE CHEMICALS GMBH , BAUCH CHRISTIAN , HOLL SVEN; LANGESTR , HEUER MATTHIAS
发明人： BAUCH CHRISTIAN , HOLL SVEN; LANGESTR , HEUER MATTHIAS
IPC分类号： C01B20060101
摘要： The invention relates to a method for purifying halogenated oligosilanes in the form of a pure compound or a mixture of compounds with respectively at least one direct Si—Si bond, the substituents thereof being exclusively made from halogen or from halogen and hydrogen and in the composition thereof, the atomic ratio of the substituents:silicon is at least 3:2, by the action of at least one purification agent on the halogenated oligosilane and by isolating the halogenated oligosilanes with improved purity. According to prior art, halogenated monosilanes such as HSiCl3 are purified by treating with organic compounds, preferably polymers, containing amino groups, and are separated from said mixtures. Based on the contained amino groups, said method can not be used for halogenated oligosilanes as the secondary reactions lead to a decomposition of the products. The novel method is used to provide the desired products in a high yield and purity without using the amino groups.

7. 发明专利

HK1142870A1 METHOD FOR CONTROLLING RESISTIVITY IN INGOTS MADE OF COMPENSATED FEEDSTOCK SILICON 未知
公开(公告)号：HK1142870A1
公开(公告)日：2010-12-17
申请号：HK10109315
申请日：2010-09-29
申请人： CALISOLAR INC
发明人： KIRSCHT FRITZ , ABROSIMOVA VERA , HEUER MATTHIAS , LINKE DIETER , RAKOTONIANA JEAN PATRICE , OUNADJELA KAMEL
IPC分类号： C01B20060101
摘要： Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides a predominantly p-type semiconductor for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of aluminum or/and gallium. The process further melts the silicon feedstock together with a predetermined amount of aluminum or/and gallium to form a molten silicon solution from which to perform directional solidification and, by virtue of adding aluminum or/and gallium, maintains the homogeneity the resistivity of the silicon ingot throughout the silicon ingot. In the case of feedstock silicon leading to low resistivity in respective ingots, typically below 0.4 ©cm, a balanced amount of phosphorus can be optionally added to aluminum or/and gallium. Adding phosphorus becomes mandatory at very low resistivity, typically close to 0.2 ©cm and slightly below.

8. 发明专利

AT532749T 未知
公开(公告)号：AT532749T
公开(公告)日：2011-11-15
申请号：AT08772195
申请日：2008-06-27
申请人： CALISOLAR INC
发明人： KIRSCHT FRITZ , ABROSIMOVA VERA , HEUER MATTHIAS , LINKE DIETER , RAKOTONIAINA JEAN , OUNADJELA KAMEL
IPC分类号： C01B33/26
摘要： Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides a predominantly p-type semiconductor for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of aluminum or/and gallium. The process further melts the silicon feedstock together with a predetermined amount of aluminum or/and gallium to form a molten silicon solution from which to perform directional solidification and, by virtue of adding aluminum or/and gallium, maintains the homogeneity the resistivity of the silicon ingot throughout the silicon ingot. In the case of feedstock silicon leading to low resistivity in respective ingots, typically below 0.4 ©cm, a balanced amount of phosphorus can be optionally added to aluminum or/and gallium. Adding phosphorus becomes mandatory at very low resistivity, typically close to 0.2 ©cm and slightly below.

9. 发明专利

CA2718012A1 A SOLAR CELL AND FABRICATION METHOD USING CRYSTALLINE SILICON BASED ON LOWER GRADE FEEDSTOCK MATERIALS 未知
公开(公告)号：CA2718012A1
公开(公告)日：2009-09-17
申请号：CA2718012
申请日：2009-03-09
申请人： CALISOLAR INC
发明人： OUNADJELA KAMEL , RAKOTONIAINA JEAN PATRICE , KAES MARTIN , ZICKERMANN DIRK , BLOSSE ALAIN , ZERGA ABDELLATIF , HEUER MATTHIAS , KIRSCHT FRITZ
IPC分类号： H01L31/00 , H01L31/042
摘要： Formation of a solar cell device from upgraded metallurgical grade silicon which has received at least one defect engineering process and including a low contact resistance electrical path. An anti- reflective coating is formed on an emitter layer and back contacts are formed on a back surface of the bulk silicon substrate. This photovoltaic device may be fired to form back surface field temperatures sufficiently low to avoid reversal of previous defect engineering processes. The process further forms openings in the anti-reflective coating and a low contact resistance metal layer, such as nickel layer, over the openings in the coating. The process may anneal the low contact resistance metal layer to form n- doped portion and complete an electrically conduct path to the n-doped layer. This low temperature metallization (e.g.,

10. 发明专利

AU2009223574A1 A solar cell and fabrication method using crystalline silicon based on lower grade feedstock materials 未知
公开(公告)号：AU2009223574A1
公开(公告)日：2009-09-17
申请号：AU2009223574
申请日：2009-03-09
申请人： CALISOLAR INC
发明人： KAES MARTIN , OUNADJELA KAMEL , HEUER MATTHIAS , RAKOTONIAINA JEAN PATRICE , BLOSSE ALAIN , ZICKERMANN DIRK , ZERGA ABDELLATIF , KIRSCHT FRITZ
IPC分类号： H01L31/00
摘要： Formation of a solar cell device from upgraded metallurgical grade silicon which has received at least one defect engineering process and including a low contact resistance electrical path. An anti-reflective coating is formed on an emitter layer and back contacts are formed on a back surface of the bulk silicon substrate. This photovoltaic device may be fired to form a back surface field at a temperature sufficiently low to avoid reversal of previous defect engineering processes. The process further forms openings in the anti-reflective coating and a low contact resistance metal layer, such as nickel layer, over the openings in the anti-reflective coating. The process may anneal the low contact resistance metal layer to form n-doped portion and complete an electrically conduct path to the n-doped layer. This low temperature metallization (e.g.,

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式