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1. 发明授权

US5296738A Moisture relief for chip carrier 失效
标题翻译：芯片载体防潮
公开(公告)号：US5296738A
公开(公告)日：1994-03-22
申请号：US927774
申请日：1992-08-10
申请人： Bruce J. Freyman , Frank J. Juskey , Barry M. Miles
发明人： Bruce J. Freyman , Frank J. Juskey , Barry M. Miles
IPC分类号： H01L21/56 , H01L21/58 , H01L23/00 , H01L23/13 , H01L23/28 , H01L23/31 , H05K13/02
CPC分类号： H01L23/564 , H01L23/13 , H01L23/3121 , H01L24/29 , H01L24/83 , H01L2224/2919 , H01L2224/32225 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/4823 , H01L2224/49171 , H01L2224/73265 , H01L2224/8319 , H01L2224/8385 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01015 , H01L2924/01047 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/15151 , H01L2924/181
摘要： An integrated circuit package (10) comprises a semiconductor die (14) having a top surface and a bottom surface, and a substrate (16) for receiving the semiconductor die. The substrate should have an aperture(s) (18) below the semiconductor die for providing moisture relief during temperature excursions. An adhesive (20) applied to the substrate allows for mounting the semiconductor die to the substrate. Then, the semiconductor die is wirebonded to the substrate. Finally, an encapsulant (12) for sealing the top surface of the semiconductor die is formed over the semiconductor die and portions of the substrate.
摘要翻译：集成电路封装（10）包括具有顶表面和底表面的半导体管芯（14）和用于接收半导体管芯的衬底（16）。衬底应在半导体管芯下方具有一个（18）的孔口，用于在温度偏移期间提供湿气释放。施加到基板上的粘合剂（20）允许将半导体管芯安装到基板上。然后，半导体管芯与引线接合。最后，在半导体管芯和衬底的部分之上形成用于密封半导体管芯的顶表面的密封剂（12）。

2. 发明授权

US5166772A Transfer molded semiconductor device package with integral shield 失效
标题翻译：带有整体式屏蔽的半导体器件封装
公开(公告)号：US5166772A
公开(公告)日：1992-11-24
申请号：US658810
申请日：1991-02-22
申请人： Keith D. Soldner , Frank J. Juskey , Bruce J. Freyman , Barry M. Miles
发明人： Keith D. Soldner , Frank J. Juskey , Bruce J. Freyman , Barry M. Miles
IPC分类号： H01L23/31 , H01L23/552 , H01L23/60
CPC分类号： H01L23/3121 , H01L23/552 , H01L23/60 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/3025
摘要： A shielded semiconductor package and a method for manufacturing the package is provided. The shielded semiconductor package comprises a substrate (10) having a metallization pattern (12, 13), with one portion of the metallization pattern being a circuit ground (13). A semiconductor device (16) is electrically interconnected (17) to the metallization pattern (12). A perforated metal shield or screen (18) covers the semiconductor device (16) and is electrically and mechanically attached to the metallization circuit ground (13) in order to shield the semiconductor device (16) from radio frequency energy. A resin material (14) is transfer molded about the semiconductor device, the electrical interconnections, and the metal screen to form the completed package.
摘要翻译：提供一种屏蔽半导体封装及其制造方法。屏蔽半导体封装包括具有金属化图案（12,13）的衬底（10），金属化图案的一部分是电路接地（13）。半导体器件（16）与金属化图案（12）电互连（17）。穿孔的金属屏蔽或屏蔽（18）覆盖半导体器件（16）并且电气和机械地附接到金属化电路接地（13），以便屏蔽半导体器件（16）与射频能量。树脂材料（14）围绕半导体器件，电互连和金属屏蔽传递模制以形成完成的封装。

3. 发明授权

US5077633A Grounding an ultra high density pad array chip carrier 失效
标题翻译：接地超高密度垫片阵列载体
公开(公告)号：US5077633A
公开(公告)日：1991-12-31
申请号：US345280
申请日：1989-05-01
申请人： Bruce J. Freyman , Barry M. Miles , Frank J. Juskey
发明人： Bruce J. Freyman , Barry M. Miles , Frank J. Juskey
IPC分类号： H01L21/52 , H01L21/58 , H01L21/60 , H01L23/498 , H05K7/02
CPC分类号： H01L24/32 , H01L23/49827 , H01L24/83 , H01L2224/2919 , H01L2224/29339 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/8319 , H01L2224/8385 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01006 , H01L2924/01023 , H01L2924/01047 , H01L2924/01057 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/14 , H01L2924/15173 , H01L2924/15787
摘要： A die pad (108) with a punched hole providing a throughway (110) is affixed upon the chip carrier base 100. Such throughway permits the electronic interconnection of the die backside (112) to a conductive runner (104) by electrically conductive material (110) set between the die backside (112) and the conductive runner (104).
摘要翻译：具有提供通道（110）的冲孔的模垫（108）被固定在芯片载体基座100上。这样的通道允许模具背面（112）与导电流道（104）的电子互连通过导电材料 110）设置在模具背面（112）和导电浇道（104）之间。

4. 发明授权

US5438224A Integrated circuit package having a face-to-face IC chip arrangement 失效
标题翻译：具有面对面IC芯片布置的集成电路封装
公开(公告)号：US5438224A
公开(公告)日：1995-08-01
申请号：US159910
申请日：1993-12-01
申请人： Marc V. Papageorge , Bruce J. Freyman , Frank J. Juskey , John R. Thome
发明人： Marc V. Papageorge , Bruce J. Freyman , Frank J. Juskey , John R. Thome
IPC分类号： H01L23/495 , H01L23/498 , H01L25/065 , H01L23/02 , H01L23/12 , H01L23/44 , H01L29/41
CPC分类号： H01L23/4985 , H01L23/49575 , H01L25/0657 , H01L2224/16 , H01L2225/06517 , H01L2225/06555 , H01L2225/06572 , H01L2225/06579 , H01L2924/01079 , H01L2924/15311
摘要： An integrated circuit package includes a stacked integrated circuit chip arrangement (140) placed on a circuit substrate. The stacked IC chip arrangement includes a first IC chip (110) and a second IC chip (120), each having an array of terminals (116, 126) and being positioned in a face-to-face manner. An interposed substrate (130) is positioned between the first IC chip (110) and the second IC chip (120) such that circuitry disposed on the interposed substrate (130) provides electrical connection among the arrays of terminals of the first IC chip (110) and the second IC chip (120) and external circuitry.
摘要翻译：集成电路封装包括放置在电路基板上的堆叠集成电路芯片布置（140）。堆叠的IC芯片装置包括第一IC芯片（110）和第二IC芯片（120），每个芯片具有端子阵列（116,126）并且以面对面的方式定位。插入的基板（130）位于第一IC芯片（110）和第二IC芯片（120）之间，使得设置在插入的基板（130）上的电路在第一IC芯片（110）的端子阵列之间提供电连接）和第二IC芯片（120）和外部电路。

5. 发明授权

US5218759A Method of making a transfer molded semiconductor device 失效
标题翻译：制造转印模制半导体器件的方法
公开(公告)号：US5218759A
公开(公告)日：1993-06-15
申请号：US670663
申请日：1991-03-18
申请人： Frank J. Juskey , Lonnie L. Bernardoni , Bruce J. Freyman , Anthony B. Suppelsa
发明人： Frank J. Juskey , Lonnie L. Bernardoni , Bruce J. Freyman , Anthony B. Suppelsa
IPC分类号： H01L21/56 , H01L21/68
CPC分类号： H01L21/568 , H01L21/565 , H01L2224/48091 , H01L2924/01004 , H01L2924/181 , Y10T29/49144 , Y10T29/49146 , Y10T29/49149
摘要： A method of making a pad array chip carrier package is disclosed. A semiconductor device (10) is bonded to a ceramic substrate (12). The semiconductor device may be attached to the substrate by wirebonding, tab bonding or flip chip bonding. The bonded assembly (16) is then attached to a flexible temporary support substrate (18) by means of an adhesive (19). The entire assembly is then placed into a mold cavity (20 and 22) and registered against the temporary support substrate (18). Plastic material (30) is molded about the semiconductor device and associated wirebonds in order to encapsulate the device. After removal from the mold, the encapsulated assembly is removed from the temporary support substrate (18) by peeling the temporary support substrate (18) from the circuit substrate.
摘要翻译：公开了制造焊盘阵列芯片载体封装的方法。将半导体器件（10）接合到陶瓷衬底（12）上。半导体器件可以通过引线接合，接头接合或倒装芯片接合而附接到基板。接合组件（16）然后通过粘合剂（19）附接到柔性临时支撑衬底（18）。然后将整个组件放入模腔（20和22）中并与临时支撑衬底（18）对准。围绕半导体器件和相关联的引线键合塑料材料（30），以封装该器件。从模具中取出之后，通过从电路基板剥离临时支撑基板（18），将封装的组件从临时支撑基板（18）移除。

6. 发明授权

US5535101A Leadless integrated circuit package 失效
标题翻译：无铅集成电路封装
公开(公告)号：US5535101A
公开(公告)日：1996-07-09
申请号：US970901
申请日：1992-11-03
申请人： Barry M. Miles , Frank J. Juskey , Kingshuk Banerji
发明人： Barry M. Miles , Frank J. Juskey , Kingshuk Banerji
IPC分类号： H01L21/56 , H01L23/13 , H01L23/31 , H05K7/10
CPC分类号： H01L23/13 , H01L21/563 , H01L23/3121 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01079 , H01L2924/01087 , H01L2924/15311
摘要： A semiconductor device package comprises an integrated circuit chip (10), a substrate (16), an encapsulant (30), and an organic coupling agent or underfill material (12) disposed between the integrated circuit chip and the first side of the substrate. The chip has a plurality of interconnection pads (14) disposed on an active surface of the chip at some minimum spacing "X." Each of the interconnect pads also has electrically conducting bumps (26) on them. The substrate has a circuit pattern (20) on a first side and an array of solder pads (23) spaced a certain distance apart on an opposite side of the substrate. The distance between these pads is greater than the minimum distance (X) between the interconnect pads on the IC. The circuit pattern is electrically connected to the array of solder pads by plated through holes (22). The length and width of the circuit carrying substrate is substantially greater than the length and width of the integrated circuit chip. The chip is mounted face down to the substrate with the electrically connecting bumps, such that at least some of the plated through holes in the substrate are covered by the chip. The polymeric encapsulant (30) covers the entire chip and substantially all of the first side of the substrate, providing a sealed package.
摘要翻译：半导体器件封装包括集成电路芯片（10），衬底（16），密封剂（30）以及设置在集成电路芯片和衬底的第一侧之间的有机耦合剂或底部填充材料（12）。芯片具有多个布置在芯片的有效表面上的互连焊盘（14），该互连焊盘以一定的最小间距“X” 每个互连焊盘在其上也具有导电凸块（26）。衬底在第一侧具有电路图案（20）和在衬底的相对侧上间隔一定距离的焊盘（23）阵列。这些焊盘之间的距离大于IC上的互连焊盘之间的最小距离（X）。电路图案通过电镀通孔（22）电连接到焊盘阵列。电路承载衬底的长度和宽度远大于集成电路芯片的长度和宽度。芯片通过电连接凸块面向下安装到基板上，使得基板中的至少一些电镀通孔被芯片覆盖。聚合物密封剂（30）覆盖基片的整个芯片和基本上所有的第一侧，提供密封的封装。

7. 发明授权

US5019673A Flip-chip package for integrated circuits 失效
标题翻译：用于集成电路的倒装芯片封装
公开(公告)号：US5019673A
公开(公告)日：1991-05-28
申请号：US570751
申请日：1990-08-22
申请人： Frank J. Juskey , Barry M. Miles , Marc V. Papageorge
发明人： Frank J. Juskey , Barry M. Miles , Marc V. Papageorge
IPC分类号： H01L23/28 , H01L21/60 , H01L23/12 , H01L23/485
CPC分类号： H01L24/10 , H01L24/13 , H01L24/81 , H01L2224/13 , H01L2224/13099 , H01L2224/16237 , H01L2224/81801 , H01L2924/01005 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/14
摘要： A flip-chip package for integrated circuits is provided by over-molding an integrated circuit assembly which includes a flip-chip mounted to a very thin chip carrier. The flip-chip includes an array of bumped pads which fill an array of matching conductive through holes on the chip carrier and securely couple thereto. The chip carrier includes an array of bumped contacts on its back surface which correspond to the bumped pads of the flip-chip. The transfer over molding of the integrated circuit assembly provides a layer of epoxy around the exposed surfaces of the flip-chip providing an environmentally protected and removable integrated circuit package.
摘要翻译：用于集成电路的倒装芯片封装通过覆盖模制集成电路组件来提供，集成电路组件包括安装到非常薄的芯片载体上的倒装芯片。倒装芯片包括一组凸起的焊盘，其填充芯片载体上匹配的导电通孔的阵列并且牢固地耦接到芯片载体上。芯片载体在其后表面上包括与倒装芯片的凸起焊盘相对应的凸起触点阵列。集成电路组件的成型转移在倒装芯片的暴露表面周围提供环氧树脂层，其提供环境保护和可移除的集成电路封装。

8. 发明授权

US5153385A Transfer molded semiconductor package with improved adhesion 失效
标题翻译：转印模塑半导体封装具有改进的附着力
公开(公告)号：US5153385A
公开(公告)日：1992-10-06
申请号：US670648
申请日：1991-03-18
申请人： Frank J. Juskey , Lonnie L. Bernardoni , Thomas J. Swirbel , Barry M. Miles
发明人： Frank J. Juskey , Lonnie L. Bernardoni , Thomas J. Swirbel , Barry M. Miles
IPC分类号： B29C45/02 , B29L31/34 , H01L21/56 , H01L21/58 , H01L23/00 , H01L23/12 , H01L23/29 , H01L23/31 , H01L23/556
CPC分类号： H01L23/564 , H01L23/3121 , H01L23/556 , H01L24/32 , H01L24/83 , H01L2224/2919 , H01L2224/32014 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/8319 , H01L2224/8385 , H01L2224/8592 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01082 , H01L2924/01092 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/12044 , H01L2924/14 , H01L2924/181 , Y10S428/901
摘要： A transfer molded pad array chip carrier is formed by mounting and wirebonding a semiconductor device (12) on a printed circuit board (10). The bottom side of the printed circuit board may have an array of solderable surfaces (24). A polymer coating (18) is applied over the semiconductor device (12), the wirebonds (16), and the top side of the printed circuit board (10) and cured. The coating (18) is then sputter etched in a partial vacuum to enhance the adhesion of the transfer molding compound (20) to the printed circuit board (10). The semiconductor device is encapsulated by a transfer molding process. The polymer coating (18) also provides a barrier to alpha particle emission, improves the moisture resistance of the completed package and reduces stress at the surface of the device.
摘要翻译：通过将半导体器件（12）安装和引线接合在印刷电路板（10）上而形成传送模压焊盘阵列芯片载体。印刷电路板的底侧可以具有可焊接表面（24）的阵列。将聚合物涂层（18）施加在半导体器件（12），引线键（16）和印刷电路板（10）的顶侧上并固化。然后在部分真空中溅射蚀刻涂层（18），以增强传递模塑料（20）与印刷电路板（10）的粘合性。半导体器件通过传递模制工艺进行封装。聚合物涂层（18）还提供了对α粒子发射的屏障，提高了完成的封装的耐湿性，并降低了器件表面的应力。

9. 发明授权

US5264061A Method of forming a three-dimensional printed circuit assembly 失效
标题翻译：形成三维印刷电路组件的方法
公开(公告)号：US5264061A
公开(公告)日：1993-11-23
申请号：US964682
申请日：1992-10-22
申请人： Frank J. Juskey , Anthony B. Suppelsa , Dale W. Dorinski
发明人： Frank J. Juskey , Anthony B. Suppelsa , Dale W. Dorinski
IPC分类号： B29C35/08 , B29C67/00 , H05K3/00 , H05K3/22 , B05D5/12 , B29C41/02
CPC分类号： B29C67/0066 , H05K3/0014 , H05K3/0023 , B29C35/0805 , B29K2105/24 , H01L2224/32014 , H01L2224/48091 , H01L2224/73265 , H01L2924/01078 , H01L2924/19041 , H05K2201/0195 , H05K2201/09118 , H05K2203/107 , H05K2203/302 , H05K3/22 , Y10T156/1031 , Y10T156/1043 , Y10T29/4913 , Y10T29/49158 , Y10T29/4916 , Y10T29/49162
摘要： A three-dimensional printed circuit assembly is formed by first making a substrate (20). A substrate (20) is first formed from a photoactive polymer (14) that is capable of altering its physical state when exposed to a radiant beam (30). At this point, the substrate is only partially cured. A conductive circuit pattern (50) is then formed on the partially cured substrate. The substrate is then molded to create a three-dimensional structure, and then further cured to cause the photoactive polymer to harden.
摘要翻译：通过首先制造衬底（20）形成三维印刷电路组件。首先由光活性聚合物（14）形成衬底（20），光敏聚合物（14）当暴露于辐射束（30）时能够改变其物理状态。此时，基板仅部分固化。然后在部分固化的基板上形成导电电路图案（50）。然后将基材模制以产生三维结构，然后进一步固化以使光敏聚合物硬化。

10. 发明授权

US08487435B2 Sheet-molded chip-scale package 有权
标题翻译：片状模制芯片级封装
公开(公告)号：US08487435B2
公开(公告)日：2013-07-16
申请号：US13252083
申请日：2011-10-03
申请人： Frank J. Juskey , Paul Bantz , Otto Berger
发明人： Frank J. Juskey , Paul Bantz , Otto Berger
IPC分类号： H01L29/40 , H01L21/44
CPC分类号： H01L23/5389 , H01L21/561 , H01L21/568 , H01L23/3114 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/20 , H01L24/93 , H01L25/16 , H01L2223/6677 , H01L2224/038 , H01L2224/0383 , H01L2224/0391 , H01L2224/0401 , H01L2224/05073 , H01L2224/05147 , H01L2224/05611 , H01L2224/05647 , H01L2224/119 , H01L2224/12105 , H01L2224/13022 , H01L2224/13023 , H01L2224/13026 , H01L2224/13082 , H01L2224/131 , H01L2224/13111 , H01L2224/13147 , H01L2224/16225 , H01L2224/81815 , H01L2224/93 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L21/56 , H01L2224/11 , H01L2224/03 , H01L2924/00014 , H01L2924/00
摘要： Embodiments include but are not limited to apparatuses and systems including a microelectronic device including a die having a first surface and a second surface opposite the first surface, a conductive pillar formed on the first surface of the die, and an encapsulant material encasing the die, including covering the first surface, the second surface, and at least a portion of a side surface of the conductive pillar. Methods for making the same also are described.
摘要翻译：实施例包括但不限于包括微电子器件的设备和系统，该微电子器件包括具有第一表面和与第一表面相对的第二表面的管芯，形成在管芯的第一表面上的导电柱和封装管芯的密封剂材料，包括覆盖导电柱的第一表面，第二表面和至少一部分侧表面。也对其制作方法进行了说明。

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