专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5264061A Method of forming a three-dimensional printed circuit assembly 失效
标题翻译：形成三维印刷电路组件的方法
公开(公告)号：US5264061A
公开(公告)日：1993-11-23
申请号：US964682
申请日：1992-10-22
申请人： Frank J. Juskey , Anthony B. Suppelsa , Dale W. Dorinski
发明人： Frank J. Juskey , Anthony B. Suppelsa , Dale W. Dorinski
IPC分类号： B29C35/08 , B29C67/00 , H05K3/00 , H05K3/22 , B05D5/12 , B29C41/02
CPC分类号： B29C67/0066 , H05K3/0014 , H05K3/0023 , B29C35/0805 , B29K2105/24 , H01L2224/32014 , H01L2224/48091 , H01L2224/73265 , H01L2924/01078 , H01L2924/19041 , H05K2201/0195 , H05K2201/09118 , H05K2203/107 , H05K2203/302 , H05K3/22 , Y10T156/1031 , Y10T156/1043 , Y10T29/4913 , Y10T29/49158 , Y10T29/4916 , Y10T29/49162
摘要： A three-dimensional printed circuit assembly is formed by first making a substrate (20). A substrate (20) is first formed from a photoactive polymer (14) that is capable of altering its physical state when exposed to a radiant beam (30). At this point, the substrate is only partially cured. A conductive circuit pattern (50) is then formed on the partially cured substrate. The substrate is then molded to create a three-dimensional structure, and then further cured to cause the photoactive polymer to harden.
摘要翻译：通过首先制造衬底（20）形成三维印刷电路组件。首先由光活性聚合物（14）形成衬底（20），光敏聚合物（14）当暴露于辐射束（30）时能够改变其物理状态。此时，基板仅部分固化。然后在部分固化的基板上形成导电电路图案（50）。然后将基材模制以产生三维结构，然后进一步固化以使光敏聚合物硬化。

2. 发明授权

US5438216A Light erasable multichip module 失效
标题翻译：光可擦多芯片模块
公开(公告)号：US5438216A
公开(公告)日：1995-08-01
申请号：US937017
申请日：1992-08-31
申请人： Frank J. Juskey , Anthony B. Suppelsa , Dale W. Dorinski
发明人： Frank J. Juskey , Anthony B. Suppelsa , Dale W. Dorinski
IPC分类号： G11C5/00 , G11C16/18 , H01L27/14 , H01L23/02 , H01L23/12 , H01L31/00
CPC分类号： G11C16/18 , G11C5/00 , H01L2224/48091 , H01L2924/01322 , H01L2924/1815
摘要： A multichip circuit package is formed for use with an EPROM chip. The active circuitry on the EPROM die surface is revealed. An EPROM die (14) is mounted on an insulating substrate (10). The active circuitry (15) on the die is connected to a conductive circuit pattern (13) on the substrate by wire bonds (16) between the die and the conductive circuit pattern. A second integrated circuit die (20) is also mounted on the substrate and electrically connected to the conductive circuit pattern by wire bonds. A plastic material (50) is then molded to encapsulate the perimeter (18) of the EPROM and the associated thin wires, the entire second integrated circuit die and it's associated thin wires, at least a portion of the conductive circuit pattern, and portions of the insulating substrate. The plastic material is formed so as to expose the active circuitry on the face of the EPROM.
摘要翻译：形成用于EPROM芯片的多芯片电路封装。显示了EPROM芯片表面上的有源电路。 EPROM芯片（14）安装在绝缘基板（10）上。管芯上的有源电路（15）通过管芯和导电电路图案之间的引线键合（16）连接到衬底上的导电电路图案（13）。第二集成电路管芯（20）也安装在衬底上并且通过引线键与导电电路图案电连接。塑料材料（50）然后被模制以封装EPROM的周边（18）和相关联的细线，整个第二集成电路管芯及其相关联的细线，导电电路图案的至少一部分和绝缘基板。塑料材料被形成为暴露EPROM表面上的有源电路。

3. 发明授权

US5218759A Method of making a transfer molded semiconductor device 失效
标题翻译：制造转印模制半导体器件的方法
公开(公告)号：US5218759A
公开(公告)日：1993-06-15
申请号：US670663
申请日：1991-03-18
申请人： Frank J. Juskey , Lonnie L. Bernardoni , Bruce J. Freyman , Anthony B. Suppelsa
发明人： Frank J. Juskey , Lonnie L. Bernardoni , Bruce J. Freyman , Anthony B. Suppelsa
IPC分类号： H01L21/56 , H01L21/68
CPC分类号： H01L21/568 , H01L21/565 , H01L2224/48091 , H01L2924/01004 , H01L2924/181 , Y10T29/49144 , Y10T29/49146 , Y10T29/49149
摘要： A method of making a pad array chip carrier package is disclosed. A semiconductor device (10) is bonded to a ceramic substrate (12). The semiconductor device may be attached to the substrate by wirebonding, tab bonding or flip chip bonding. The bonded assembly (16) is then attached to a flexible temporary support substrate (18) by means of an adhesive (19). The entire assembly is then placed into a mold cavity (20 and 22) and registered against the temporary support substrate (18). Plastic material (30) is molded about the semiconductor device and associated wirebonds in order to encapsulate the device. After removal from the mold, the encapsulated assembly is removed from the temporary support substrate (18) by peeling the temporary support substrate (18) from the circuit substrate.
摘要翻译：公开了制造焊盘阵列芯片载体封装的方法。将半导体器件（10）接合到陶瓷衬底（12）上。半导体器件可以通过引线接合，接头接合或倒装芯片接合而附接到基板。接合组件（16）然后通过粘合剂（19）附接到柔性临时支撑衬底（18）。然后将整个组件放入模腔（20和22）中并与临时支撑衬底（18）对准。围绕半导体器件和相关联的引线键合塑料材料（30），以封装该器件。从模具中取出之后，通过从电路基板剥离临时支撑基板（18），将封装的组件从临时支撑基板（18）移除。

4. 发明授权

US5075820A Circuit components having different characteristics with constant size 失效
标题翻译：具有恒定尺寸不同特性的电路元件
公开(公告)号：US5075820A
公开(公告)日：1991-12-24
申请号：US563575
申请日：1990-08-06
申请人： Frank J. Juskey , Anthony J. Suppelsa , Anthony B. Suppelsa
发明人： Frank J. Juskey , Anthony J. Suppelsa , Anthony B. Suppelsa
IPC分类号： H01G4/18
CPC分类号： H01G4/18 , Y10T29/435
摘要： A circuit component 100 or (200) comprising typically of a hollow body 101 (201) and a plurality of solderable terminations (102 and 103 (202 and 203) is being disclosed. Internal to said circuit component 100 (200) is a plurality of electrodes 104 and 106 (204 and 206). A filling point 108 (208) is provided so as to fill the volume of said circiut component (100 (200 ) with a specific compound 114 (214) having a desired electrical characteristics including dielectric constant. A method for manufacturing said circuit component 100 (200) is disclosed.
摘要翻译：正在公开通常包括中空主体101（201）和多个可焊接终端（102和103（202和203））的电路部件100或（200）。所述电路部件100（200）的内部是多个电极104和106（204和206），提供填充点108（208）以便用具有包括介电常数的所需电特性的特定化合物114（214）填充所述循环组分（100（200））的体积公开了一种用于制造所述电路部件100（200）的方法。

5. 发明授权

US5065122A Transmission line using fluroplastic as a dielectric 失效
标题翻译：传输线使用氟塑料作为电介质
公开(公告)号：US5065122A
公开(公告)日：1991-11-12
申请号：US577177
申请日：1990-09-04
申请人： Frank J. Juskey , Anthony B. Suppelsa , Jill L. Flaugher
发明人： Frank J. Juskey , Anthony B. Suppelsa , Jill L. Flaugher
IPC分类号： H01P3/08 , H05K1/02
CPC分类号： H01P3/085 , H01P3/081 , H05K1/024 , H05K3/4688 , H05K2201/015 , H05K2201/0187 , H05K2201/0715 , H05K2203/063 , Y10T29/49016
摘要： A multilayer substrate having an integral transmission line structure 300 is disclosed. The transmission line structure 300 is formed by metallizing a fluroplastic substrate on the inner surface 112 and outer surface 114 in order to form a transmission line. The metallized inner surface forms a conductive runner 106, while the outer metallized surface 114 forms a ground plane, with the fluroplastic substrate being the dielectric. The transmission line structure 300 is then encapsulated by two substrate layers (402, 404).
摘要翻译：公开了具有整体传输线结构300的多层基板。传输线结构300通过在内表面112和外表面114上金属化氟树脂基底而形成，以形成传输线。金属化的内表面形成导电流道106，而外部金属化表面114形成接地平面，其中氟树脂基底是电介质。然后，传输线结构300被两个衬底层（402,404）封装。

6. 发明授权

US5542171A Method of selectively releasing plastic molding material from a surface 失效
标题翻译：从表面选择性地释放塑料成型材料的方法
公开(公告)号：US5542171A
公开(公告)日：1996-08-06
申请号：US771663
申请日：1991-10-04
申请人： Frank J. Juskey , Anthony B. Suppelsa , Fadia Nounou
发明人： Frank J. Juskey , Anthony B. Suppelsa , Fadia Nounou
IPC分类号： B29C45/14 , H01L21/56 , H01K3/10
CPC分类号： H01L21/565 , B29C45/14655 , B29C45/14754 , B29C2045/1477 , B29C2045/14868 , H01L2924/0002 , Y10T29/49144 , Y10T29/49146 , Y10T29/49162
摘要： A method of making a transfer molded chip carrier. A semiconductor device (10) is first electrically and mechanically attached to a substrate (12). The substrate (12) is then treated by sputter etching so that it will provide good adhesion between the substrate and a molding compound (18) that is subsequently molded to the substrate (25). Portions of the treated substrate are then selectively contaminated in order to reduce the adhesion between these selected portions of the substrate and the molding compound. The molding compound is then formed around the semiconductor device so as to encapsulate it and also part of the surface of the substrate. Portions (20) of the transfer molded material that were molded over the selectively contaminated portions of the substrate (12) are then removed by breaking away.
摘要翻译：制造转印模塑芯片载体的方法。半导体器件（10）首先被电气和机械地连接到衬底（12）。然后通过溅射蚀刻处理衬底（12），使得衬底（12）将在衬底和随后模制到衬底（25）上的模塑料（18）之间提供良好的粘合性。然后处理的基材的一部分被选择性地污染，以便降低基材的这些选定部分和模塑料之间的粘合性。然后在半导体器件周围形成模制化合物，以便将其包封并且还包括基底表面的一部分。然后通过分离除去在衬底（12）的选择性污染部分上模制的转移模塑材料的部分（20）。

7. 发明授权

US5371404A Thermally conductive integrated circuit package with radio frequency shielding 失效
标题翻译：导热集成电路封装，带射频屏蔽
公开(公告)号：US5371404A
公开(公告)日：1994-12-06
申请号：US13391
申请日：1993-02-04
申请人： Frank J. Juskey , Anthony B. Suppelsa
发明人： Frank J. Juskey , Anthony B. Suppelsa
IPC分类号： H01L21/60 , H01L23/00 , H01L23/04 , H01L23/06 , H01L23/12 , H01L23/29 , H01L23/31 , H01L23/34 , H01L23/367 , H01L23/498 , H01L23/552 , H01L49/00 , H01L23/28 , H01L23/48 , H01L29/40
CPC分类号： H01L23/49816 , H01L23/04 , H01L23/3675 , H01L23/49811 , H01L23/49827 , H01L23/552 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L23/3128 , H01L2924/01079 , H01L2924/15311 , H01L2924/15312 , H01L2924/3025
摘要： A semiconductor device package comprises a substrate (10), a flip-chip (16), an underfill adhesive (25), and a thermally and electrically conductive plastic material (20). A leadless circuit carrying substrate has a metallization pattern (13) on a first side (15), one portion of the metallization pattern being a circuit ground (17). The second side has an array of surface mount solder pads (24) electrically connected to the metallization pattern by means of at least one conductive via (26) through the substrate. A semiconductor device (16) is flip-chip mounted to the metallization pattern by means of metal bumps (22). An underfill adhesive (25) fills the gap between the semiconductor device and the substrate. A thermally and electrically conductive plastic material (20) containing metal particles is transfer molded to encapsulate the semiconductor device, the underfill adhesive, and a portion of the first side of the leadless circuit carrying substrate, forming a cover. The conductive plastic material is electrically connected to the circuit ground to shield the semiconductor device from radio frequency energy, and is mechanically attached to the semiconductor device to dissipate heat. Fins (28) may be molded into the conductive plastic material to further enhance the ability to dissipate heat.
摘要翻译：半导体器件封装包括衬底（10），倒装芯片（16），底部填充粘合剂（25）和导热塑料材料（20）。无引线电路承载衬底在第一侧（15）上具有金属化图案（13），金属化图案的一部分是电路接地（17）。第二面具有通过穿过衬底的至少一个导电通孔（26）电连接到金属化图案的表面贴装焊盘（24）的阵列。半导体器件（16）通过金属凸块（22）倒装安装到金属化图案上。底部填充粘合剂（25）填充半导体器件和衬底之间的间隙。传送模塑含有金属颗粒的导热塑料材料（20）以封装半导体器件，底部填充粘合剂和无引线电路承载基板的第一侧的一部分，形成盖子。导电塑料材料电连接到电路接地以将半导体器件与射频能量隔离，并且机械地附接到半导体器件以散热。金箔（28）可以模制成导电塑料材料，以进一步提高散热能力。

8. 发明授权

US5232758A Non-hardening solvent removable hydrophobic conformal coatings 失效
标题翻译：非硬化溶剂可去除的疏水性保形涂层
公开(公告)号：US5232758A
公开(公告)日：1993-08-03
申请号：US577387
申请日：1990-09-04
申请人： Frank J. Juskey , Anthony B. Suppelsa , Kenneth M. Wasko
发明人： Frank J. Juskey , Anthony B. Suppelsa , Kenneth M. Wasko
IPC分类号： C09D5/08 , H05K3/28
CPC分类号： H05K3/284 , C09D5/08 , H05K2201/09872 , Y10S428/901 , Y10T29/49146 , Y10T29/49155 , Y10T428/239 , Y10T428/24851 , Y10T428/24868
摘要： A non-hardening, solvent removable hydrophobic conformal coating is provided for electronic devices, such as printed circuit boards. The coating material comprises a metal alkyl benzyl sulfonate, together with a carrier and a solvent. The metal alkyl benzyl sulfonate may include compounds such as calcium eicosanylbenzyl sulfonate. The carrier may be any oxidized hydrocarbon, such as lauryl ethanoxylate, for example, and the solvent may be any low boiling aliphatic hydrocarbon. Though the coating is impervious to water, it may be readily and selectively removed using a small quantity of a non-polar organic solvent, such as mineral spirits or terpenes. Thus, although the electronic device is protected from corrosion, electromigration and physical harm by the coating, the coating may be easily, quickly and selectively removed in the event a component needs replacement, repair or adjustment.
摘要翻译：为电子设备（例如印刷电路板）提供非硬化的，溶剂可移除的疏水性共形涂层。涂层材料包括金属烷基苄基磺酸盐，以及载体和溶剂。金属烷基苄基磺酸盐可以包括化合物如二十烷基苄基磺酸钙。载体可以是任何氧化的烃，例如月桂基乙氧基化物，并且溶剂可以是任何低沸点脂族烃。虽然涂层是不透水的，但是可以使用少量非极性有机溶剂如矿物油或萜烯容易地和选择性地除去涂层。因此，尽管电子器件被保护免受涂层的腐蚀，电迁移和物理伤害，但是在组件需要更换，修理或调整的情况下，涂层可以容易地，快速地和选择性地去除。

9. 发明授权

US5177669A Molded ring integrated circuit package 失效
标题翻译：成型环集成电路封装
公开(公告)号：US5177669A
公开(公告)日：1993-01-05
申请号：US844015
申请日：1992-03-02
申请人： Frank J. Juskey , Anthony B. Suppelsa , Linda K. Berrian
发明人： Frank J. Juskey , Anthony B. Suppelsa , Linda K. Berrian
IPC分类号： H01L23/28 , H01L23/29 , H01L23/31 , H01L23/367 , H01L23/433 , H01L23/495 , H01L23/498 , H01L23/50 , H01L33/48 , H01L33/64
CPC分类号： H01L23/49861 , H01L23/3107 , H01L23/3675 , H01L23/4334 , H01L23/49503 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L24/48 , H01L2924/00014 , H01L2924/01014 , H01L2924/01322 , H01L2924/10253 , H01L2924/12044 , H01L2924/14 , H01L2924/181 , H01L2924/1815 , H01L33/486 , H01L33/642
摘要： An integrated circuit package (10) is formed to reveal the active circuitry (15) on the die surface. An integrated circuit die (12) is mounted on a die mounting portion (32) of a metal lead frame (30) in such a manner that the die is supported on the lead frame by the perimeter portion of the die. The active circuitry (15) on the die is connected to the various metal frame leads (33) by wire bonds (18) between the bond pads on the die and the metal lead frame. Plastic molding material (50) is then molded to encapsulate the wire bond pads (17), the perimeter of the integrated circuit die (16), the wire bonds (18), a portion of the leads (33), the perimeter portion of the back of the die (22), and the lead frame die mounting portion (32). The plastic material is formed so as to expose the active circuitry on the face of the die and a central portion on the back of the die.
摘要翻译：形成集成电路封装（10）以在模具表面上露出有源电路（15）。集成电路管芯（12）以这样的方式安装在金属引线框架（30）的管芯安装部分（32）上，使得管芯由管芯的周边部分支撑在引线框架上。裸片上的有源电路（15）通过芯片上的接合焊盘和金属引线框架之间的引线键合（18）连接到各种金属框架引线（33）。然后模塑塑料模制材料（50）以封装引线接合焊盘（17），集成电路管芯（16）的周边，引线接合（18），引线（33）的一部分，周边部分模具（22）的背面和引线框模具安装部分（32）。形成塑料材料以使裸片表面上的有源电路和芯片背面的中心部分露出。

10. 发明授权

US5535101A Leadless integrated circuit package 失效
标题翻译：无铅集成电路封装
公开(公告)号：US5535101A
公开(公告)日：1996-07-09
申请号：US970901
申请日：1992-11-03
申请人： Barry M. Miles , Frank J. Juskey , Kingshuk Banerji
发明人： Barry M. Miles , Frank J. Juskey , Kingshuk Banerji
IPC分类号： H01L21/56 , H01L23/13 , H01L23/31 , H05K7/10
CPC分类号： H01L23/13 , H01L21/563 , H01L23/3121 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01079 , H01L2924/01087 , H01L2924/15311
摘要： A semiconductor device package comprises an integrated circuit chip (10), a substrate (16), an encapsulant (30), and an organic coupling agent or underfill material (12) disposed between the integrated circuit chip and the first side of the substrate. The chip has a plurality of interconnection pads (14) disposed on an active surface of the chip at some minimum spacing "X." Each of the interconnect pads also has electrically conducting bumps (26) on them. The substrate has a circuit pattern (20) on a first side and an array of solder pads (23) spaced a certain distance apart on an opposite side of the substrate. The distance between these pads is greater than the minimum distance (X) between the interconnect pads on the IC. The circuit pattern is electrically connected to the array of solder pads by plated through holes (22). The length and width of the circuit carrying substrate is substantially greater than the length and width of the integrated circuit chip. The chip is mounted face down to the substrate with the electrically connecting bumps, such that at least some of the plated through holes in the substrate are covered by the chip. The polymeric encapsulant (30) covers the entire chip and substantially all of the first side of the substrate, providing a sealed package.
摘要翻译：半导体器件封装包括集成电路芯片（10），衬底（16），密封剂（30）以及设置在集成电路芯片和衬底的第一侧之间的有机耦合剂或底部填充材料（12）。芯片具有多个布置在芯片的有效表面上的互连焊盘（14），该互连焊盘以一定的最小间距“X” 每个互连焊盘在其上也具有导电凸块（26）。衬底在第一侧具有电路图案（20）和在衬底的相对侧上间隔一定距离的焊盘（23）阵列。这些焊盘之间的距离大于IC上的互连焊盘之间的最小距离（X）。电路图案通过电镀通孔（22）电连接到焊盘阵列。电路承载衬底的长度和宽度远大于集成电路芯片的长度和宽度。芯片通过电连接凸块面向下安装到基板上，使得基板中的至少一些电镀通孔被芯片覆盖。聚合物密封剂（30）覆盖基片的整个芯片和基本上所有的第一侧，提供密封的封装。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式