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1. 发明授权

US09646177B2 Systems and methods for preventing data remanence in memory systems 有权
公开(公告)号：US09646177B2
公开(公告)日：2017-05-09
申请号：US13098012
申请日：2011-04-29
申请人： Bruce B. Pedersen , Dirk A. Reese
发明人： Bruce B. Pedersen , Dirk A. Reese
IPC分类号： G06F7/38 , G06F21/79 , G06F21/76 , G11C7/20 , G11C11/419
CPC分类号： G06F21/79 , G06F21/76 , G11C7/20 , G11C11/419
摘要： Methods, circuits, and systems for preventing data remanence in memory systems are provided. Original data is stored in a first memory, which may be a static random access memory (SRAM). Data is additionally stored in a second memory. Data in the first memory is periodically inverted, preventing data remanence in the first memory. The data in the second memory is periodically inverted concurrently with the data in the first memory. The data in the second memory is used to keep track of the inversion state of the data in the first memory. The original data in the first memory can be reconstructed performing a logical exclusive-OR operation between the data in the first memory and the data in the second memory.

2. 发明申请

US20120275077A1 SYSTEMS AND METHODS FOR SECURING A PROGRAMMABLE DEVICE AGAINST AN OVER-VOLTAGE ATTACK 有权
标题翻译：用于安全防止过电压攻击的可编程器件的系统和方法
公开(公告)号：US20120275077A1
公开(公告)日：2012-11-01
申请号：US13097313
申请日：2011-04-29
申请人： Bruce B. Pedersen , Dirk A. Reese
发明人： Bruce B. Pedersen , Dirk A. Reese
IPC分类号： H02H9/04
CPC分类号： G11C7/24 , H03K19/17768
摘要： Systems and methods are disclosed for securing a programmable integrated circuit device against an over-voltage attack. Generally, programmable devices, such as FPGAs, contain volatile memory registers that may store sensitive information. To prevent tampering and/or reverse engineering of such a programmable device, an over-voltage detection circuit may be employed to disable the device and/or erase the sensitive information stored on the device when an over-voltage attack is suspected. In particular, once the over-voltage detection circuit detects that the voltage applied to the programmable device exceeds a trigger voltage, it may cause logic circuitry to erase the sensitive information stored on the device. Desirably, the over-voltage detection circuit includes components arranged in such a way as to render current consumption negligible when the voltage applied to the programmable device, e.g., by a battery, remains below the trigger voltage.
摘要翻译：公开了用于保护可编程集成电路装置免受过电压攻击的系统和方法。通常，可编程器件（如FPGA）包含可能存储敏感信息的易失性存储器寄存器。为了防止这种可编程设备的篡改和/或逆向工程，当怀疑有过电压攻击时，可以采用过电压检测电路来禁止该设备和/或擦除存储在设备上的敏感信息。特别地，一旦过电压检测电路检测到施加到可编程器件的电压超过触发电压，则可能导致逻辑电路擦除存储在器件上的敏感信息。期望地，过电压检测电路包括以下方式布置的组件，即当例如通过电池施加到可编程器件的电压保持低于触发电压时，电流消耗可以忽略不计。

3. 发明授权

US08605401B2 Systems and methods for securing a programmable device against an over-voltage attack 有权
标题翻译：用于保护可编程设备免受过电压攻击的系统和方法
公开(公告)号：US08605401B2
公开(公告)日：2013-12-10
申请号：US13097313
申请日：2011-04-29
申请人： Bruce B. Pedersen , Dirk A. Reese
发明人： Bruce B. Pedersen , Dirk A. Reese
IPC分类号： H02H3/20
CPC分类号： G11C7/24 , H03K19/17768
摘要： Systems and methods are disclosed for securing a programmable integrated circuit device against an over-voltage attack. Generally, programmable devices, such as FPGAs, contain volatile memory registers that may store sensitive information. To prevent tampering and/or reverse engineering of such a programmable device, an over-voltage detection circuit may be employed to disable the device and/or erase the sensitive information stored on the device when an over-voltage attack is suspected. In particular, once the over-voltage detection circuit detects that the voltage applied to the programmable device exceeds a trigger voltage, it may cause logic circuitry to erase the sensitive information stored on the device. Desirably, the over-voltage detection circuit includes components arranged in such a way as to render current consumption negligible when the voltage applied to the programmable device, e.g., by a battery, remains below the trigger voltage.
摘要翻译：公开了用于保护可编程集成电路装置免受过电压攻击的系统和方法。通常，可编程器件（如FPGA）包含可能存储敏感信息的易失性存储器寄存器。为了防止这种可编程设备的篡改和/或逆向工程，当怀疑有过电压攻击时，可以采用过电压检测电路来禁止该设备和/或擦除存储在设备上的敏感信息。特别地，一旦过电压检测电路检测到施加到可编程器件的电压超过触发电压，则可能导致逻辑电路擦除存储在器件上的敏感信息。期望地，过电压检测电路包括以下方式布置的组件，即当例如通过电池施加到可编程器件的电压保持低于触发电压时，电流消耗可以忽略不计。

4. 发明授权

US08581617B2 Systems and methods for providing user-initiated latch up to destroy SRAM data 有权
标题翻译：用于提供用户启动的闩锁以破坏SRAM数据的系统和方法
公开(公告)号：US08581617B2
公开(公告)日：2013-11-12
申请号：US13097787
申请日：2011-04-29
申请人： Dirk A. Reese , Bruce B. Pedersen
发明人： Dirk A. Reese , Bruce B. Pedersen
IPC分类号： H03K19/00
CPC分类号： G06F21/6209 , G06F21/76 , G06F2221/2143 , H03K19/1776 , H03K19/17768
摘要： Systems and methods are provided for destroying or erasing circuitry elements, data, or both, such as transistors, volatile keys, or fuse blocks, located in an integrated circuit device. An initiation signal may be provided to induce latch-up in a circuitry element in response to a user command, a tampering event, or both. As a result of the latch-up effect, the circuitry element, data, or both may be destroyed or erased.
摘要翻译：提供了系统和方法来破坏或擦除位于集成电路器件中的电路元件，数据或两者，例如晶体管，易失性密钥或熔丝块。可以提供启动信号以响应于用户命令，篡改事件或两者而在电路元件中诱发闩锁。作为闩锁效应的结果，电路元件，数据或两者可能被破坏或擦除。

5. 发明授权

US08461863B2 Method and apparatus for securing a programmable device using a kill switch 有权
公开(公告)号：US08461863B2
公开(公告)日：2013-06-11
申请号：US13097816
申请日：2011-04-29
申请人： Bruce B. Pedersen , Dirk A. Reese , Juju Joyce
发明人： Bruce B. Pedersen , Dirk A. Reese , Juju Joyce
IPC分类号： H03K19/00 , G06F11/30
CPC分类号： G06F21/76 , G06F21/554 , G06F21/75 , G06F2221/2143
摘要： A kill switch is provided that, when triggered, may cause the programmable logic device (PLD) to become at least partially reset, disabled, or both. The kill switch may be implemented as a fuse or a volatile battery-backed memory bit. When, for example, a security threat is detected, the switch may be blown, and a reconfiguration of the device initiated in order to zero or clear some or all of the memory and programmable logic of the PLD.

6. 发明申请

US20120274353A1 SYSTEMS AND METHODS FOR PREVENTING DATA REMANENCE IN MEMORY SYSTEMS 有权
标题翻译：用于防止记忆系统中的数据存在的系统和方法
公开(公告)号：US20120274353A1
公开(公告)日：2012-11-01
申请号：US13098012
申请日：2011-04-29
申请人： Bruce B. Pedersen , Dirk A. Reese
发明人： Bruce B. Pedersen , Dirk A. Reese
IPC分类号： H03K19/177 , G11C7/00 , G11C7/10
CPC分类号： G06F21/79 , G06F21/76 , G11C7/20 , G11C11/419
摘要： Methods, circuits, and systems for preventing data remanence in memory systems are provided. Original data is stored in a first memory, which may be a static random access memory (SRAM). Data is additionally stored in a second memory. Data in the first memory is periodically inverted, preventing data remanence in the first memory. The data in the second memory is periodically inverted concurrently with the data in the first memory. The data in the second memory is used to keep track of the inversion state of the data in the first memory. The original data in the first memory can be reconstructed performing a logical exclusive-OR operation between the data in the first memory and the data in the second memory.
摘要翻译：提供了用于防止存储器系统中的数据剩余的方法，电路和系统。原始数据存储在第一存储器中，其可以是静态随机存取存储器（SRAM）。数据另外存储在第二个存储器中。周期性地反转第一存储器中的数据，从而防止第一存储器中的数据剩余。第二存储器中的数据与第一存储器中的数据周期性地反转。第二存储器中的数据用于跟踪第一存储器中的数据的反转状态。第一存储器中的原始数据可被重构，执行第一存储器中的数据和第二存储器中的数据之间的逻辑异或运算。

7. 发明申请

US20120274351A1 METHOD AND APPARATUS FOR SECURING A PROGRAMMABLE DEVICE USING A KILL SWITCH 有权
标题翻译：用于使用杀死开关来保护可编程设备的方法和装置
公开(公告)号：US20120274351A1
公开(公告)日：2012-11-01
申请号：US13097816
申请日：2011-04-29
申请人： Bruce B. Pedersen , Dirk A. Reese , Juju Joyce
发明人： Bruce B. Pedersen , Dirk A. Reese , Juju Joyce
IPC分类号： H03K19/003
CPC分类号： G06F21/76 , G06F21/554 , G06F21/75 , G06F2221/2143
摘要： A kill switch is provided that, when triggered, may cause the programmable logic device (PLD) to become at least partially reset, disabled, or both. The kill switch may be implemented as a fuse or a volatile battery-backed memory bit. When, for example, a security threat is detected, the switch may be blown, and a reconfiguration of the device initiated in order to zero or clear some or all of the memory and programmable logic of the PLD.
摘要翻译：提供了一个触发开关，当被触发时，可以使可编程逻辑器件（PLD）至少部分地被复位，禁用或两者都被复位。杀死开关可以实现为保险丝或易失性电池备份的存储器位。当例如检测到安全威胁时，可能会断开交换机，并且启动设备的重新配置以便零或清除PLD的存储器和可编程逻辑的部分或全部。

8. 发明申请

US20120274350A1 SYSTEMS AND METHODS FOR PROVIDING USER-INITIATED LATCH UP TO DESTROY SRAM DATA 有权
标题翻译：用于提供用户启动的LATCH以降低SRAM数据的系统和方法
公开(公告)号：US20120274350A1
公开(公告)日：2012-11-01
申请号：US13097787
申请日：2011-04-29
申请人： Dirk A. Reese , Bruce B. Pedersen
发明人： Dirk A. Reese , Bruce B. Pedersen
IPC分类号： H03K19/00
CPC分类号： G06F21/6209 , G06F21/76 , G06F2221/2143 , H03K19/1776 , H03K19/17768
摘要： Systems and methods are provided for destroying or erasing circuitry elements, data, or both, such as transistors, volatile keys, or fuse blocks, located in an integrated circuit device. An initiation signal may be provided to induce latch-up in a circuitry element in response to a user command, a tampering event, or both. As a result of the latch-up effect, the circuitry element, data, or both may be destroyed or erased.
摘要翻译：提供了系统和方法来破坏或擦除位于集成电路器件中的电路元件，数据或两者，例如晶体管，易失性密钥或熔丝块。可以提供启动信号以响应于用户命令，篡改事件或两者而在电路元件中诱发闩锁。作为闩锁效应的结果，电路元件，数据或两者可能被破坏或擦除。

9. 发明授权

US08627105B2 Method and apparatus for securing programming data of a programmable device 有权
标题翻译：用于保护可编程设备的编程数据的方法和装置
公开(公告)号：US08627105B2
公开(公告)日：2014-01-07
申请号：US13097205
申请日：2011-04-29
申请人： Dirk A. Reese , JuJu Joyce
发明人： Dirk A. Reese , JuJu Joyce
IPC分类号： G06F21/00
CPC分类号： G06F21/76
摘要： Configuration data for a programmable integrated circuit device is at least partially encrypted according to at least one encryption scheme. A plurality of key stores store a plurality of decryption keys for the at least one encryption scheme. Control circuitry identifies a required key from the at least partially encrypted configuration data and generates a key selection signal. Key selection circuitry responsive to the key selection signal reads the plurality of key stores and provides the required key to the control circuitry. The control circuitry may include decryption circuitry that decrypts the at least partially encrypted configuration data using the required key. In some embodiments, different portions of the configuration data, which may represent separate partial reconfigurations of the device, require different decryption keys. Keys may be generated from combinations of the contents of the key stores.
摘要翻译：根据至少一种加密方案，可编程集成电路设备的配置数据至少部分地被加密。多个密钥存储器存储用于至少一个加密方案的多个解密密钥。控制电路从至少部分加密的配置数据中识别所需的密钥，并产生密钥选择信号。响应于键选择信号的键选择电路读取多个键存储并将所需的键提供给控制电路。控制电路可以包括使用所需密钥解密至少部分加密的配置数据的解密电路。在一些实施例中，可以表示设备的单独的部分重新配置的配置数据的不同部分需要不同的解密密钥。密钥可以从密钥存储的内容的组合生成。

10. 发明申请

US20130162290A1 PARTIAL RECONFIGURATION CIRCUITRY 有权
标题翻译：部分重构电路
公开(公告)号：US20130162290A1
公开(公告)日：2013-06-27
申请号：US13481506
申请日：2012-05-25
申请人： Balaji Margabandu , Dirk A. Reese , Leo Min Maung , Ninh D. Ngo
发明人： Balaji Margabandu , Dirk A. Reese , Leo Min Maung , Ninh D. Ngo
IPC分类号： H03K19/173
CPC分类号： H03K19/17756 , H03K19/1776
摘要： Integrated circuits may include partial reconfiguration (PR) circuitry for reconfiguring a portion of a memory array. The PR circuitry may include a host circuit, a control circuit, an address register, and first, second, and third data registers. The host circuit may send a series of PR instructions to the control circuit. The control circuit may include a decompression circuit for decompressing compressed instructions, a decryption circuit for decrypting encrypted instructions, an error checking circuit for detecting errors in the instructions, and a logic circuit. The address register may select a desired frame. The selected frame may be loaded into the third data register. The contents of the third data register may be shifted into the first data register. The contents of the first data register may be modified according to a desired logic function using the logic circuit, shifted into the second data register, and written into the selected frame.
摘要翻译：集成电路可以包括用于重新配置存储器阵列的一部分的部分重配置（PR）电路。 PR电路可以包括主机电路，控制电路，地址寄存器以及第一，第二和第三数据寄存器。主机电路可以向控制电路发送一系列PR指令。控制电路可以包括用于解压缩压缩指令的解压缩电路，用于解密加密指令的解密电路，用于检测指令中的错误的错误检查电路和逻辑电路。地址寄存器可以选择所需的帧。所选择的帧可以被加载到第三数据寄存器中。第三数据寄存器的内容可以被移位到第一数据寄存器中。可以使用移入第二数据寄存器的逻辑电路根据期望的逻辑功能修改第一数据寄存器的内容，并写入所选择的帧。

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