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1. 发明申请

US20060189096A1 Creation of high mobility channels in thin-body SOI devices 失效
公开(公告)号：US20060189096A1
公开(公告)日：2006-08-24
申请号：US11403974
申请日：2006-04-13
申请人： Brian Doyle , Brian Roberds
发明人： Brian Doyle , Brian Roberds
IPC分类号： H01L21/46
CPC分类号： H01L21/76254 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02532 , H01L21/02664
摘要： A method for fabricating a strained silicon film to a silicon on insulation (SOI) wafer. A layer of oxide is deposited onto a wafer that has a stack structure of a first base substrate, a layer of relaxed film=and a second layer of strained film. The SOI wafer has a stack structure of a second base substrate and a layer of oxidized film. The SOI wafer is attached to the wafer and is heated at a first temperature. This causes a silicon dioxide (SiO2) dangling bond to form on the second base substrate of the SOI wafer, transferring the strained film from one wafer to the other.

2. 发明申请

US20060205178A1 Creation of high mobility channels in thin-body SOI devices 有权
标题翻译：在薄体SOI器件中创建高迁移率通道
公开(公告)号：US20060205178A1
公开(公告)日：2006-09-14
申请号：US11429903
申请日：2006-05-08
申请人： Brian Doyle , Brian Roberds
发明人： Brian Doyle , Brian Roberds
IPC分类号： H01L21/46
CPC分类号： H01L21/76254 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02532 , H01L21/02664
摘要： A method for fabricating a strained silicon film to a silicon on insulation (SOI) wafer. A layer of oxide is deposited onto a wafer that has a stack structure of a first base substrate, a layer of relaxed film=and a second layer of strained film. The SOI wafer has a stack structure of a second base substrate and a layer of oxidized film. The SOI wafer is attached to the wafer and is heated at a first temperature. This causes a silicon dioxide (SiO2) dangling bond to form on the second base substrate of the SOI wafer, transferring the strained film from one wafer to the other.
摘要翻译：一种将应变硅膜制造到绝缘硅（SOI）晶片上的方法。一层氧化物沉积在具有第一基底，松弛膜层和第二层应变膜的堆叠结构的晶片上。 SOI晶片具有第二基底基板和氧化膜层的堆叠结构。 SOI晶片连接到晶片并在第一温度下被加热。这导致在SOI晶片的第二基底衬底上形成二氧化硅（SiO 2/2）悬挂键，将应变膜从一个晶片转移到另一个晶片。

3. 发明授权

US06638835B2 Method for bonding and debonding films using a high-temperature polymer 失效
标题翻译：使用高温聚合物粘结和剥离薄膜的方法
公开(公告)号：US06638835B2
公开(公告)日：2003-10-28
申请号：US10015107
申请日：2001-12-11
申请人： Brian Roberds , Cindy Colinge , Brian Doyle
发明人： Brian Roberds , Cindy Colinge , Brian Doyle
IPC分类号： H01L21461
CPC分类号： H01L21/76254 , Y10S438/977 , Y10T428/24355
摘要： The invention relates to a semiconductor structure that is formed by delaminating a semiconductor substrate and by bonding the top section of the substrate to a transfer substrate. Delaminating is carried out by causing a polymer film to achieve greater adhesion that an embrittlement layer in the semiconductor substrate.
摘要翻译：本发明涉及一种半导体结构，其通过使半导体衬底分层并将衬底的顶部部分粘合到转移衬底而形成。通过使聚合物膜实现在半导体衬底中的脆化层的更大的附着力来进行分层。

4. 发明授权

US06656822B2 Method for reduced capacitance interconnect system using gaseous implants into the ILD 失效
标题翻译：使用气体植入物进入ILD的电容互连系统的方法
公开(公告)号：US06656822B2
公开(公告)日：2003-12-02
申请号：US09344918
申请日：1999-06-28
申请人： Brian S. Doyle , Brian Roberds , Sandy S. Lee , Quat Vu
发明人： Brian S. Doyle , Brian Roberds , Sandy S. Lee , Quat Vu
IPC分类号： H01L21265
CPC分类号： H01L23/5329 , H01L21/31155 , H01L21/7682 , H01L21/76825 , H01L23/5222 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： A method of decreasing the dielectric constant of a dielectric layer. First, a dielectric layer is formed on a first conductive layer. A substance is then implanted into the dielectric layer.
摘要翻译：降低介电层的介电常数的方法。首先，在第一导电层上形成电介质层。然后将物质注入电介质层。

5. 发明授权

US06489655B2 Integrated circuit with dynamic threshold voltage 有权
标题翻译：具有动态阈值电压的集成电路
公开(公告)号：US06489655B2
公开(公告)日：2002-12-03
申请号：US09782540
申请日：2001-02-12
申请人： Brian S. Doyle , Brian Roberds , Rafael Rios
发明人： Brian S. Doyle , Brian Roberds , Rafael Rios
IPC分类号： H01L2701
CPC分类号： H01L29/78621 , H01L29/78606 , H01L29/78696
摘要： An integrated circuit and method for making it are described. The integrated circuit includes a first insulating layer formed on a substrate and a body strap of a first conductivity type that is formed on the first insulating layer. A second insulating layer is formed on the first insulating layer adjacent to the body strap and a film is formed on the second insulating layer. The integrated circuit also includes a gate electrode formed on the film. A plurality of doped regions of a second conductivity type are formed within the film that extend from the surface of the film to the surface of the second insulating layer. The doped regions have junctions that are each spaced from the body strap by at least about 500 angstroms.
摘要翻译：对集成电路及其制作方法进行说明。集成电路包括形成在基板上的第一绝缘层和形成在第一绝缘层上的第一导电类型的主体带。在与体带相邻的第一绝缘层上形成第二绝缘层，并且在第二绝缘层上形成膜。集成电路还包括形成在膜上的栅电极。在薄膜内形成多个第二导电类型的掺杂区，从薄膜的表面延伸到第二绝缘层的表面。掺杂区域具有与体带相隔至少约500埃的交点。

6. 发明授权

US06399973B1 Technique to produce isolated junctions by forming an insulation layer 有权
标题翻译：通过形成绝缘层来产生隔离结的技术
公开(公告)号：US06399973B1
公开(公告)日：2002-06-04
申请号：US09752335
申请日：2000-12-29
申请人： Brian Roberds
发明人： Brian Roberds
IPC分类号： H01L2976
CPC分类号： H01L29/66636 , H01L21/76264 , H01L21/76283 , H01L29/0653
摘要： A method for isolating a source and a drain in an MOS transistor by forming an insulation layer adjacent to the source and an insulation layer adjacent to the drain, and an apparatus produced from such a method.
摘要翻译：通过形成与源极相邻的绝缘层和与漏极相邻的绝缘层来分离MOS晶体管中的源极和漏极的方法以及由该方法制造的装置。

7. 发明申请

US20100174648A1 SECURE REAL-TIME BUSINESS PROCESSING SYSTEMS 审中-公开
标题翻译：安全实时业务处理系统
公开(公告)号：US20100174648A1
公开(公告)日：2010-07-08
申请号：US12254952
申请日：2008-10-21
申请人： Daniel W. Krantz , Shawn Wood , Tim Surface , Gerri Papillon , Brian Roberds
发明人： Daniel W. Krantz , Shawn Wood , Tim Surface , Gerri Papillon , Brian Roberds
IPC分类号： G06N5/02 , G06Q20/00 , G06Q10/00 , G06Q99/00
CPC分类号： G06Q10/06 , G06Q10/103 , G06Q20/40 , G06Q50/265
摘要： The present disclosure provides a dynamic business system comprising a business intelligence processing module; a dynamic rules module coupled to said business intelligence module; a dynamic collaboration engine coupled to said dynamic rules module and said business intelligence processing module; a data mining and expert knowledge module coupled to said interoperable system wherein said expert knowledge module can effect a portion of a data set to undergo real-time modification. The system data output and reporting is provided via a secure online method providing real-time interoperability among disconnected facilities. Additionally, the dynamic business system described provides dynamic and real-time decision making capabilities based on third party's available data set wherein data output and reporting is provided via a secure online method providing real-time interoperability among disconnected facilities.
摘要翻译：本公开提供了一种动态商业系统，其包括商业智能处理模块; 耦合到所述商业智能模块的动态规则模块; 耦合到所述动态规则模块和所述商业智能处理模块的动态协作引擎; 耦合到所述互操作系统的数据挖掘和专家知识模块，其中所述专家知识模块可以影响数据集的一部分以进行实时修改。系统数据输出和报告通过安全的在线方式提供，提供断开连接的设备之间的实时互操作性。此外，所描述的动态业务系统提供基于第三方可用数据集的动态和实时决策能力，其中数据输出和报告通过提供断开连接的设备之间的实时互操作性的安全在线方式来提供。

8. 发明授权

US06952040B2 Transistor structure and method of fabrication 失效
标题翻译：晶体管结构及其制造方法
公开(公告)号：US06952040B2
公开(公告)日：2005-10-04
申请号：US09895697
申请日：2001-06-29
申请人： Robert S. Chau , Jack Kavalieros , Anand Murthy , Brian Roberds , Brian S. Doyle
发明人： Robert S. Chau , Jack Kavalieros , Anand Murthy , Brian Roberds , Brian S. Doyle
IPC分类号： H01L21/3205 , H01L21/336 , H01L29/49 , H01L29/76 , H01L29/786 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L29/66772 , H01L29/41783 , H01L29/4908 , H01L29/495 , H01L29/4966 , H01L29/4975 , H01L29/665 , H01L29/66628 , H01L29/78654 , Y10S977/70 , Y10S977/721 , Y10S977/936
摘要： A novel transistor structure and its method of fabrication. According to the present invention, the transistor includes an intrinsic silicon body having a first surface. A gate dielectric is formed on the first surface of the intrinsic silicon body. A gate electrode is formed on the gate dielectric wherein the gate electrode comprises a mid-gap work function film on the gate dielectric. A pair of source/drain regions are formed on opposite sides of the intrinsic silicon body.
摘要翻译：一种新颖的晶体管结构及其制造方法。根据本发明，晶体管包括具有第一表面的本征硅体。在本征硅体的第一表面上形成栅极电介质。栅极电极形成在栅极电介质上，其中栅电极在栅极电介质上包括中间间隙功函数膜。一对源极/漏极区域形成在本征硅体的相对侧上。

9. 发明授权

US06873013B2 Silicon-on-insulator structure and method of reducing backside drain-induced barrier lowering 失效
标题翻译：绝缘体上的结构和减少背面漏极引起的屏障降低的方法
公开(公告)号：US06873013B2
公开(公告)日：2005-03-29
申请号：US10396950
申请日：2003-03-24
申请人： Brian Roberds , Doulgas W. Barlage
发明人： Brian Roberds , Doulgas W. Barlage
IPC分类号： H01L21/336 , H01L29/45 , H01L29/49 , H01L29/786 , H01L27/01
CPC分类号： H01L29/66772 , H01L29/458 , H01L29/4908 , H01L29/78609 , H01L29/78639
摘要： The invention relates to a transistor that includes a semiconductive layer on an insulator layer. Below the insulator layer is a substrate and a contact is disposed in the insulator layer that originates at the substrate and terminates in the insulator layer. The contact is aligned below the transistor junction. The invention also relates to a process flow that is used to fabricate the transistor. The process flow includes forming the contact by either a spacer etch or a directional, angular etch.
摘要翻译：本发明涉及一种在绝缘体层上包括半导体层的晶体管。在绝缘体层的下面是基板，并且在绝缘体层中设置接触件，该绝缘体层起始于基板并终止在绝缘体层中。触点对准在晶体管结下方。本发明还涉及用于制造晶体管的工艺流程。工艺流程包括通过间隔物蚀刻或定向角蚀刻形成接触。

10. 发明授权

US06281532B1 Technique to obtain increased channel mobilities in NMOS transistors by gate electrode engineering 有权
标题翻译：通过栅极电极工程获得NMOS晶体管中增加的沟道迁移率的技术
公开(公告)号：US06281532B1
公开(公告)日：2001-08-28
申请号：US09340954
申请日：1999-06-28
申请人： Brian S. Doyle , Brian Roberds , Jin Lee
发明人： Brian S. Doyle , Brian Roberds , Jin Lee
IPC分类号： H01L2976
CPC分类号： H01L29/7845 , H01L21/26506 , H01L21/28026 , H01L29/0649 , H01L29/0653 , H01L29/7842
摘要： A method of modifying the mobility of a transistor. First, a transistor having a gate is formed. A substance is then implanted in the gate. The transistor is annealed such that the implanted substance forms at least one void in the transistor's gate.
摘要翻译：修改晶体管的迁移率的方法。首先，形成具有栅极的晶体管。然后将物质植入门。晶体管退火，使得注入的物质在晶体管的栅极中形成至少一个空隙。

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