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1. 发明授权

US5528755A Invalid data detection, recording and nullification 失效
标题翻译：无效的数据检测，记录和无效
公开(公告)号：US5528755A
公开(公告)日：1996-06-18
申请号：US995092
申请日：1992-12-22
申请人： Brent C. Beardsley , Michael T. Benhase , Susan K. Candelaria , Joel H. Cord , Michael H. Hartung , Bruce M. Henry , Paul Hodges , Paul L. Leung , Robert W. Shomler
发明人： Brent C. Beardsley , Michael T. Benhase , Susan K. Candelaria , Joel H. Cord , Michael H. Hartung , Bruce M. Henry , Paul Hodges , Paul L. Leung , Robert W. Shomler
IPC分类号： G06F11/00 , G11C29/00 , G06F11/34 , G06F7/06
CPC分类号： G11C29/88 , G06F11/004
摘要： Often in DASD subsystems, circumstances can occur which prevent the full transfer of the required data from channel to subsystem during a write operation. The disclosed methods prevents this data from later being read and treated as valid data by the host processor. This is achieved by marking data as invalid within the storage subsystem once it is determined that a channel error has occured. Subsequently, upon reading that data, the host processor can be made aware of the data invalidity and treat the data accordingly. In a second embodiment, invalid data is discarded rather than stored over the previous valid version of the data, before it is ever stored on DASD.
摘要翻译：通常在DASD子系统中，可能会发生这种情况，从而阻止在写入操作期间将所需数据从通道全部传输到子系统。所公开的方法防止该数据稍后被主机处理器读取并被视为有效数据。一旦确定出现通道错误，就可以在存储子系统内将数据标记为无效来实现。随后，在读取该数据时，可以使主机处理器知道数据无效并相应地处理数据。在第二实施例中，在将数据存储在DASD之前，无效数据被丢弃而不是先于数据的有效版本存储。

2. 发明授权

US5146576A Managing high speed slow access channel to slow speed cyclic system data transfer 失效
标题翻译：管理高速慢通道到慢速循环系统数据传输
公开(公告)号：US5146576A
公开(公告)日：1992-09-08
申请号：US575748
申请日：1990-08-31
申请人： Brent C. Beardsley , Michael T. Benhase , Susan K. Candelaria
发明人： Brent C. Beardsley , Michael T. Benhase , Susan K. Candelaria
IPC分类号： G06F3/06 , G06F12/08
CPC分类号： G06F12/0866
摘要： A cached DASD controller is illustrated which is attached to a high speed serial channel, such as an optical fiber channel. The data rate of the serial channel is much greater than the data rate of a DASD connected to the controller. The serial channel has a relatively long propagation time such that synchronous operations between the host processor 10 and the DASD cannot be efficiently performed. Operation of a data transfer, whether read or write between the host processor 10 and the DASD is monitored. Whenever reading a copy of the track contents stored in cache or the DASD reaches either an index mark, a break point from a roll mode operation or certain write operations occur resulting in predetermined data being stored in cache, then a GOCACHE flag is set in a control portion of the controller. The device operations are then momentarily idled while cache to host processor data transfer operations are enabled.

3. 发明授权

US5530829A Track and record mode caching scheme for a storage system employing a scatter index table with pointer and a track directory 失效
标题翻译：使用具有指针和轨道目录的分散索引表的存储系统的跟踪和记录模式高速缓存方案
公开(公告)号：US5530829A
公开(公告)日：1996-06-25
申请号：US993249
申请日：1992-12-17
申请人： Brent C. Beardsley , Susan K. Candelaria , Vern J. Legvold , Peter L. Leung , Douglas A. Martin , Gail A. Spear
发明人： Brent C. Beardsley , Susan K. Candelaria , Vern J. Legvold , Peter L. Leung , Douglas A. Martin , Gail A. Spear
IPC分类号： G06F12/08
CPC分类号： G06F12/0866
摘要： A system and technique for storing data in a cache memory in record format and in track format. Space is allocated in cache memory for the storage of data in track format. Additional space is allocated for the storage of data in record format. Data is stored in both formats. The most current data is identified and addresses are generated for each record of data. Access to individual records of data is facilitated through a track information block in which pointers are stored for the most current records whether stored in track format or record format. The track information block facilitates a rapid storage and retrieval of data in either format. In a specific implementation, data is stored in either format in cache using a scatter index table. The scatter index table and associated track directory entries are stored in a shared control array. Each track directory entry points to a track slot header in a cache. The track slot header points to an area (segment) in the cache memory in which selected data resides. The track slot header also points to a track information block associated with the selected segment. The track information block identifies the location selected records in the segment in track format or record format.
摘要翻译：一种以记录格式和轨道格式将数据存储在高速缓冲存储器中的系统和技术。空间被分配在高速缓冲存储器中用于以轨道格式存储数据。分配用于以记录格式存储数据的附加空间。数据以两种格式存储。识别最新的数据，并为每个数据记录生成地址。通过轨道信息块可以访问数据的单独记录，其中存储指针用于最新的记录，无论是以轨道格式还是以记录格式存储。轨道信息块有助于以任一格式快速存储和检索数据。在具体实现中，使用散列索引表将数据以任一格式存储在高速缓存中。分散索引表和关联的轨道目录条目存储在共享控制数组中。每个轨道目录条目指向高速缓存中的轨道槽头。轨道槽头指向所选数据所在的高速缓冲存储器中的区域（段）。轨道槽头还指向与所选择的段相关联的轨道信息块。轨道信息块以轨道格式或记录格式识别段中所选择的记录的位置。

4. 发明授权

US5426761A Cache DASD sequential staging and method 失效
标题翻译：缓存DASD顺序分段和方法
公开(公告)号：US5426761A
公开(公告)日：1995-06-20
申请号：US995276
申请日：1992-12-22
申请人： Joel H. Cord , Susan K. Candelaria , Joseph S. Hyde , Larry R. Perry
发明人： Joel H. Cord , Susan K. Candelaria , Joseph S. Hyde , Larry R. Perry
IPC分类号： G06F12/08 , G06F12/12 , G06F13/12 , G06F13/16 , G06F13/00
CPC分类号： G06F12/0862 , G06F12/0866
摘要： A system for prestaging data into a cache to increase the speed data is received from a direct access storage drive (DASD) is utilized within a data processing system. This system utilizes multi-track read operations to prestage tracks into the cache. In so doing, the overhead associated with proceeding from one track to the next is reduced. The system allows for the prestaging of up to a cylinder of tracks per prestage. The prestaging system will also allow internally scheduled operations requiring a physical device to interrupt the prestaging if conditions require this action to maintain subsystem performance.
摘要翻译：在数据处理系统中利用用于从数据处理系统中直接访问存储驱动器（DASD）接收用于将数据预先存储到高速缓存中以增加速度数据的系统。该系统利用多轨读取操作将高速缓存中的轨道预先加载到高速缓存中。在这样做时，与从一个轨道到下一个轨道进行相关联的开销减少了。该系统允许每个前置放大器至多一个磁道柱。如果条件需要此操作来维护子系统性能，则前置系统还将允许需要物理设备的内部调度操作中断前置处理。

5. 发明授权

US5437022A Storage controller having additional cache memory and a means for recovering from failure and reconfiguring a control unit thereof in response thereto 失效
标题翻译：具有附加高速缓存存储器的存储控制器和用于从故障恢复并重新配置其响应于其的控制单元的装置
公开(公告)号：US5437022A
公开(公告)日：1995-07-25
申请号：US993248
申请日：1992-12-17
申请人： Brent C. Beardsley , Susan K. Candelaria , Bradley S. Powers , Mark A. Reid
发明人： Brent C. Beardsley , Susan K. Candelaria , Bradley S. Powers , Mark A. Reid
IPC分类号： G06F12/08 , G06F11/20 , G06F12/16
CPC分类号： G06F11/1666 , G06F11/20 , G06F11/2089
摘要： A storage controller having additional cache memory and a system for recovering from failure and reconfiguring a control unit thereof in response thereto. The inventive controller includes a first cluster for directing data from a host computer to a storage device and a second cluster for directing data from a host computer to a storage device. A first cache memory is connected to the first cluster and a second cache memory is connected to the second cluster. A first nonvolatile memory is connected to the second cluster and a second nonvolatile memory is connected to the first cluster. Data is directed to the first cache and backed up to the first nonvolatile memory. The second cache is similarly backed up by the second nonvolatile memory. In the event of failure of the first cache memory, data is directed to the second cache and backed up in the second nonvolatile memory.
摘要翻译：具有附加高速缓冲存储器的存储控制器和用于从故障中恢复并重新配置其控制单元的系统。本发明的控制器包括用于将数据从主机引导到存储设备的第一集群和用于将数据从主机引导到存储设备的第二集群。第一高速缓存存储器连接到第一集群，并且第二高速缓存存储器连接到第二集群。第一非易失性存储器连接到第二集群，并且第二非易失性存储器连接到第一集群。数据被引导到第一缓存并被备份到第一非易失性存储器。第二高速缓存类似地由第二非易失性存储器备份。在第一高速缓冲存储器发生故障的情况下，数据被引导到第二高速缓存并备份在第二非易失性存储器中。

6. 发明授权

US08683130B2 Fabricating key fields 失效
标题翻译：制作关键字段
公开(公告)号：US08683130B2
公开(公告)日：2014-03-25
申请号：US13082288
申请日：2011-04-07
申请人： Michael T. Benhase , Susan K. Candelaria , Chung M. Fung , Lokesh M. Gupta , Joseph S. Hyde, II , Matthew J. Kalos , Beth A. Peterson , Donald P. Terry
发明人： Michael T. Benhase , Susan K. Candelaria , Chung M. Fung , Lokesh M. Gupta , Joseph S. Hyde, II , Matthew J. Kalos , Beth A. Peterson , Donald P. Terry
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F11/1004 , G06F3/0619 , G06F3/0661 , G06F3/0689
摘要： Exemplary methods, computer systems, and computer program products for fabricating key fields by a processor device in a computer environment are provided. In one embodiment, the computer environment is configured for, as an alternative to reading Count-Key-Data (CKD) data in order to change the key field, providing a hint to fabricate a new key field, thereby overwriting a previous key field and updating the CKD data.
摘要翻译：提供了用于在计算机环境中由处理器装置制造关键字段的示例性方法，计算机系统和计算机程序产品。在一个实施例中，计算机环境被配置为作为读取计数密钥数据（CKD）数据以便改变密钥字段的替代方案，提供制造新密钥字段的暗示，从而覆盖先前的密钥字段，并且更新CKD数据。

7. 发明申请

US20120117196A1 SYSTEMS, METHODS, AND COMPUTER PROGRAM PRODUCTS FOR TRANSFERRING RESERVES WHEN MOVING VIRTUAL MACHINES ACROSS SYSTEMS 有权
标题翻译：系统，方法和计算机程序产品用于在跨越系统移动虚拟机时传输存储
公开(公告)号：US20120117196A1
公开(公告)日：2012-05-10
申请号：US12943874
申请日：2010-11-10
申请人： Susan K. Candelaria , Mark P. Gardiner , Clint A. Hardy , Matthew J. Kalos , William R. White , Stephen G. Wilkins , Hany M. Yudenfriend
发明人： Susan K. Candelaria , Mark P. Gardiner , Clint A. Hardy , Matthew J. Kalos , William R. White , Stephen G. Wilkins , Hany M. Yudenfriend
IPC分类号： G06F15/16
CPC分类号： G06F17/30233
摘要： According to one embodiment, a host system includes logic adapted for receiving device information from a source system, logic adapted for building a virtual device based at least in part on the received device information, logic adapted for transferring a reserve of a storage device to the host system and/or receiving results of transferring the reserve to the host system, logic adapted for determining if the reserve is held by the host system, logic adapted for recording the reserve if the reserve is held by the host system, and logic adapted for sending a notification that the reserve is not held by the host system if the reserve is not held by the host system. Other methods, systems, and computer program products are also described according to various embodiments.
摘要翻译：根据一个实施例，主机系统包括适于从源系统接收设备信息的逻辑，适于至少部分地基于所接收的设备信息构建虚拟设备的逻辑，适于将存储设备的预留传送到主机系统和/或接收将主备系统的保留转移的结果，适用于确定该主机系统是否保留该保留的逻辑，适用于如果该主机系统保留该保留的记录保留的逻辑，以及适于如果主机系统没有保留该保留，则发送主机系统不保留该保留的通知。根据各种实施例还描述了其它方法，系统和计算机程序产品。

8. 发明授权

US08549185B2 Facilitating transport mode input/output operations between a channel subsystem and input/output devices 有权
标题翻译：促进通道子系统和输入/输出设备之间的传输模式输入/输出操作
公开(公告)号：US08549185B2
公开(公告)日：2013-10-01
申请号：US13173725
申请日：2011-06-30
申请人： Susan K. Candelaria , Scott M. Carlson , Daniel F. Casper , John R. Flanagan , Roger G. Hathorn , Matthew J. Kalos , Louis W. Ricci , Dale F. Riedy , Cynthia Sittmann
发明人： Susan K. Candelaria , Scott M. Carlson , Daniel F. Casper , John R. Flanagan , Roger G. Hathorn , Matthew J. Kalos , Louis W. Ricci , Dale F. Riedy , Gustav E. Sittmann, III
IPC分类号： G06F3/00 , G06F13/28 , G06F7/38 , G06F15/16
CPC分类号： G06F13/42
摘要： A computer program product is provided for performing an input/output (I/O) processing operation at a host computer system. The computer program product is configured to perform: obtaining a transport command word (TCW) at a channel subsystem for an I/O operation, the TCW including an address of a transport command control block (TCCB) having a transport command area (TCA) configured to hold a first plurality of device command words (DCW) and control data associated with respective DCWs, the first plurality of DCWs including a transfer TCA extension (TTE) DCW that specifies a TCA extension, the TCA extension configured to hold one or more DCWs and control data associated with respective DCWs; gathering the TCCB from one or more locations specified in the TCCB address and transferring the TCCB to the control unit; gathering the TCA extension specified by the TTE DCW; and transferring the TCA extension to the control unit.
摘要翻译：提供了一种计算机程序产品，用于在主计算机系统上执行输入/输出（I / O）处理操作。所述计算机程序产品被配置为执行：在用于I / O操作的信道子系统处获得传输命令字（TCW），所述TCW包括具有传输命令区域（TCA）的传输命令控制块（TCCB）的地址，被配置为保持第一多个设备命令字（DCW）和与相应DCW相关联的控制数据，所述第一多个DCW包括指定TCA扩展的传输TCA扩展（TTE）DCW，所述TCA扩展被配置为保存一个或多个 DCW和与相应DCW相关联的控制数据; 从TCCB地址中指定的一个或多个位置收集TCCB，并将TCCB传送到控制单元; 收集TTE DCW指定的TCA扩展; 并将TCA扩展传输到控制单元。

9. 发明授权

US08473641B2 Facilitating transport mode input/output operations between a channel subsystem and input/output devices 有权
标题翻译：促进通道子系统和输入/输出设备之间的传输模式输入/输出操作
公开(公告)号：US08473641B2
公开(公告)日：2013-06-25
申请号：US13173754
申请日：2011-06-30
申请人： Susan K. Candelaria , Scott M. Carlson , Daniel F. Casper , John R. Flanagan , Roger G. Hathorn , Matthew J. Kalos , Louis W. Ricci , Dale F. Riedy , Harry M. Yudenfriend
发明人： Susan K. Candelaria , Scott M. Carlson , Daniel F. Casper , John R. Flanagan , Roger G. Hathorn , Matthew J. Kalos , Louis W. Ricci , Dale F. Riedy , Harry M. Yudenfriend
IPC分类号： G06F3/00 , G06F13/00
CPC分类号： G06F3/0659 , G06F3/061 , G06F3/0683 , G06F13/42
摘要： A computer program product is configured for performing a method including: generating at least one command message by a channel subsystem of the host computer system, the at least one command message including one or more device command words (DCWs), wherein at least one DCW of the one or more DCWs includes a suppress-length indication (SLI) configured to instruct a control unit to continue to perform the I/O operation in response to the control unit detecting that the data count does not match an amount of data required; receiving an incorrect length (IL) value, the IL value being a first IL value in response to the SLI being a first SLI value and the data count not matching the amount of data required; and responsive to receiving the IL value from the control unit, storing an IL indicator in a subchannel-status word.
摘要翻译：计算机程序产品被配置用于执行一种方法，包括：通过主计算机系统的信道子系统生成至少一个命令消息，所述至少一个命令消息包括一个或多个设备命令字（DCW），其中至少一个DCW 所述一个或多个DCW包括抑制长度指示（SLI），其被配置为指示控制单元响应于所述控制单元检测到所述数据计数与所需数据量不匹配而继续执行所述I / O操作; 接收到不正确的长度（IL）值，IL值是响应于SLI是第一SLI值并且数据计数不匹配所需数据量的第一IL值; 并且响应于从所述控制单元接收到IL值，将IL指示符存储在子信道状态字中。

10. 发明申请

US20130007300A1 FACILITATING TRANSPORT MODE INPUT/OUTPUT OPERATIONS BETWEEN A CHANNEL SUBSYSTEM AND INPUT/OUTPUT DEVICES 有权
标题翻译：促进通道子系统和输入/输出设备之间的运输模式输入/输出操作
公开(公告)号：US20130007300A1
公开(公告)日：2013-01-03
申请号：US13173754
申请日：2011-06-30
申请人： Susan K. Candelaria , Scott M. Carlson , Daniel F. Casper , John R. Flanagan , Roger G. Hathorn , Matthew J. Kalos , Louis W. Ricci , Dale F. Riedy , Harry M. Yudenfriend
发明人： Susan K. Candelaria , Scott M. Carlson , Daniel F. Casper , John R. Flanagan , Roger G. Hathorn , Matthew J. Kalos , Louis W. Ricci , Dale F. Riedy , Harry M. Yudenfriend
IPC分类号： G06F3/00
CPC分类号： G06F3/0659 , G06F3/061 , G06F3/0683 , G06F13/42
摘要： A computer program product is configured for performing a method including: generating at least one command message by a channel subsystem of the host computer system, the at least one command message including one or more device command words (DCWs), wherein at least one DCW of the one or more DCWs includes a suppress-length indication (SLI) configured to instruct a control unit to continue to perform the I/O operation in response to the control unit detecting that the data count does not match an amount of data required; receiving an incorrect length (IL) value, the IL value being a first IL value in response to the SLI being a first SLI value and the data count not matching the amount of data required; and responsive to receiving the IL value from the control unit, storing an IL indicator in a subchannel-status word.
摘要翻译：计算机程序产品被配置用于执行一种方法，包括：通过主计算机系统的信道子系统生成至少一个命令消息，所述至少一个命令消息包括一个或多个设备命令字（DCW），其中至少一个DCW 所述一个或多个DCW包括抑制长度指示（SLI），其被配置为指示控制单元响应于所述控制单元检测到所述数据计数与所需数据量不匹配而继续执行所述I / O操作; 接收到不正确的长度（IL）值，IL值是响应于SLI是第一SLI值并且数据计数不匹配所需数据量的第一IL值; 并且响应于从所述控制单元接收到IL值，将IL指示符存储在子信道状态字中。

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