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1. 发明授权

US07962656B1 Command encoding of data to enable high-level functions in computer networks 有权
标题翻译：命令编码数据，以实现计算机网络中的高级功能
公开(公告)号：US07962656B1
公开(公告)日：2011-06-14
申请号：US11324518
申请日：2006-01-03
申请人： Boon Seong Ang , Michael Steven Schlansker , Robert Samuel Schreiber , Jean-Francois Collard , Norman Paul Jouppi
发明人： Boon Seong Ang , Michael Steven Schlansker , Robert Samuel Schreiber , Jean-Francois Collard , Norman Paul Jouppi
IPC分类号： G06F15/16
CPC分类号： G06F15/17356 , H04L69/12
摘要： Methods and systems for communicating between network interface controllers (NICs) in networked systems are described. Enhanced command functionality for NICs include the ability to perform sequences of operations and/or conditional operations. Messages can be used to communicate embedded commands which are interpreted by NICs to enhance their functionality.
摘要翻译：描述了网络系统中网络接口控制器（NIC）之间进行通信的方法和系统。 NIC的增强的命令功能包括执行操作和/或条件操作的功能。消息可用于传达NIC解释的嵌入式命令，以增强其功能。

2. 发明授权

US07912998B2 DMA access systems and methods 有权
标题翻译： DMA访问系统和方法
公开(公告)号：US07912998B2
公开(公告)日：2011-03-22
申请号：US11326918
申请日：2006-01-06
申请人： Michael Steven Schlansker , Erwin Oertli , Jean-Francois Collard
发明人： Michael Steven Schlansker , Erwin Oertli , Jean-Francois Collard
IPC分类号： G06F13/00
CPC分类号： G06F13/28
摘要： Methods and systems for performing direct memory access (DMA) transfers are described. An invalidate queue (or other storage device) contains an entry associated with a DMA transfer in progress. If the invalidate queue detects an invalidation of a memory page associated with that entry, then it is marked invalid. If the entry is marked invalid during the DMA transfer, then that DMA transfer is aborted. This enables, among other things, DMA transfers to unpinned virtual memory.
摘要翻译：描述了用于执行直接存储器访问（DMA）传输的方法和系统。无效队列（或其他存储设备）包含与正在进行的DMA传输相关联的条目。如果无效队列检测到与该条目相关联的内存页的无效，则将其标记为无效。如果该条目在DMA传输期间被标记为无效，则该DMA传输将被中止。除此之外，这样可以将DMA传输到未固定的虚拟内存。

3. 发明授权

US07650471B2 Head of queue cache for communication interfaces 有权
标题翻译：通讯接口队列缓存头
公开(公告)号：US07650471B2
公开(公告)日：2010-01-19
申请号：US11326919
申请日：2006-01-06
申请人： Michael Steven Schlansker , Erwin Oertli , Jean-Francois Collard
发明人： Michael Steven Schlansker , Erwin Oertli , Jean-Francois Collard
IPC分类号： G06F12/10
CPC分类号： G06F12/0831 , G06F12/0862 , G06F12/0893
摘要： A technique includes identifying an address of a head end of a queue and monitoring a coherent interconnect to identify a data transfer that is communicated by a producer, which targets the address. The technique includes storing the data of the data transfer in the queue and selectively storing at least a portion of the data in a head-of-queue cache memory based at least in part on whether the monitoring identifies the address. At least a portion of the data is selectively retrieved from the head-of-queue cache memory instead of from the queue for transmission to a consumer.
摘要翻译：一种技术包括识别队列的头端的地址并监视相干互连以识别由生产者传送的数据传输，该生产者以该地址为目标。该技术包括将数据传输的数据存储在队列中并且至少部分地基于监视是否识别地址来选择性地将至少一部分数据存储在队列头部高速缓冲存储器中。从队列高速缓冲存储器而不是从队列中选择性地检索至少一部分数据以传送给消费者。

4. 发明授权

US08364874B1 Prioritized polling for virtual network interfaces 有权
标题翻译：虚拟网络接口的优先轮询
公开(公告)号：US08364874B1
公开(公告)日：2013-01-29
申请号：US11332956
申请日：2006-01-17
申请人： Michael Steven Schlansker , Jean-Francois Collard , Rajendra Kumar
发明人： Michael Steven Schlansker , Jean-Francois Collard , Rajendra Kumar
IPC分类号： G06F13/00 , G06F13/36
CPC分类号： G06F9/5027 , G06F2209/5021
摘要： Methods and systems for prioritizing virtual network interface controllers (VNICs) are described. Each VNIC is assigned a priority level and a maximum current priority level associated with VNICs which are requesting service is determined. Fairness is enforced by using a round robin approach to selection among those currently requesting VNICs which have the same, maximum current priority level.
摘要翻译：描述了用于优先化虚拟网络接口控制器（VNIC）的方法和系统。每个VNIC被分配优先级，并且确定与请求服务的VNIC相关联的最大当前优先级。通过使用循环方法在当前请求具有相同的最大当前优先级的VNIC之间进行选择来实施公平。

5. 发明授权

US07024538B2 Processor multiple function units executing cycle specifying variable length instruction block and using common target block address updated pointers 有权
标题翻译：处理器多功能单元执行周期指定可变长度指令块并使用通用目标块地址更新指针
公开(公告)号：US07024538B2
公开(公告)日：2006-04-04
申请号：US10032177
申请日：2001-12-21
申请人： Michael Steven Schlansker
发明人： Michael Steven Schlansker
IPC分类号： G06F9/40
CPC分类号： G06F9/321 , G06F9/3853 , G06F9/3885
摘要： A multiprocessor data processing system for executing a program having branch instructions therein, each branch instruction specifying a target address in the program defining an instruction that is to be executed if that branch instruction causes the program to branch. The data processing system includes a plurality of processing sections having a function unit, a local memory, and a pointer. The local memory stores instruction sequences from the program that is to be executed by the function unit in that processing section. The pointer contains a value defining the next instruction in the local memory to be executed by the function unit. Each function unit executes instructions according to machine cycles, each function unit executing one instruction per machine cycle. The pointers in each of the processing sections are reset to a new value determined by the target address of one of the branch instructions when a function unit branches in response to that branch instruction.
摘要翻译：一种用于执行其中具有分支指令的程序的多处理器数据处理系统，每个分支指令在所述程序中指定所述程序中的目标地址，所述程序定义如果所述分支指令导致所述程序分支则要执行的指令。数据处理系统包括具有功能单元，本地存储器和指针的多个处理部分。本地存储器存储要由该处理部分中的功能单元执行的程序的指令序列。该指针包含定义要由功能单元执行的本地存储器中的下一个指令的值。每个功能单元根据机器周期执行指令，每个功能单元每个机器周期执行一个指令。当功能单元响应于该分支指令而分支时，每个处理部分中的指针被重置为由一个分支指令的目标地址确定的新值。

6. 发明授权

US06766445B2 Storage system for use in custom loop accelerators and the like 有权
标题翻译：用于定制循环加速器等的存储系统
公开(公告)号：US06766445B2
公开(公告)日：2004-07-20
申请号：US09816851
申请日：2001-03-23
申请人： Michael Steven Schlansker , Vinod Kumar Kathail , Shail Aditya Gupta
发明人： Michael Steven Schlansker , Vinod Kumar Kathail , Shail Aditya Gupta
IPC分类号： G06F940
CPC分类号： G06F9/3885 , G06F9/3001 , G06F9/30134 , G06F9/325
摘要： A computational unit for use in loop computations. The computational unit includes a function unit, a plurality of phase lines, and a storage register. The computational unit is programmed to initiate one iteration of the loop every II cycles. Each function unit has a result output for outputting one computational result each cycle. There is one phase line corresponding to each of the II cycles. The storage register includes a linear connected array of shift cells having a first shift cell. Each shift cell has an input port, an output port, a shift control port, and an OR gate. Each shift cell receives the value to be stored in the shift cell on the input port, the stored value being stored in response to a control signal on the shift control port. The OR gate has an output connected to the shift enable port and one input for each cycle on which that shift cell is to receive the control signal, that input being connected to the phase line corresponding to that cycle. The input port of the first shift cell is connected to the result output. A plurality of such computational units can be connected together to form a loop accelerator. The accelerator includes a cross-connect circuit for coupling at least one shift cell output of one of the computational units to an input of a function unit of another of the computational units on a selected one of the II cycles.
摘要翻译：用于循环计算的计算单元。计算单元包括功能单元，多个相位线以及存储寄存器。计算单元被编程为每二个周期启动循环的一次迭代。每个功能单元具有用于每个周期输出一个计算结果的结果输出。存在对应于每个II周期的一相线。存储寄存器包括具有第一移位单元的移位单元的线性连接阵列。每个移位单元具有输入端口，输出端口，移位控制端口和或门。每个移位单元接收要存储在输入端口上的移位单元中的值，响应于移位控制端口上的控制信号存储存储的值。或门具有连接到移位使能端口的输出端和用于接收控制信号的移位单元的每个周期的一个输入，该输入端连接到与该周期对应的相位线。第一移位单元的输入端口连接到结果输出。多个这样的计算单元可以连接在一起以形成环路加速器。加速器包括交叉连接电路，用于将所述计算单元中的一个的至少一个移位单元输出耦合到所述II个周期中的所选择的一个计算单元的功能单元的输入。

7. 发明申请

US20130272651A1 ROUTING OPTICAL SIGNALS 审中-公开
标题翻译：路由光信号
公开(公告)号：US20130272651A1
公开(公告)日：2013-10-17
申请号：US13444631
申请日：2012-04-11
申请人： Terrel Morris , Michael Steven Schlansker , Michael Renne Ty Tan , Shih-Yuan Wang
发明人： Terrel Morris , Michael Steven Schlansker , Michael Renne Ty Tan , Shih-Yuan Wang
IPC分类号： G02B6/26
CPC分类号： G02B6/3556 , G02B6/3514 , G02B6/3596 , G02B6/3598
摘要： Systems, methods, and apparatus to route optical signals are disclosed. An example apparatus to route optical signals includes a plurality of hollow metal waveguide optical switch arrays, the arrays being stacked, each of the arrays including: a first number of optical input ports; and a second number of optical output ports different than the first number of input ports.
摘要翻译：公开了路由光信号的系统，方法和装置。路由光信号的示例性设备包括多个中空金属波导光开关阵列，阵列被堆叠，每个阵列包括：第一数量的光输入端口; 以及与第一数量的输入端口不同的第二数量的光输出端口。

8. 发明授权

US09137179B2 Memory-mapped buffers for network interface controllers 有权
标题翻译：用于网络接口控制器的内存映射缓冲区
公开(公告)号：US09137179B2
公开(公告)日：2015-09-15
申请号：US11493285
申请日：2006-07-26
申请人： Michael Steven Schlansker , Erwin Oertli
发明人： Michael Steven Schlansker , Erwin Oertli
IPC分类号： H04L12/879 , H04L12/861
CPC分类号： H04L49/901 , H04L49/90 , H04L49/9063
摘要： Systems and methods for providing network interface controllers (NICs) with memory-mapped buffers are described. A processing system includes a plurality of processing cells, each including at least one processor and at least one system memory. A NIC is associated with each of the processing cells for transmitting and receiving data between the processing cells. Each of the cells further includes a memory interconnect to which the NIC is directly connected and the NIC includes at least one memory-mapped buffer.
摘要翻译：描述了提供具有存储器映射缓冲器的网络接口控制器（NIC）的系统和方法。处理系统包括多个处理单元，每个处理单元包括至少一个处理器和至少一个系统存储器。 NIC与每个处理单元相关联，用于在处理单元之间发送和接收数据。每个单元还包括存储器互连，NIC直接连接到该存储器互连，并且NIC包括至少一个存储器映射缓冲器。

9. 发明授权

US09161105B2 Routing optical signals 有权
标题翻译：路由光信号
公开(公告)号：US09161105B2
公开(公告)日：2015-10-13
申请号：US14373457
申请日：2012-04-11
申请人： Terrel Morris , Michael Renne Ty Tan , Shih-Yuan Wang , Michael Steven Schlansker
发明人： Terrel Morris , Michael Renne Ty Tan , Shih-Yuan Wang , Michael Steven Schlansker
IPC分类号： H04B10/00 , H04Q11/00
CPC分类号： H04Q11/0005 , G02B6/3512 , G02B6/3546 , G02B6/3556 , H04Q2011/003 , H04Q2011/0032 , H04Q2011/0039 , H04Q2011/0058
摘要： Systems, methods, and apparatus to route optical signals are disclosed. An example apparatus to route optical signals includes a plurality of hollow metal waveguide optical switch arrays. Each of the arrays comprises a plurality of optical input ports and a plurality of optical output ports. The input ports and the output ports for a first one of the arrays are arranged in a first plane, the input ports and the output ports for a second one of the arrays are arranged in a second plane, and the plurality of arrays are stacked such that the first and second planes are adjacent. The first one of the arrays is to convey optical signals from a first communication device to a second communication device and the second one of the arrays is to convey optical signals from the second communication device to the first communication device.
摘要翻译：公开了路由光信号的系统，方法和装置。路由光信号的示例性设备包括多个中空金属波导光开关阵列。每个阵列包括多个光输入端口和多个光输出端口。用于第一个阵列的输入端口和输出端口布置在第一平面中，用于第二阵列的输入端口和输出端口布置在第二平面中，并且多个阵列被堆叠成第一和第二平面相邻。阵列中的第一个是将光信号从第一通信设备传送到第二通信设备，并且第二阵列将光信号从第二通信设备传送到第一通信设备。

10. 发明申请

US20140369682A1 ROUTING OPTICAL SIGNALS 有权
标题翻译：路由光信号
公开(公告)号：US20140369682A1
公开(公告)日：2014-12-18
申请号：US14373457
申请日：2012-04-11
申请人： Terrel Morris , Michael Renne Ty Tan , Shih-Yuan Wang , Michael Steven Schlansker
发明人： Terrel Morris , Michael Renne Ty Tan , Shih-Yuan Wang , Michael Steven Schlansker
IPC分类号： H04Q11/00
CPC分类号： H04Q11/0005 , G02B6/3512 , G02B6/3546 , G02B6/3556 , H04Q2011/003 , H04Q2011/0032 , H04Q2011/0039 , H04Q2011/0058
摘要： Systems, methods, and apparatus to route optical signals are disclosed. An example apparatus to route optical signals includes a plurality of hollow metal waveguide optical switch arrays. Each of the arrays comprises a plurality of optical input ports and a plurality of optical output ports. The input ports and the output ports for a first one of the arrays are arranged in a first plane, the input ports and the output ports for a second one of the arrays are arranged in a second plane, and the plurality of arrays are stacked such that the first and second planes are adjacent. The first one of the arrays is to convey optical signals from a first communication device to a second communication device and the second one of the arrays is to convey optical signals from the second communication device to the first communication device.
摘要翻译：公开了路由光信号的系统，方法和装置。路由光信号的示例性设备包括多个中空金属波导光开关阵列。每个阵列包括多个光输入端口和多个光输出端口。用于第一个阵列的输入端口和输出端口布置在第一平面中，用于第二阵列的输入端口和输出端口布置在第二平面中，并且多个阵列被堆叠成第一和第二平面相邻。阵列中的第一个是将光信号从第一通信设备传送到第二通信设备，并且第二阵列将光信号从第二通信设备传送到第一通信设备。

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