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1. 发明授权

US06766445B2 Storage system for use in custom loop accelerators and the like 有权
标题翻译：用于定制循环加速器等的存储系统
公开(公告)号：US06766445B2
公开(公告)日：2004-07-20
申请号：US09816851
申请日：2001-03-23
申请人： Michael Steven Schlansker , Vinod Kumar Kathail , Shail Aditya Gupta
发明人： Michael Steven Schlansker , Vinod Kumar Kathail , Shail Aditya Gupta
IPC分类号： G06F940
CPC分类号： G06F9/3885 , G06F9/3001 , G06F9/30134 , G06F9/325
摘要： A computational unit for use in loop computations. The computational unit includes a function unit, a plurality of phase lines, and a storage register. The computational unit is programmed to initiate one iteration of the loop every II cycles. Each function unit has a result output for outputting one computational result each cycle. There is one phase line corresponding to each of the II cycles. The storage register includes a linear connected array of shift cells having a first shift cell. Each shift cell has an input port, an output port, a shift control port, and an OR gate. Each shift cell receives the value to be stored in the shift cell on the input port, the stored value being stored in response to a control signal on the shift control port. The OR gate has an output connected to the shift enable port and one input for each cycle on which that shift cell is to receive the control signal, that input being connected to the phase line corresponding to that cycle. The input port of the first shift cell is connected to the result output. A plurality of such computational units can be connected together to form a loop accelerator. The accelerator includes a cross-connect circuit for coupling at least one shift cell output of one of the computational units to an input of a function unit of another of the computational units on a selected one of the II cycles.
摘要翻译：用于循环计算的计算单元。计算单元包括功能单元，多个相位线以及存储寄存器。计算单元被编程为每二个周期启动循环的一次迭代。每个功能单元具有用于每个周期输出一个计算结果的结果输出。存在对应于每个II周期的一相线。存储寄存器包括具有第一移位单元的移位单元的线性连接阵列。每个移位单元具有输入端口，输出端口，移位控制端口和或门。每个移位单元接收要存储在输入端口上的移位单元中的值，响应于移位控制端口上的控制信号存储存储的值。或门具有连接到移位使能端口的输出端和用于接收控制信号的移位单元的每个周期的一个输入，该输入端连接到与该周期对应的相位线。第一移位单元的输入端口连接到结果输出。多个这样的计算单元可以连接在一起以形成环路加速器。加速器包括交叉连接电路，用于将所述计算单元中的一个的至少一个移位单元输出耦合到所述II个周期中的所选择的一个计算单元的功能单元的输入。

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