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1. 发明授权

US09099999B1 Adjustable drive strength input-output buffer circuitry 有权
标题翻译：可调驱动强度输入输出缓冲电路
公开(公告)号：US09099999B1
公开(公告)日：2015-08-04
申请号：US13485768
申请日：2012-05-31
申请人： Bonnie I. Wang , Chiakang Sung , Joseph Huang , Khai Nguyen , Tony Ngai , Zhe Li , Hong Shi
发明人： Bonnie I. Wang , Chiakang Sung , Joseph Huang , Khai Nguyen , Tony Ngai , Zhe Li , Hong Shi
IPC分类号： H01L29/73 , H01L29/40 , H03K17/00 , H05K1/18 , H01L25/065 , H01L27/06
CPC分类号： H03K17/00 , H01L25/0652 , H01L25/0657 , H01L27/0688 , H01L2224/16145 , H01L2224/16225 , H01L2924/0002 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H05K1/144 , H05K1/181 , H05K2201/045 , H05K2201/10378 , H05K2201/10674 , H05K2201/10734 , H01L2924/00
摘要： An integrated circuit in a multi-chip package is provided. The integrated circuit may include adjustable interface circuitry configured to interface with other off-chip components. In particular, the adjustable interface circuitry may include a microbump input-output buffer operable to drive signals off of the integrated circuit and operable to receive signals from other integrated circuits in the multi-chip package via a microbump. The microbump input-output buffer may include output buffers and input buffers. The output buffers may have programmable drive strengths and may each be selectively switched in and out of use depending on the desired application. Each output buffer may include a level shifter, a buffer circuit, and multiple inverter-like circuits each of which can be turned on or off to adjust the drive strength of that output buffer.
摘要翻译：提供了一种多芯片封装中的集成电路。该集成电路可以包括被配置为与其它片外部件接口的可调节接口电路。特别地，可调接口电路可以包括微控制输入 - 输出缓冲器，其可操作用于驱动离开集成电路的信号，并且可操作以经由微型小型接收器从多芯片封装中的其他集成电路接收信号。微控制输入 - 输出缓冲器可以包括输出缓冲器和输入缓冲器。输出缓冲器可以具有可编程驱动强度，并且可以根据期望的应用选择性地切换和使用。每个输出缓冲器可以包括电平移位器，缓冲电路和多个类似逆变器的电路，每个可以导通或关断以调整该输出缓冲器的驱动强度。

2. 发明授权

US08923417B1 Methods and apparatus for transceiver power noise reduction 有权
标题翻译：收发机功率降噪方法和装置
公开(公告)号：US08923417B1
公开(公告)日：2014-12-30
申请号：US13349418
申请日：2012-01-12
申请人： Zhe Li , Hong Shi
发明人： Zhe Li , Hong Shi
IPC分类号： H04B3/00 , H04L25/00
CPC分类号： H04L25/49 , H04L25/0264 , H04L25/03866
摘要： Embodiments disclosed herein relate to apparatus and methods of transceiver power noise reduction. One embodiment relates to a method of serial data communication. At a transmitter, data may be encoded by a communication protocol encoder, and the protocol-encoded data may be serialized. The serialized data may be encoded for power-delivery-network noise reduction (PNR) so as to generate PNR-encoded serial data, and the PNR-encoded serial data may be driven onto a communication channel. Other embodiments, aspects, and features are also disclosed.
摘要翻译：本文公开的实施例涉及收发器功率噪声降低的装置和方法。一个实施例涉及串行数据通信的方法。在发射机上，数据可以由通信协议编码器编码，并且协议编码的数据可以被序列化。序列化数据可以被编码用于功率传递 - 网络噪声降低（PNR），以便产生PNR编码的串行数据，并且PNR编码的串行数据可以被驱动到通信信道上。还公开了其它实施例，方面和特征。

3. 发明授权

US07990235B1 Simultaneous switching noise filter architecture and method 有权
标题翻译：同时开关噪声滤波器架构与方法
公开(公告)号：US07990235B1
公开(公告)日：2011-08-02
申请号：US12128581
申请日：2008-05-28
申请人： Yee Huan Yew , Hong Shi
发明人： Yee Huan Yew , Hong Shi
IPC分类号： H01P1/203 , H03H7/09
CPC分类号： H01P1/2039
摘要： The present invention is directed to a transmission line assembly and method of propagating signals therethrough that features forming transmission lines of the assembly to provide desired filtering properties. To that end, the assembly includes a plurality of spaced-apart transmission lines placing first and second sets of active circuits in electrical communication, with a subset of the plurality of spaced apart transmission lines having dimensions to filter unwanted characteristics of signals, propagating between the first and second sets and inductively coupled between one or more of the plurality of spaced-apart transmission lines. The method performs the function of the assembly.
摘要翻译：本发明涉及传输线组件和传播信号的方法，其特征在于，形成组件的传输线以提供期望的过滤性能。为此，组件包括多个间隔开的传输线，将第一组和第二组有源电路组置于电气通信中，多个间隔开的传输线的子集具有滤除信号不需要的特性的尺寸，第一和第二组并且感应耦合在所述多个间隔开的传输线中的一个或多个之间。该方法执行装配的功能。

4. 发明授权

US07825527B2 Return loss techniques in wirebond packages for high-speed data communications 有权
标题翻译：用于高速数据通信的引线封装中的回波损耗技术
公开(公告)号：US07825527B2
公开(公告)日：2010-11-02
申请号：US12139388
申请日：2008-06-13
申请人： William W. Bereza , Hong Shi
发明人： William W. Bereza , Hong Shi
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/49 , H01L23/66 , H01L24/02 , H01L24/48 , H01L2223/6611 , H01L2224/05554 , H01L2224/45015 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/484 , H01L2224/49113 , H01L2224/49171 , H01L2224/4943 , H01L2924/00014 , H01L2924/01033 , H01L2924/014 , H01L2924/14 , H01L2924/19051 , H01L2924/19107 , H01L2924/20752 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A wirebond package configured to reduce wirebond return loss is presented. An integrated circuit of interest with rows of bonding pads is bonded to a surface of the wirebond package. The surface of wirebond package has columns of bonding pads, which are configured to transmit or receive signals, power, and ground to and/or from the wirebond package to the integrated circuit. Corresponding die pads on the integrated circuit and bonding pads of the wirebond package are coupled using conductive lines. The conductive lines carrying the active signal has coplanar adjacent ground lines on opposing sides of active signal line and the distance between active signal line and the coplanar adjacent ground lines is tapered.
摘要翻译：提出了一种配置为减少引线键返回损耗的引线键合封装。感兴趣的一排结合焊盘的集成电路被结合到引线键合封装的表面。引线键合封装的表面具有接合焊盘的列，其被配置为向引线封装向集成电路发送或接收信号，电源和接地。集成电路上的对应的芯片焊盘和引线键合封装的焊盘使用导线连接。承载有源信号的导线在有源信号线的相对侧具有共面相邻的接地线，并且有源信号线与共面相邻接地线之间的距离是渐缩的。

5. 发明授权

US07640523B1 Substrate via patterns for optimal power distribution and manufacturability in semiconductor die packages 有权
标题翻译：基板图案，用于半导体芯片封装中的最佳配电和可制造性
公开(公告)号：US07640523B1
公开(公告)日：2009-12-29
申请号：US11747189
申请日：2007-05-10
申请人： Hong Shi , Yee Huan Yew
发明人： Hong Shi , Yee Huan Yew
IPC分类号： G06F17/50 , G06F9/45
CPC分类号： G06F17/5077
摘要： The embodiments of the present invention provide methods for choosing a via layout pattern(s) for power distribution network in a package for a semiconductor die. The chosen via layout pattern allows the power distribution network to meet the limitation on the loop inductance in order to avoid causing a large ΔV affecting the functionality of semiconductor devices on the die. In addition, the chosen via layout pattern also meets the limitation of total number of vias allowed for the power distribution network in the package.
摘要翻译：本发明的实施例提供了用于选择用于半导体管芯的封装中的用于配电网络的通孔布局图案的方法。所选择的通孔布局模式允许配电网络满足环路电感的限制，以避免导致大的DeltaV影响芯片上的半导体器件的功能。此外，选择的通孔布局模式还满足了封装中配电网络允许的通孔总数的限制。

6. 发明授权

US07472367B1 Method of optimizing interconnect distribution to improve signal integrity 失效
标题翻译：优化互连分布以提高信号完整性的方法
公开(公告)号：US07472367B1
公开(公告)日：2008-12-30
申请号：US11262347
申请日：2005-10-27
申请人： Yuanlin Xie , Hong Shi
发明人： Yuanlin Xie , Hong Shi
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A method of distributing an array of interconnects on an electronic device divides the array into multiple regions, each region having certain performance requirements. For each region, predefined performance curves are used to choose from a plurality of interconnect distribution pattern modules one or more interconnect distribution pattern modules that satisfy the corresponding performance requirements. The chosen interconnect distribution pattern modules are used to generate a performance indication map highlighting those vulnerable interconnect(s) that may suffer severe crosstalk interference. Each vulnerable interconnect is then relocated to a different location until the performance requirements are met.
摘要翻译：在电子设备上分配互连阵列的方法将阵列划分成多个区域，每个区域具有一定的性能要求。对于每个区域，使用预定义的性能曲线来从多个互连分布模式模块中选择满足相应性能要求的一个或多个互连分布模式模块。选择的互连分布模式模块用于生成突出显示可能遭受严重串扰干扰的那些易受攻击的互连的性能指示图。然后将每个易受攻击的互连重新定位到不同的位置，直到满足性能要求。

7. 发明申请

US20080188195A1 LNA gain adjustment in an RF receiver to compensate for intermodulation interference 失效
公开(公告)号：US20080188195A1
公开(公告)日：2008-08-07
申请号：US12099838
申请日：2008-04-09
申请人： Hong Shi
发明人： Hong Shi
IPC分类号： H04B1/06
CPC分类号： H03G3/3068 , H03F1/32 , H03F2200/294 , H03F2200/372 , H03G3/3052 , H03G3/3078 , H04B1/109
摘要： A Radio Frequency (RF) receiver includes a low noise amplifier (LNA) and a mixer coupled to the output of the LNA. The gain of the LNA is adjusted to maximize signal-to-noise ratio of the mixer and to force the mixer to operate well within its linear region when an intermodulation interference component is present. The RF receiver includes a first received signal strength indicator (RSSI_A) coupled to the output of the mixer that measures the strength of the wideband signal at that point. A second received signal strength indicator (RSSI_B) couples after the BPF and measures the strength of the narrowband signal. The LNA gain is set based upon these signal strengths. By altering the gain of the LNA by one step and measuring the difference between a prior RSSI_B reading and a subsequent RSSI_B′ reading will indicate whether intermodulation interference is present.

8. 发明申请

US20050079842A1 Timing based LNA gain adjustment in an RF receiver to compensate for intermodulation interference 有权
公开(公告)号：US20050079842A1
公开(公告)日：2005-04-14
申请号：US10968496
申请日：2004-10-19
申请人： Hong Shi
发明人： Hong Shi
IPC分类号： H03F1/32 , H03G3/20 , H03G3/30 , H04B1/10 , H04B1/04 , H01Q11/12 , H04B1/06
CPC分类号： H03G3/3078 , H03F1/32 , H03F2200/294 , H03F2200/372 , H03G3/3052 , H03G3/3068 , H04B1/109
摘要： A Radio Frequency (RF) receiver includes a low noise amplifier (LNA) and a mixer coupled to the output of the LNA. The gain of the LNA is adjusted to maximize signal-to-noise ratio of the mixer and to force the mixer to operate well within its linear region when an intermodulation interference component is present. The RF receiver includes a first received signal strength indicator (RSSI_A) coupled to the output of the mixer that measures the strength of the wideband signal at that point. A second received signal strength indicator (RSSI_B) couples after the BPF and measures the strength of the narrowband signal. The LNA gain is set based upon these signal strengths. LNA gain is determined during a guard period preceding an intended time slot of a current frame and during a guard period following an intended time slot of a prior frame. The lesser of these two LNA gains is used for the intended time slot of the current frame.

9. 发明授权

US06873832B2 Timing based LNA gain adjustment in an RF receiver to compensate for intermodulation interference 失效
标题翻译： RF接收机中基于时序的LNA增益调整，以补偿互调干扰
公开(公告)号：US06873832B2
公开(公告)日：2005-03-29
申请号：US10098911
申请日：2002-03-15
申请人： Hong Shi
发明人： Hong Shi
IPC分类号： H03F1/32 , H03G3/20 , H03G3/30 , H04B1/10 , H04B1/06 , H04B7/00 , H04B17/02
CPC分类号： H03G3/3078 , H03F1/32 , H03F2200/294 , H03F2200/372 , H03G3/3052 , H03G3/3068 , H04B1/109
摘要： A Radio Frequency (RF) receiver includes a low noise amplifier (LNA) and a mixer coupled to the output of the LNA. The gain of the LNA is adjusted to maximize signal-to-noise ratio of the mixer and to force the mixer to operate well within its linear region when an intermodulation interference component is present. The RF receiver includes a first received signal strength indicator (RSSI_A) coupled to the output of the mixer that measures the strength of the wideband signal at that point. A second received signal strength indicator (RSSI_B) couples after the BPF and measures the strength of the narrowband signal. The LNA gain is set based upon these signal strengths. LNA gain is determined during a guard period preceding an intended time slot of a current frame and during a guard period following an intended time slot of a prior frame. The lesser of these two LNA gains is used for the intended time slot of the current frame.
摘要翻译：射频（RF）接收机包括低噪声放大器（LNA）和耦合到LNA的输出的混频器。调整LNA的增益以使混频器的信噪比最大化，并且当存在互调干涉分量时，迫使混频器在其线性区域内良好地运行。 RF接收机包括耦合到混频器的输出的第一接收信号强度指示符（RSSI_A），该信号强度指示器测量在该点处的宽带信号的强度。第二接收信号强度指示符（RSSI_B）在BPF之后耦合并测量窄带信号的强度。基于这些信号强度设置LNA增益。 LNA增益在当前帧的预定时隙之前的保护时段期间以及在先前帧的预期时隙之后的保护时段期间被确定。这两个LNA增益中较小的一个用于当前帧的预期时隙。

10. 发明授权

US08112045B2 Translational loop transmitter architecture employing channel power ratio measurements for modulation accuracy calibration 有权
标题翻译：平移环路发射机架构采用信道功率比测量进行调制精度校准
公开(公告)号：US08112045B2
公开(公告)日：2012-02-07
申请号：US12336830
申请日：2008-12-17
申请人： Hong Shi , Henrik T. Jensen
发明人： Hong Shi , Henrik T. Jensen
IPC分类号： G06F15/16
CPC分类号： H04B1/0475
摘要： A Radio Frequency RF transmitter includes a translational loop architecture that supports non-constant envelope modulation types and includes by adjusting the envelope of the translational loop at the translational loop output. The RF transmitter includes an Intermediate Frequency (IF) modulator, a translational loop, an envelope time delay adjust block, an envelope adjust block, and a time delay calibration block. The IF modulator receives a modulated baseband signal and produces a modulated IF signal having a non-constant envelope. The translational loop receives the modulated IF signal and produces a modulated RF signal having a constant envelope. The envelope time delay adjust block receives an envelope signal corresponding to the original modulated signal and produces a time delayed envelope signal based upon a time delay control signal. The envelope adjust block adjusts the modulated RF signal based upon the time delayed envelope signal to produce an envelope adjusted modulated RF signal. Finally, the time delay calibration block receives the envelope adjusted modulated RF signal and produces the time delay control signal.
摘要翻译：射频RF发射机包括支持非恒定包络调制类型的平移环路架构，并且包括通过调整平移环路输出端的平移环路的包络。 RF发射机包括中频（IF）调制器，平移回路，包络时间延迟调整块，包络调整块和时间延迟校准块。 IF调制器接收调制的基带信号并产生具有非恒定包络的调制IF信号。平移环路接收调制的IF信号并产生具有恒定包络线的调制RF信号。包络时间延迟调整块接收对应于原始调制信号的包络信号，并且基于时间延迟控制信号产生时间延迟包络信号。信封调整块基于时间延迟的包络信号来调整调制的RF信号，以产生包络调制的调制的RF信号。最后，延时校准块接收包络调制的调制RF信号并产生延时控制信号。

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