会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明授权
    • Optical fiber amplifier control
    • 光纤放大器控制
    • US06522460B2
    • 2003-02-18
    • US09759373
    • 2001-01-16
    • Dag BonnedalJohan SandellGunnar Forsberg
    • Dag BonnedalJohan SandellGunnar Forsberg
    • H01S300
    • H04B10/296
    • An optical fiber amplifier has a length of active optical fiber into which pump light from a pump laser is injected. The pump laser is locally controlled by a laser monitor diode, the pump laser and the laser monitor forming a pump laser module. The overall amplification of the amplifier is controlled by two control loops: a feed forward loop and a feed back loop. These two control loops also control the pump laser. The feed forward loop gives a fast response and receives an input signal from an input monitoring diode. The feed back loop gives a slower response and sets the overall gain of the amplifier. The feed back loop receives an input signal from an output monitoring diode. In the feed forward loop, the input power level is biased and controlled by a set offset values from sources to provide a signal corresponding to a pump power reference level which maintains the desired gain. The offsets of characteristic curves indicating an overall behavior of the optical amplifier. The pump power reference level is further modified in accordance with the pump monitor signal locally controlling the pump laser. This gives a very fast and accurate control in spite of the non-linear behavior of the optical fiber amplifier.
    • 光纤放大器具有长度的有源光纤,其中注入来自泵浦激光器的泵浦光。 泵激光器由激光监视二极管局部控制,泵浦激光器和激光监视器形成泵浦激光器模块。 放大器的整体放大由两个控制回路控制:前馈回路和反馈回路。 这两个控制回路也控制泵激光器。 前馈环路提供快速响应,并从输入监控二极管接收输入信号。 反馈回路给出较慢的响应并设置放大器的总体增益。 反馈回路从输出监视二极管接收输入信号。 在前馈回路中,输入功率电平被偏置并由来自源的设定偏移值控制,以提供对应于保持所需增益的泵功率参考电平的信号。 指示光放大器总体行为的特性曲线的偏移。 泵功率参考电平根据本地控制泵浦激光器的泵监视器信号进一步修改。 尽管光纤放大器具有非线性的特性,但这样做非常快速和准确。
    • 4. 发明申请
    • DIGITAL CLOCK REGENERATOR
    • 数字时钟再生器
    • US20120293224A1
    • 2012-11-22
    • US13576496
    • 2010-02-17
    • Gunnar Forsberg
    • Gunnar Forsberg
    • H03K5/01
    • H04L7/033G06F1/08
    • A sampling unit (110) receives an input clock signal (CLKin) having a varying period time, and samples the input clock signal (CLKin) based on a sampling clock signal (CLKsmpl) that has a frequency being substantially higher than an average frequency of the input clock signal (CLKin). The sampling unit (110) produces a respective period length value (PL) for each period of the input clock signal (CLKin). An averaging unit (120) receives a number of period length values (PL) from the sampling unit (110), and based thereon produces an average period length value (PLavg) representing an average period time for the input clock signal (CLKin) over an averaging interval including a number of periods equivalent to said number of period length values (PL). An output unit (151) produces a stabilized output clock signal (CLKout) based on the average period length value (PLavg) and the sampling clock signal (CLKsmpl).
    • 采样单元(110)接收具有变化周期时间的输入时钟信号(CLKin),并且基于采样时钟信号(CLKsmpl)对输入时钟信号(CLKin)进行采样,该采样时钟信号(CLKsmpl)的频率明显高于 输入时钟信号(CLKin)。 采样单元(110)针对输入时钟信号(CLKin)的每个周期产生相应的周期长度值(PL)。 平均单元(120)从采样单元(110)接收多个周期长度值(PL),并且基于此产生表示输入时钟信号(CLKin)的平均周期时间的平均周期长度值(PLavg) 平均间隔,其包括与所述周期长度值(PL)的数量相当的周期数。 输出单元(151)基于平均周期长度值(PLavg)和采样时钟信号(CLKsmpl)产生稳定的输出时钟信号(CLKout)。
    • 8. 发明授权
    • Digital phase comparator
    • 数字相位比较器
    • US5990673A
    • 1999-11-23
    • US765595
    • 1997-06-03
    • Gunnar Forsberg
    • Gunnar Forsberg
    • H03K5/26G01R25/00H03D13/00H03L7/085H03L7/18G01R23/12G01R25/04
    • G01R25/00H03D13/00H03L7/085H03L7/18
    • The phase difference of two periodic input signals having essentially the same frequency are measured in, for example, a communication system, in an accurate way with a high resolution and utilizing digital components. A high resolution digital phase detector which can be included in a phase locked loop comprises an oscillator providing a clock signal having a high frequency that is not an integer multiple of the frequency of the input signals. The clock signal is provided to a clock signal input of a counter, and the periodic signals are fed to the start and stop terminals of the counter. Output terminals of the counter are directly connected to inputs of a digital low-pass filter in which an average value calculation is carried out of the integer values of the output of the counter. Because of the small frequency deviation from the integer multiple value, a slow sliding of the oscillator phase compared to the phase of the input signals is achieved, such that all possible integer values on the output of the counter are run through. A very accurate calculation of the phase position is achieved by the average value calculation of these integer values in the low-pass filter. In a complete phase-locked loop, a voltage controlled oscillator provides one of the input signals to the counter through a divider circuit.
    • PCT No.PCT / SE95 / 00813 Sec。 371日期:1997年6月3日 102(e)日期1997年6月3日PCT归档1995年6月30日PCT公布。 公开号WO96 / 01007 日期1996年1月11日具有基本上相同频率的两个周期性输入信号的相位差在例如通信系统中以高分辨率和利用数字分量的精确方式被测量。 可以包括在锁相环中的高分辨率数字相位检测器包括提供具有不是输入信号频率的整数倍的高频的时钟信号的振荡器。 时钟信号被提供给计数器的时钟信号输入,并且周期信号被馈送到计数器的起始和停止端子。 计数器的输出端子直接连接到数字低通滤波器的输入端,其中计数器的输出的整数值进行平均值计算。 由于与整数倍值的偏差小,所以实现了振荡器相位与输入信号的相位相比较慢的滑动,使得计数器的输出上的所有可能的整数值都通过。 通过低通滤波器中这些整数值的平均值计算,可以非常准确地计算相位位置。 在一个完整的锁相环中,压控振荡器通过分频电路向计数器提供一个输入信号。
    • 9. 发明授权
    • Data transmission involving multiplexing and demultiplexing of embedded clock signals
    • 数据传输涉及嵌入式时钟信号的复用和解复用
    • US08923347B2
    • 2014-12-30
    • US13643706
    • 2010-04-27
    • Gunnar Forsberg
    • Gunnar Forsberg
    • H04J3/06H04J4/00H04W4/00H04J3/16H04L5/26H04L7/00H04L5/14H04L1/00
    • H04J3/1664H04L1/0025H04L5/14H04L5/26H04L7/0083
    • In a data transmission system, a first node receives at least two sets of input data signals including at least two signals being based on different synchronization sources. The first node extracts a respective clock signal representing the embedded clock signals from the sources, samples and formats these signals for transmission according to a TDM structure. The TDM formatted signals are transmitted as at least one bit stream over a transmission medium to at least one second node, where the bit stream is demultiplexed into at least two sets of output data signals respective demultiplexed clock signals representing the sampled clock signals. A jitter attenuating mechanism reduces an amount of frequency jitter to below a predefined level to produce a respective clock signal having a synchronization quality superior to that of the demultiplexed clock signals. An interface module recombines each data signal with its associated clock signal.
    • 在数据传输系统中,第一节点接收包括基于不同同步源的至少两个信号的至少两组输入数据信号。 第一节点从源中提取表示嵌入时钟信号的相应时钟信号,根据TDM结构采样和格式化这些信号以进行传输。 TDM格式的信号作为至少一个比特流通过传输介质发送到至少一个第二节点,其中比特流被多路分解成至少两组输出数据信号,分别表示采样时钟信号的解复用时钟信号。 抖动衰减机构将频率抖动的量减少到低于预定水平,以产生具有优于解复用时钟信号的同步质量的相应时钟信号。 接口模块将每个数据信号与其关联的时钟信号重新组合。
    • 10. 发明授权
    • Arrangement for supervising and/or controlling the bit rate of data pulses
    • 用于监视和/或控制数据脉冲比特率的布置
    • US08280247B1
    • 2012-10-02
    • US10130691
    • 2000-11-22
    • Gunnar Forsberg
    • Gunnar Forsberg
    • H04B10/08H04B17/00
    • H04B10/0795H04B10/07953H04B10/0799
    • The invention concerns an arrangement for supervising and/or controlling the bit rate of data pulses that are transmitted from a transmitter (16) to at least one optical conduction path (22). The transmitter (16) has an input side (18) which receives electrical pulses from an electric connection (14) and an output side (20) from which light pulses are transmitted in response to the received electrical pulses. The arrangement comprises a supervising unit (24) with at least one input (26) which is suited to be connected to said electric connection (14). The supervising unit (24) is arranged to estimate or determine the bit rate of the pulses that are received at said input (26). The arrangement is arranged to carry out at least one measure which depends on the estimated or determined bit rate.
    • 本发明涉及一种用于监控和/或控制从发射器(16)发射到至少一个光传导路径(22)的数据脉冲的比特率的装置。 发射器(16)具有从电连接(14)和输出侧(20)接收电脉冲的输入侧(18),响应于所接收的电脉冲从其发射光脉冲。 该装置包括具有至少一个适于连接到所述电连接(14)的输入端(26)的监控单元(24)。 监视单元(24)被布置为估计或确定在所述输入(26)处接收的脉冲的比特率。 该布置被布置为执行取决于估计或确定的比特率的至少一个度量。