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1. 发明授权

US08399952B2 Integrated circuit devices having a strontium ruthenium oxide interface 有权
标题翻译：具有锶氧化钌界面的集成电路器件
公开(公告)号：US08399952B2
公开(公告)日：2013-03-19
申请号：US13103162
申请日：2011-05-09
申请人： Bhaskar Srinivasan , Vassil Antonov , John Smythe
发明人： Bhaskar Srinivasan , Vassil Antonov , John Smythe
IPC分类号： H01L21/00
CPC分类号： H01L28/75 , C23C16/404 , C23C16/409 , C23C16/45527 , C23C16/45529 , C23C16/45531 , C23C16/56 , H01G4/33 , H01L21/02197 , H01L21/022 , H01L21/0228 , H01L28/56 , H01L28/65
摘要： Strontium ruthenium oxide provides an effective interface between a ruthenium conductor and a strontium titanium oxide dielectric. Formation of the strontium ruthenium oxide includes the use of atomic layer deposition to form strontium oxide and subsequent annealing of the strontium oxide to form the strontium ruthenium oxide. A first atomic layer deposition of strontium oxide is preformed using water as an oxygen source, followed by a subsequent atomic layer deposition of strontium oxide using ozone as an oxygen source.
摘要翻译：钌氧化钌提供钌导体和锶钛氧化物电介质之间的有效界面。锶氧化钌的形成包括使用原子层沉积形成氧化锶，随后退火氧化锶以形成氧化锶锶。使用水作为氧源来进行氧化锶的第一原子层沉积，然后使用臭氧作为氧源，随后用氧化锶沉积氧化锶。

2. 发明申请

US20100258903A1 STRONTIUM RUTHENIUM OXIDE INTERFACE 有权
标题翻译：锶氧化铝界面
公开(公告)号：US20100258903A1
公开(公告)日：2010-10-14
申请号：US12421916
申请日：2009-04-10
申请人： Bhaskar Srinivasan , Vassil Antonov , John Smythe
发明人： Bhaskar Srinivasan , Vassil Antonov , John Smythe
IPC分类号： H01L27/10 , B05D5/12
CPC分类号： H01L28/75 , C23C16/404 , C23C16/409 , C23C16/45527 , C23C16/45529 , C23C16/45531 , C23C16/56 , H01G4/33 , H01L21/02197 , H01L21/022 , H01L21/0228 , H01L28/56 , H01L28/65
摘要： Strontium ruthenium oxide provides an effective interface between a ruthenium conductor and a strontium titanium oxide dielectric. Formation of the strontium ruthenium oxide includes the use of atomic layer deposition to form strontium oxide and subsequent annealing of the strontium oxide to form the strontium ruthenium oxide. A first atomic layer deposition of strontium oxide is preformed using water as an oxygen source, followed by a subsequent atomic layer deposition of strontium oxide using ozone as an oxygen source.
摘要翻译：钌氧化钌提供钌导体和锶钛氧化物电介质之间的有效界面。锶氧化钌的形成包括使用原子层沉积形成氧化锶，随后退火氧化锶以形成氧化锶锶。使用水作为氧源来进行氧化锶的第一原子层沉积，然后使用臭氧作为氧源，随后用氧化锶沉积氧化锶。

3. 发明申请

US20110210423A1 INTEGRATED CIRCUIT DEVICES HAVING A STRONTIUM RUTHENIUM OXIDE INTERFACE 有权
标题翻译：具有氧化钌界面的集成电路设备
公开(公告)号：US20110210423A1
公开(公告)日：2011-09-01
申请号：US13103162
申请日：2011-05-09
申请人： Bhaskar Srinivasan , Vassil Antonov , John Smythe
发明人： Bhaskar Srinivasan , Vassil Antonov , John Smythe
IPC分类号： H01L29/86 , H01L21/02
CPC分类号： H01L28/75 , C23C16/404 , C23C16/409 , C23C16/45527 , C23C16/45529 , C23C16/45531 , C23C16/56 , H01G4/33 , H01L21/02197 , H01L21/022 , H01L21/0228 , H01L28/56 , H01L28/65
摘要： Strontium ruthenium oxide provides an effective interface between a ruthenium conductor and a strontium titanium oxide dielectric. Formation of the strontium ruthenium oxide includes the use of atomic layer deposition to form strontium oxide and subsequent annealing of the strontium oxide to form the strontium ruthenium oxide. A first atomic layer deposition of strontium oxide is preformed using water as an oxygen source, followed by a subsequent atomic layer deposition of strontium oxide using ozone as an oxygen source.
摘要翻译：钌氧化钌提供钌导体和锶钛氧化物电介质之间的有效界面。锶氧化钌的形成包括使用原子层沉积形成氧化锶，随后退火氧化锶以形成氧化锶锶。使用水作为氧源来进行氧化锶的第一原子层沉积，然后使用臭氧作为氧源，随后用氧化锶沉积氧化锶。

4. 发明授权

US07939442B2 Strontium ruthenium oxide interface 有权
标题翻译：钌氧化钌界面
公开(公告)号：US07939442B2
公开(公告)日：2011-05-10
申请号：US12421916
申请日：2009-04-10
申请人： Bhaskar Srinivasan , Vassil Antonov , John Smythe
发明人： Bhaskar Srinivasan , Vassil Antonov , John Smythe
IPC分类号： H01L21/00
CPC分类号： H01L28/75 , C23C16/404 , C23C16/409 , C23C16/45527 , C23C16/45529 , C23C16/45531 , C23C16/56 , H01G4/33 , H01L21/02197 , H01L21/022 , H01L21/0228 , H01L28/56 , H01L28/65
摘要： Strontium ruthenium oxide provides an effective interface between a ruthenium conductor and a strontium titanium oxide dielectric. Formation of the strontium ruthenium oxide includes the use of atomic layer deposition to form strontium oxide and subsequent annealing of the strontium oxide to form the strontium ruthenium oxide. A first atomic layer deposition of strontium oxide is preformed using water as an oxygen source, followed by a subsequent atomic layer deposition of strontium oxide using ozone as an oxygen source.
摘要翻译：钌氧化钌提供钌导体和锶钛氧化物电介质之间的有效界面。锶氧化钌的形成包括使用原子层沉积形成氧化锶，随后退火氧化锶以形成氧化锶锶。使用水作为氧源来进行氧化锶的第一原子层沉积，然后使用臭氧作为氧源，随后用氧化锶沉积氧化锶。

5. 发明申请

US20130005080A1 Methods Utilizing Microwave Radiation During Formation Of Semiconductor Constructions 有权
标题翻译：在半导体结构形成过程中利用微波辐射的方法
公开(公告)号：US20130005080A1
公开(公告)日：2013-01-03
申请号：US13608992
申请日：2012-09-10
申请人： John Smythe , Bhaskar Srinivasan , Ming Zhang
发明人： John Smythe , Bhaskar Srinivasan , Ming Zhang
IPC分类号： H01L21/26 , H01L21/44 , H01L21/06
CPC分类号： H01L29/66136 , H01L21/26513 , H01L21/268 , H01L21/324 , H01L21/823425 , H01L21/823814 , H01L27/10873 , H01L27/24 , H01L29/665 , H01L29/6659
摘要： Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500° C. during the exposure to the microwave radiation.
摘要翻译：一些实施例包括在形成半导体结构期间使用微波辐射来激活掺杂剂和/或增加半导体材料的结晶度的方法。在一些实施例中，微波辐射具有约5.8千兆赫的频率，并且在暴露于微波辐射期间半导体构造的温度不超过约500℃。

6. 发明授权

US08203179B2 Device having complex oxide nanodots 有权
标题翻译：器件具有复杂的氧化物纳米点
公开(公告)号：US08203179B2
公开(公告)日：2012-06-19
申请号：US12949558
申请日：2010-11-18
申请人： Nirmal Ramaswamy , Gurtej Sandhu , Bhaskar Srinivasan , John Smythe
发明人： Nirmal Ramaswamy , Gurtej Sandhu , Bhaskar Srinivasan , John Smythe
IPC分类号： H01L29/788
CPC分类号： H01L21/31691 , H01L21/28273 , H01L21/3142 , H01L29/42332 , H01L29/7881
摘要： Devices are disclosed, such as those having a memory cell. The memory cell includes an active area formed of a semiconductor material; a first dielectric over the semiconductor material; a second dielectric comprising a material having a perovskite structure over the first dielectric; a third dielectric over the second dielectric; and a gate electrode over the third dielectric.
摘要翻译：公开了诸如具有存储器单元的器件。存储单元包括由半导体材料形成的有源区; 半导体材料上的第一电介质; 第二电介质，其包括在所述第一电介质上方具有钙钛矿结构的材料; 在所述第二电介质上的第三电介质; 以及位于第三电介质上的栅电极。

7. 发明申请

US20100315760A1 Capacitors Having Dielectric Regions That Include Multiple Metal Oxide-Comprising Materials 失效
标题翻译：具有包含多种金属氧化物的材料的介电区域的电容器
公开(公告)号：US20100315760A1
公开(公告)日：2010-12-16
申请号：US12483474
申请日：2009-06-12
申请人： Rishikesh Krishnan , John Smythe , Vishwanath Bhat , Noel Rocklein , Bhaskar Srinivasan , Jeff Hully , Chris Carlson
发明人： Rishikesh Krishnan , John Smythe , Vishwanath Bhat , Noel Rocklein , Bhaskar Srinivasan , Jeff Hully , Chris Carlson
IPC分类号： H01G4/10
CPC分类号： H01L28/56 , H01G4/10 , H01L27/108
摘要： Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10−7 amps/cm2 at from −1.1V to +1.1V.
摘要翻译：公开了形成电容器的电容器和方法，其包括内部导电金属电容器电极和外部导电金属电容器电极。电容器电介质区域被容纳在内导电金属电容电极和外导电金属电容器电极之间，并且具有不大于150埃的厚度。公开了厚度和关系的材料的各种组合，其相互之间可以实现和导致电介质区域的介电常数k至少为35，而在-1.1V至-1.0V的范围内漏电流不大于1×10-7Aps / cm 2 + 1.1V。

8. 发明申请

US20090045447A1 COMPLEX OXIDE NANODOTS 有权
标题翻译：复合氧化物纳米
公开(公告)号：US20090045447A1
公开(公告)日：2009-02-19
申请号：US11840485
申请日：2007-08-17
申请人： Nirmal Ramaswamy , Gurtej Sandhu , Bhaskar Srinivasan , John Smythe
发明人： Nirmal Ramaswamy , Gurtej Sandhu , Bhaskar Srinivasan , John Smythe
IPC分类号： H01L29/78 , H01L21/316 , H01L21/28
CPC分类号： H01L21/31691 , H01L21/28273 , H01L21/3142 , H01L29/42332 , H01L29/7881
摘要： Methods and devices are disclosed, such as those involving forming a charge trap for, e.g., a memory device, which can include flash memory cells. A substrate is exposed to temporally-separated pulses of a titanium source material, a strontium source material, and an oxygen source material capable of forming an oxide with the titanium source material and the strontium source material to form the charge trapping layer on the substrate.
摘要翻译：公开了方法和装置，例如涉及为例如可以包括闪速存储器单元的存储器件形成电荷阱的那些。将衬底暴露于钛源材料，锶源材料和能够与钛源材料和锶源材料形成氧化物的氧源材料的时间分离的脉冲，以在衬底上形成电荷捕获层。

9. 发明申请

US20080194088A1 Vapor deposition methods for forming a metal-containing layer on a substrate 有权
标题翻译：在基板上形成含金属层的气相沉积方法
公开(公告)号：US20080194088A1
公开(公告)日：2008-08-14
申请号：US11705992
申请日：2007-02-14
申请人： Bhaskar Srinivasan , John Smythe
发明人： Bhaskar Srinivasan , John Smythe
IPC分类号： H01L21/20 , C23C16/00
CPC分类号： C23C16/405 , C23C16/409 , C23C16/45529 , C23C16/45531 , H01G4/085 , H01G4/1227 , H01L21/02186 , H01L21/022 , H01L21/0228 , H01L21/3141 , H01L21/31604 , H01L21/31691
摘要： Atomic layer deposition methods as described herein can be advantageously used to form a metal-containing layer on a substrate. For example, certain methods as described herein can form a strontium titanate layer that has low carbon content (e.g., low strontium carbonate content), which can result in layer with a high dielectric constant.
摘要翻译：本文所述的原子层沉积方法可有利地用于在基底上形成含金属的层。例如，如本文所述的某些方法可以形成具有低碳含量（例如低碳酸锶含量）的钛酸锶层，其可导致具有高介电常数的层。

10. 发明授权

US08637113B2 Methods of forming a non-volatile resistive oxide memory array 有权
标题翻译：形成非易失性电阻氧化物存储器阵列的方法
公开(公告)号：US08637113B2
公开(公告)日：2014-01-28
申请号：US13354163
申请日：2012-01-19
申请人： Gurtej Sandhu , John Smythe , Bhaskar Srinivasan
发明人： Gurtej Sandhu , John Smythe , Bhaskar Srinivasan
IPC分类号： C23C18/00 , C23C20/00 , C23C28/00 , C23C30/00 , H01C17/06
CPC分类号： H01L27/101 , H01L21/0271 , Y10S438/947
摘要： A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.
摘要翻译：形成非易失性电阻氧化物存储器阵列的方法包括在衬底上形成多个导电字线或导电位线。含金属氧化物的材料形成在多条所述一条字线或位线中。在多个所述一条字线或位线之间提供一系列细长的沟槽。多个自组装嵌段共聚物线形成在沟槽中的各个内，与沟槽侧壁之间对准并且在沟槽侧壁之间形成。从所述多个自组装嵌段共聚物线路提供多个导电字线或导电位线，以形成包含所述金属氧化物的材料的单独可编程的结，其中字线和位线彼此交叉。

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