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    • 3. 发明授权
    • Semiconductor switching arrangement having a normally on and a normally off transistor
    • 具有常开和常关晶体管的半导体开关装置
    • US08729566B2
    • 2014-05-20
    • US13086639
    • 2011-04-14
    • Daniel DomesUwe Jansen
    • Daniel DomesUwe Jansen
    • H01L29/12
    • H03K17/063H03K2017/066H03K2017/6875Y10T29/41
    • A semiconductor switching arrangement includes a normally on semiconductor component of a first conduction type and a normally off semiconductor component of a second conduction type which is the complement of the first conduction type. A load path of the normally off semiconductor component is connected in series with the load path of the normally on semiconductor component. A first actuation circuit connected between the control connection of the normally on semiconductor component and a load path connection of the normally on semiconductor component. The load path connection of the normally on semiconductor component is arranged between the normally on and normally off semiconductor components. A second actuation circuit is connected between the control connection of the normally off semiconductor component and a load path connection of the normally off semiconductor component. The load path connection of the normally off semiconductor component is arranged between the normally on and normally off semiconductor components.
    • 半导体开关装置包括作为第一导电类型的互补的第二导电类型的常开半导体元件和第二导电类型的常关半导体元件。 常关半导体部件的负载路径与正常导通的半导体部件的负载路径串联连接。 连接在正常导通半导体部件的控制连接和正常导通的半导体部件的负载路径连接之间的第一致动电路。 正常导通的半导体部件的负载路径连接被布置在正常和常关的半导体部件之间。 第二驱动电路连接在常关半导体部件的控制连接和常关半导体部件的负载路径连接之间。 正常关闭半导体部件的负载路径连接被布置在正常关闭和常关的半导体部件之间。
    • 5. 发明申请
    • TEMPERATURE DETECTION FOR A SEMICONDUCTOR COMPONENT
    • 半导体元件的温度检测
    • US20090167414A1
    • 2009-07-02
    • US11964116
    • 2007-12-26
    • Uwe Jansen
    • Uwe Jansen
    • H03K3/42
    • G01K7/16G01K1/14G01K2217/00H01L2924/0002H03K17/08128H03K2017/0806H01L2924/00
    • Temperature detection for a semiconductor component is disclosed. One embodiment includes a circuit arrangement for measuring a junction temperature of a semiconductor component that has a gate electrode and a control terminal being connected to the gate electrode and receiving a control signal for charging and discharging the gate electrode, where the gate electrode is internally connected to the control terminal via an internal gate resistor. The circuit arrangement includes: a measuring bridge circuit including the internal gate resistor and providing a measuring voltage which is dependent on the temperature dependent resistance of the internal gate resistor; an evaluation circuit receiving the measuring voltage and providing an output signal dependent on the junction temperature; a pulse generator providing a pulse signal including pulses for partially charging or discharging the gate electrode via the internal gate resistor.
    • 公开了半导体部件的温度检测。 一个实施例包括用于测量具有栅极电极和控制端子的半导体部件的结温的电路装置,所述控制端子连接到栅电极并且接收用于对栅电极进行充电和放电的控制信号,其中栅电极在内部连接 通过内部栅极电阻连接到控制端子。 所述电路装置包括:包括所述内部栅极电阻器并提供取决于所述内部栅极电阻器的与温度相关的电阻的测量电压的测量电路电路; 接收测量电压并提供取决于结温的输出信号的评估电路; 脉冲发生器提供脉冲信号,该脉冲信号包括用于经由内部栅极电阻器部分地充电或放电栅电极的脉冲。
    • 6. 发明授权
    • Circuit assembly for gating a power semiconductor switch
    • 用于选通功率半导体开关的电路组件
    • US08212413B2
    • 2012-07-03
    • US12557026
    • 2009-09-10
    • Uwe JansenUlrich SchwarzerReinhold Bayerer
    • Uwe JansenUlrich SchwarzerReinhold Bayerer
    • H04B15/00
    • H02M1/08H01L2224/48091H01L2224/48137H01L2224/48227H01L2224/48472H01L2924/1305H01L2924/13055H01L2924/13091H01L2924/30107H01L2924/3011H01L2924/3025H02M2001/0006H03K17/567H03K2217/0081H01L2924/00014H01L2924/00
    • An embodiment of the invention relates to a circuit assembly having the following components: a power transistor with a control terminal, a first load terminal and a second load terminal, the second load terminal having a floating potential; a driver circuit configured to generate control signals for the control terminal of the power transistor, the relevant reference potential for the driver circuit being the floating potential of the second load terminal; a planar metallization layer sited on or in a substrate and comprising a constant reference potential, a shielding plane isolated from the metallization layer, sited planar on or in the substrate such that it is capacitively coupled to the metallization layer; a power supply circuit for providing a supply voltage referenced to the floating potential of the second load terminal for the driver circuit, the power supply circuit comprising, circuited between the second load terminal and the shielding plane, a first series circuit including a first capacitor and a first diode.
    • 本发明的实施例涉及具有以下部件的电路组件:具有控制端子的功率晶体管,第一负载端子和第二负载端子,所述第二负载端子具有浮置电位; 驱动电路,其被配置为产生用于所述功率晶体管的控制端子的控制信号,所述驱动电路的相关参考电位是所述第二负载端子的浮置电位; 平面金属化层位于衬底上或衬底中,并且包括恒定的参考电位,与金属化层隔离的屏蔽平面位于衬底上或衬底中,使得其电容耦合到金属化层; 电源电路,用于提供参考用于驱动电路的第二负载端子的浮动电位的电源电压,所述电源电路包括在第二负载端子和屏蔽平面之间的第二串联电路,第一串联电路包括第一电容器和 第一个二极管。