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    • 2. 发明授权
    • Interconnect assemblies and methods
    • 互连组件和方法
    • US06713374B2
    • 2004-03-30
    • US09752640
    • 2000-12-29
    • Benjamin N. EldridgeGaetan Mathieu
    • Benjamin N. EldridgeGaetan Mathieu
    • H01L2144
    • H01L23/4822H01L24/01H01L2924/01005H01L2924/01006H01L2924/01029H01L2924/12042H01L2924/14H01L2924/00
    • An interconnect assembly and methods for making and using the assembly. An exemplary embodiment of an aspect of the invention includes a contact element which includes a base portion adapted to be adhered to a substrate and a beam portion connected to and extending from the base portion. The beam portion is designed to have a geometry which substantially optimizes stress across the beam portion when deflected (e.g. it is triangular in shape) and is adapted to be freestanding. An exemplary embodiment of another aspect of the invention involves a method for forming a contact element. This method includes forming a base portion to adhere to a substrate of an electrical assembly and forming a beam portion connected to the base portion. The beam portion extends from the base portion and is designed to have a geometry which substantially evenly distributes stress across the beam portion when deflected and is adapted to be freestanding. It will be appreciated that in certain embodiments of the invention, a plurality of contact elements are used together to create an interconnect assembly. Various other assemblies and methods are also described below in conjunction with the following figures.
    • 互连组件和用于制造和使用组件的方法。 本发明的一个方面的示例性实施例包括接触元件,其包括适于粘附到基底的基部和连接到基部并从基部延伸的梁部。 梁部分被设计成具有几何形状,当偏转(例如,其形状为三角形)时,几何形状基本上优化横梁部分上的应力,并且适于独立。 本发明的另一方面的示例性实施例涉及形成接触元件的方法。 该方法包括形成基部以粘附到电气组件的基板并形成连接到基部的梁部分。 梁部分从基部延伸并且被设计成具有几何形状,当几何形状偏转时基本上均匀地分布横梁部分的应力,并适于独立。 应当理解,在本发明的某些实施例中,多个接触元件一起用于产生互连组件。 下面结合以下附图描述各种其它组件和方法。
    • 5. 发明授权
    • Electronic component overlapping dice of unsingulated semiconductor wafer
    • 电子元件重叠的半导体晶片的重叠芯片
    • US06664628B2
    • 2003-12-16
    • US09971981
    • 2001-10-04
    • Igor Y. KhandrosDavid V. PedersenBenjamin N. EldridgeRichard S. RoyGaetan Mathieu
    • Igor Y. KhandrosDavid V. PedersenBenjamin N. EldridgeRichard S. RoyGaetan Mathieu
    • H01L21301
    • H01L24/06H01L23/50H01L25/0652H01L2224/0401H01L2224/04042H01L2224/05599H01L2224/06136H01L2224/1134H01L2224/131H01L2224/16H01L2224/85399H01L2924/00013H01L2924/00014H01L2924/01005H01L2924/01006H01L2924/01014H01L2924/01027H01L2924/01033H01L2924/01039H01L2924/01082H01L2924/014H01L2924/14H01L2924/15787H01L2924/19041H01L2924/3025H01L2224/13099H01L2224/45099H01L2924/00
    • The present invention provides an ancillary electrical component in very close proximity to a semiconductor device, preferably mounted directly to the semiconductor device. In one preferred embodiment, the ancillary electrical component is a capacitor. In a preferred embodiment, a terminal is provided on the semiconductor device such that the capacitor can be electrically connected directly to the terminals, as by soldering or with conductive epoxy. Connecting the capacitor between terminals of a power loop provides superior noise and transient suppression. The very short path between the capacitor and the active circuit provides for extremely low inductance, allowing for the use of relatively small capacitors. The semiconductor device then is connected to an electronic device such as a PC board for further connection to other circuitry. One particularly preferred mode of connection is by incorporating resilient, free-standing contact structures on the same semiconductor device, with the structures standing farther away from the semiconductor and the capacitor. Other useful connectors include providing similar resilient, free-standing contact structures on the other device, then positioning the semiconductor over the resilient contacts and securing the two devices together. A socket with such resilient structures is particularly useful for this application. In an alternative preferred embodiment, the capacitor and resilient contacts all are incorporated in the second device, such as a socket. In one aspect of the invention, the ancillary electrical component may include a travel stop structure which defines a minimum separation between the semiconductor and a substrate such as a printed circuit board.
    • 本发明提供了非常接近半导体器件的辅助电气部件,优选地直接安装在半导体器件上。 在一个优选实施例中,辅助电气部件是电容器。 在优选实施例中,端子设置在半导体器件上,使得电容器可以通过焊接或与导电环氧树脂直接电连接到端子。 在电源回路端子之间连接电容器可提供卓越的噪声和瞬态抑制。 电容器和有源电路之间的非常短的路径提供极低的电感,允许使用相对较小的电容器。 然后,半导体器件连接到诸如PC板的电子设备,用于进一步连接到其它电路。 一个特别优选的连接方式是通过在相同的半导体器件上并入弹性,独立的接触结构,其结构远离半导体和电容器。 其他有用的连接器包括在另一装置上提供类似的弹性,独立的接触结构,然后将半导体定位在弹性触点上并将两个装置固定在一起。 具有这种弹性结构的插座对于该应用特别有用。 在替代的优选实施例中,电容器和弹性触点都被并入第二装置,例如插座。 在本发明的一个方面,辅助电气部件可以包括限定半导体和诸如印刷电路板的基板之间的最小间隔的行进止动结构。
    • 6. 发明申请
    • WIRING SUBSTRATE WITH CUSTOMIZATION LAYERS
    • 带有自定义层的布线基板
    • US20110214910A1
    • 2011-09-08
    • US12719136
    • 2010-03-08
    • Benjamin N. EldridgeGaetan L. Mathieu
    • Benjamin N. EldridgeGaetan L. Mathieu
    • H05K1/00H05K1/11H05K3/12H05K3/42H05K3/46
    • H05K3/4664H05K3/1241H05K3/4015H05K3/4046H05K3/4647H05K2203/049Y10T29/49155Y10T29/49165
    • One or more customization layers can be added to a wiring substrate. The customization layers can provide customized electrical connections from electrical contacts of the base wiring substrate to electrical contacts at an outer surface of the customization layers, which can allow the contacts at the outer surface of the customization layers can be in a different pattern than the contacts at the surface of the base wiring substrate. The customization layers can comprise electrically insulating material, electrically conductive via structures through the insulating material, electrically conductive traces, electrically conductive jumpers electrically connecting two traces without contacting a trace disposed between the two traces, and/or other such elements. A jumper can be formed by making a relatively small deposit of electrically insulating material between the two traces to be connected and then making a relatively small deposit of electrically conductive material on parts of the two traces and the insulating material. Via structures can be coupled to traces and an insulating material can be cast around the via structures. Alternatively, via structures can be formed in openings with sloped side walls in an insulating layer.
    • 可以将一个或多个定制层添加到布线基板。 定制层可以提供从基底布线基板的电触点到定制层外表面处的电触点的定制电连接,这允许定制层外表面处的触点可以与触点不同的图案 在基极配线基板的表面。 定制层可以包括电绝缘材料,通过绝缘材料的导电通孔结构,导电迹线,电连接两个迹线的导电跳线,而不接触设置在两个迹线之间的迹线和/或其它这样的元件。 可以通过在要连接的两个迹线之间形成相对较小的电绝缘材料沉积,然后在两个迹线和绝缘材料的部分上形成相对较小的导电材料沉积物来形成跳线。 通孔结构可以耦合到迹线,并且绝缘材料可以围绕通孔结构铸造。 或者,通孔结构可以形成在具有绝缘层中的倾斜侧壁的开口中。
    • 9. 发明授权
    • Method and system for designing a probe card
    • 探针卡设计方法及系统
    • US07930219B2
    • 2011-04-19
    • US12564799
    • 2009-09-22
    • Benjamin N. EldridgeMark W. BrandemuehlStefan GraefYves Parent
    • Benjamin N. EldridgeMark W. BrandemuehlStefan GraefYves Parent
    • G06Q30/00
    • G01R3/00G01R1/073G01R1/07342G06Q30/0609G06Q30/0621G06Q30/0633G06Q50/188
    • A method and system for designing a probe card from data provided by prospective customers via the Internet is provided. Design specifications are entered into the system by prospective customers and compiled into a database. The collective feasibility of each set of design specifications is determined by an automated computer system and communicated to the prospective customer. If feasible, additional software enables prospective customers to create verification packages according to their respective design specifications. These verification packages further consist of drawing files visually describing the final design and verification files confirming wafer bonding pad data. Verification packages are reviewed and forwarded to an applications engineer after customer approval. An interactive simulation of probe card performance is also provided. Data on probe card performance is incorporated into an overall modeling exercise, which includes not only the probe card, but data on the device(s) under test and wafer, as well as data on automated test equipment.
    • 提供了一种通过互联网从潜在客户提供的数据设计探针卡的方法和系统。 设计规范由潜在客户输入系统并编译成数据库。 每套设计规范的集体可行性由自动化计算机系统确定,并传达给潜在客户。 如果可行,附加软件可使潜在客户根据各自的设计规范创建验证包。 这些验证包还包括可视化地描述确认晶圆键合焊盘数据的最终设计和验证文件的绘图文件。 在客户批准后,验证包将被审核并转发给应用工程师。 还提供了探针卡性能的交互式仿真。 探针卡性能数据被纳入整体建模练习中,其中不仅包括探针卡,还包括被测设备和晶片上的数据,以及自动测试设备的数据。