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    • 2. 发明申请
    • Implementation of LDPC (Low Density Parity Check) decoder by sweeping through sub-matrices
    • 通过扫描子矩阵实现LDPC(低密度奇偶校验)解码器
    • US20070157062A1
    • 2007-07-05
    • US11360268
    • 2006-02-23
    • Tak LeeHau TranBa-Zhong ShenKelly Cameron
    • Tak LeeHau TranBa-Zhong ShenKelly Cameron
    • H03M13/00
    • H03M13/116H03M13/1137H03M13/255H03M13/27H03M13/6362H03M13/6566
    • Implementation of LDPC (Low Density Parity Check) decoder by sweeping through sub-matrices. A novel approach is presented by which an LDPC coded signal is decoded processing the columns and rows of the individual sub-matrices of the low density parity check matrix corresponding to the LDPC code. The low density parity check matrix can partitioned into rows and columns according to each of the sub-matrices of it, and each of those sub-matrices also includes corresponding rows and columns. For example, when performing bit node processing, the same columns of at 1 or more sub-matrices can be processed together (e.g., all 1st columns in 1 or more sub-matrices, all 2nd columns in 1 or more sub-matrices, etc.). Analogously, when performing check node processing, the same rows of 1 or more sub-matrices can be processed together (e.g., all 1st rows in 1 or more sub-matrices, all 2nd rows in 1 or more sub-matrices, etc.).
    • 通过扫描子矩阵实现LDPC(低密度奇偶校验)解码器。 提出了一种解码处理与LDPC码对应的低密度奇偶校验矩阵的各个子矩阵的列和行的LDPC编码信号的新方法。 低密度奇偶校验矩阵可以根据它的每个子矩阵划分成行和列,并且这些子矩阵中的每一个也包括相应的行和列。 例如,当执行位节点处理时,可以一起处理1个或更多个子矩阵的相同列(例如,1个或更多个子矩阵中的所有1个SUP列,全部2个SUP 1个或更多个子矩阵中的 / nd>列等)。 类似地,当执行校验节点处理时,可以一起处理1个或更多个子矩阵的相同行(例如,1个或更多个子矩阵中的所有1 行,全部2个 1个或多个子矩阵中的行等)。
    • 3. 发明申请
    • Sub-matrix-based implementation of LDPC (Low Density Parity Check ) decoder
    • LDPC(低密度奇偶校验)解码器的基于子矩阵的实现
    • US20070157061A1
    • 2007-07-05
    • US11360267
    • 2006-02-23
    • Tak LeeHau TranBa-Zhong ShenKelly Cameron
    • Tak LeeHau TranBa-Zhong ShenKelly Cameron
    • H03M13/00
    • H03M13/116H03M13/1137H03M13/255H03M13/27H03M13/6362H03M13/6566
    • Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder. A novel approach is presented by which an LDPC coded signal is decoded by processing 1 sub-matrix at a time. A low density parity check matrix corresponding to the LDPC code includes rows and columns of sub-matrices. For example, when performing bit node processing, 1 or more sub-matrices in a column are processed; when performing check node processing, 1 or more sub-matrices in a row are processed. If desired, when performing bit node processing, the sub-matrices in each column are successively processed together (e.g., all column 1 sub-matrices, all column 2 sub-matrices, etc.). Analogously, when performing check node processing, the sub-matrices in each row can be successively processed together (e.g., all row 1 sub-matrices, all row 2 sub-matrices in row 2, etc.).
    • LDPC(低密度奇偶校验)解码器的基于子矩阵的实现。 提出了一种新颖的方法,通过该方法通过一次处理1个子矩阵对LDPC编码信号进行解码。 对应于LDPC码的低密度奇偶校验矩阵包括子矩阵的行和列。 例如,当执行位节点处理时,处理列中的一个或多个子矩阵; 当执行校验节点处理时,处理一行中的一个或多个子矩阵。 如果需要,当执行位节点处理时,每列中的子矩阵被连续处理(例如,所有列1个子矩阵,全部2个子矩阵等)。 类似地,当执行校验节点处理时,可以一起连续地处理每行中的子矩阵(例如,所有行1子矩阵,行2中的所有行2子矩阵等)。
    • 5. 发明申请
    • Partial-parallel implementation of LDPC (low density parity check) decoders
    • LDPC(低密度奇偶校验)解码器的部分并行实现
    • US20070127387A1
    • 2007-06-07
    • US11323901
    • 2005-12-30
    • Tak LeeHau TranBa-Zhong ShenKelly Cameron
    • Tak LeeHau TranBa-Zhong ShenKelly Cameron
    • H04J1/16
    • H04L1/0052H03M13/1111H03M13/1137H03M13/114H03M13/255H03M13/27H04L1/0057
    • Partial-parallel implementation of LDPC (Low Density Parity Check) decoder. A novel approach is presented by which a selected number of cycles is performed during each of bit node processing and check node processing when performing error correction decoding of an LDPC coded signal. The number of cycles of each of bit node processing and check node processing need not be the same. At least one functional block, component, portion of hardware, or calculation can be used during both of the bit node processing and check node processing thereby conserving space with an efficient use of processing resources. At a minimum, a semi-parallel approach can be performed where 2 cycles are performed during each of bit node processing and check node processing. Alternatively, more than 2 cycles can be performed for each of bit node processing and check node processing.
    • LDPC(低密度奇偶校验)解码器的部分并行实现。 提出了一种新颖的方法,通过该方法在对LDPC编码信号执行纠错解码时,在每个位节点处理和校验节点处理期间执行所选择的周期数。 每个位节点处理和校验节点处理的周期数不必相同。 可以在比特节点处理和校验节点处理两者期间使用至少一个功能块,组件,硬件部分或计算,从而通过有效利用处理资源来节省空间。 至少可以执行在每个位节点处理和校验节点处理期间执行2个周期的半并行方法。 或者,可以对比特节点处理和校验节点处理中的每一个执行多于2个周期。
    • 7. 发明申请
    • Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices
    • 具有具有CSI(循环移位标识)子矩阵的相应奇偶校验矩阵的LDPC(低密度奇偶校验)码的有效构造
    • US20070033480A1
    • 2007-02-08
    • US11472226
    • 2006-06-21
    • Tak LeeBa-Zhong ShenKelly CameronHau Tran
    • Tak LeeBa-Zhong ShenKelly CameronHau Tran
    • H03M13/00
    • H03M13/11
    • Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices. These constructed LDPC codes can be implemented in multiple-input-multiple-output (MIMO) communication systems. One LDPC code construction approach uses CSI sub-matrix shift values whose shift values are checked instead of non-zero element positions within the parity check matrix (or its corresponding sub-matrices). When designing an LDPC code, this approach is efficient to find and avoid cycles (or loops) in the LDPC code's corresponding bipartite graph. Another approach involves GRS (Generalized Reed-Solomon) code based LDPC code construction. These LDPC codes can be implemented in a wide variety of communication devices, including those implemented in wireless communication systems that comply with the recommendation practices and standards being developed by the IEEE 802.11n Task Group (i.e., the Task Group that is working to develop a standard for 802.11 TGn (High Throughput)).
    • 具有具有CSI(循环移位身份)子矩阵的相应奇偶校验矩阵的LDPC(低密度奇偶校验)码的高效构造。 这些构造的LDPC码可以在多输入多输出(MIMO)通信系统中实现。 一种LDPC码构造方法使用CSI子矩阵移位值,其移位值被检查,而不是奇偶校验矩阵(或其对应的子矩阵)内的非零元素位置。 当设计LDPC码时,该方法在LDPC码的相应二分图中找到并避免周期(或循环)是有效的。 另一种方法涉及基于GRS(Generalized Reed-Solomon)代码的LDPC码构造。 这些LDPC码可以在各种各样的通信设备中实现,包括在符合由IEEE 802.11n任务组(即正在努力开发的任务组)的建议实践和标准的无线通信系统中实现的通信设备 802.11 TGn(高吞吐量)标准)。
    • 8. 发明申请
    • Construction of irregular LDPC (low density parity check) codes using RS (Reed-Solomon) codes or GRS (generalized Reed-Solomon) code
    • 使用RS(里德 - 所罗门)码或GRS(广义里德 - 所罗门)码构造不规则LDPC(低密度奇偶校验)码
    • US20060156168A1
    • 2006-07-13
    • US11264997
    • 2005-11-02
    • Ba-Zhong ShenKelly CameronTak LeeHau Tran
    • Ba-Zhong ShenKelly CameronTak LeeHau Tran
    • H03M13/00
    • H03M13/116H03M13/1148H03M13/255H03M13/6362
    • Construction of Irregular LDPC (Low Density Parity Check) codes using RS (Reed-Solomon) codes or GRS (Generalized Reed-Solomon) codes. A novel approach is presented by which a wide variety of irregular LDPC codes may be generated using GRS or RS codes. These irregular LDPC codes can provide better overall performance than regular LDPC codes in terms of providing for lower BER (Bit Error Rate) as a function of SNR (Signal to Noise Ratio). Such an irregular LDPC code may be appropriately designed using these principles thereby generating a code that is suitable for use in wireless communication systems including those that comply with the recommendation practices and standards being developed by the IEEE (Institute of Electrical & Electronics Engineers) 802.11n Task Group (i.e., the Task Group that is working to develop a standard for 802.11 TGn (High Throughput)).
    • 使用RS(里德 - 所罗门)代码或GRS(广义里德 - 所罗门)代码构建不规则LDPC(低密度奇偶校验)码。 提出了一种新颖的方法,通过该方法可以使用GRS或RS代码生成各种不规则LDPC码。 在提供作为SNR(信噪比)的函数的较低BER(误码率)方面,这些不规则LDPC码可以提供比常规LDPC码更好的总体性能。 可以使用这些原理来适当地设计这样的不规则LDPC码,从而生成适合于无线通信系统中使用的代码,包括符合IEEE(Institute of Electrical&Electronics Engineers)802.11n的建议实践和标准的代码 任务组(即正在努力制定802.11 TGn(高吞吐量)标准的任务组)。