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1. 发明申请

WO2011063111A2 AN EFFICIENT EXTERNAL CHARGER FOR CHARGING A PLURALITY OF IMPLANTABLE MEDICAL DEVICES 审中-公开
标题翻译：有效的外部充电器，用于充电多种可植入医疗器械
公开(公告)号：WO2011063111A2
公开(公告)日：2011-05-26
申请号：PCT/US2010/057212
申请日：2010-11-18
申请人： BOSTON SCIENTIFIC NEUROMODULATION CORPORATION , CARBUNARU, Rafael , PARRAMON, Jordi , OZAWA, Robert , SHI, Jess , CHEN, Joey , RAHMAN, Mizanur
发明人： CARBUNARU, Rafael , PARRAMON, Jordi , OZAWA, Robert , SHI, Jess , CHEN, Joey , RAHMAN, Mizanur
IPC分类号： A61N1/378
CPC分类号： A61N1/3787 , A61N1/37223 , A61N1/37288
摘要： An improved external charger for a battery in an implantable medical device (implant), and technique for charging batteries in multiple implants using such improved external charger, is disclosed. During charging, values for a parameter measured in the implants are reported from the implants to the external charger. The external charger infers from the magnitudes of the parameters which of the implants has the highest and lowest coupling to the external charger, and so designates those implants as "hot" and "cold." The intensity of the magnetic charging field is optimized for the cold implant consistent with the simulation to ensure that that the cold implant is charged with a maximum (fastest) battery charging current. The duty cycle of the magnetic charging field is also optimized for the hot implant consistent with the simulation to ensure that the hot implant does not exceed the power dissipation limit. As a result, charging is optimized to be fast for all of the implants, while still safe from a tissue heating perspective.
摘要翻译：公开了一种用于可植入医疗装置（植入物）中的电池的改进的外部充电器，以及使用这种改进的外部充电器为多个植入物中的电池充电的技术。在充电期间，在植入物中测量的参数的值从植入物报告给外部充电器。外部充电器从参数的大小推断出植入物具有最高和最低耦合到外部充电器的参数，因此将这些植入物称为“热”和“冷”。对于与模拟一致的冷植入物，磁充电场的强度被优化，以确保冷植入物以最大（最快）的电池充电电流充电。对于与模拟一致的热注入，磁充电场的占空比也被优化，以确保热植入不超过功率耗散极限。因此，对于所有植入物，充电被优化为快速，同时从组织加热的角度来看仍然是安全的。

2. 发明申请

WO2013109603A1 ARCHITECTURES FOR AN IMPLANTABLE STIMULATOR DEVICE HAVING A PLURALITY OF ELECTRODE DRIVER INTEGRATED CIRCUITS WITH SHORTED ELECTRODE OUTPUTS 审中-公开
标题翻译：具有多个具有短路电极输出的电极驱动器集成电路的可植入刺激装置的结构
公开(公告)号：WO2013109603A1
公开(公告)日：2013-07-25
申请号：PCT/US2013/021703
申请日：2013-01-16
申请人： BOSTON SCIENTIFIC NEUROMODULATION CORPORATION
发明人： FELDMAN, Emanuel , PARRAMON, Jordi , GRIFFITH, Paul, J. , SHI, Jess , TONG, Robert , MARNFELDT, Goran
IPC分类号： A61N1/36
CPC分类号： A61N1/36125 , A61N1/05 , A61N1/0534 , A61N1/36171 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： Disclosed is a new architecture for an IPG having a master and slave electrode driver integrated circuits. The electrode outputs on the integrated circuits are wired together. Each integrated circuit can be programmed to provide pulses with different frequencies. Active timing channels in each of the master and slave integrated circuits are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other integrated circuit so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.
摘要翻译：公开了一种用于具有主电极驱动器和从属电极驱动器集成电路的IPG的新架构。集成电路上的电极输出连接在一起。每个集成电路都可以编程为提供不同频率的脉冲。每个主集成电路和从属集成电路中的主动定时通道被编程以提供期望的脉冲，而主机和从机中的影子定时通道被来自另一个集成电路中的有效定时通道的定时数据编程，使得每个芯片知道当另一个提供脉冲时，使得每个芯片可以禁用其恢复电路，以便不击败那些脉冲。在给定电极处脉冲重叠的情况下，每个芯片提供的电流将在受影响的电极处增加。即使在脉冲重叠的时期，合格电压的产生也是由算法来确定最佳柔顺电压的。

3. 发明申请

WO2013173010A1 PULSE-BY-PULSE COMPLIANCE VOLTAGE GENERATION FOR AN IMPLANTABLE STIMULATOR 审中-公开
标题翻译：脉冲激光脉冲串联脉动电压生成
公开(公告)号：WO2013173010A1
公开(公告)日：2013-11-21
申请号：PCT/US2013/036369
申请日：2013-04-12
申请人： BOSTON SCIENTIFIC NEUROMODULATION CORPORATION
发明人： MARNFELDT, Goran , SHI, Jess
IPC分类号： A61N1/37 , A61N1/378 , A61N1/08 , H03L1/00
CPC分类号： A61N1/36153 , A61N1/025 , A61N1/08 , A61N1/3605 , A61N1/36146 , A61N1/37 , A61N1/378 , H03L1/00
摘要： Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.
摘要翻译：用于在所公开的可植入刺激器装置中产生用于电流源和/或接收器的顺应性电压（V +）的电路。电路评估V +对于给定脉冲是否是最佳的，如果不是，则调整下一个脉冲的V +。该电路使用放大器在脉冲期间的适当时间测量有源PDAC（电流源）和NDAC（电流吸收）之间的电压降。评估测量的电压以确定它们相对于最佳值是高还是低。如果低电平，则控制V +调节器以增加下一个脉冲的V +; 如果不是，则控制V +调节器以降低下一个脉冲的V +。通过这种方法，可以考虑在种植体环境中可能发生的逐渐变化，V +在逐脉冲的基础上进行调整，以保持电压降至或接近最佳水平，以实现高效的DAC操作。

4. 发明公开

EP2804664A1 ARCHITECTURES FOR AN IMPLANTABLE STIMULATOR DEVICE HAVING A PLURALITY OF ELECTRODE DRIVER INTEGRATED CIRCUITS WITH SHORTED ELECTRODE OUTPUTS 有权
标题翻译：架构来与铅DRIVER SHORT CLOSED电极输出与多个集成电路AN植入刺激
公开(公告)号：EP2804664A1
公开(公告)日：2014-11-26
申请号：EP13702540.9
申请日：2013-01-16
申请人： Boston Scientific Neuromodulation Corporation
发明人： FELDMAN, Emanuel , PARRAMON, Jordi , GRIFFITH, Paul, J. , SHI, Jess , TONG, Robert , MARNFELDT, Goran
IPC分类号： A61N1/36
CPC分类号： A61N1/36125 , A61N1/05 , A61N1/0534 , A61N1/36171 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： Disclosed is a new architecture for an IPG having a master and slave electrode driver integrated circuits. The electrode outputs on the integrated circuits are wired together. Each integrated circuit can be programmed to provide pulses with different frequencies. Active timing channels in each of the master and slave integrated circuits are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other integrated circuit so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.
摘要翻译：公开了一种用于在IPG具有主从电极驱动器集成电路的新架构。上的集成电路的电极输出被连接在一起。每个集成电路可以被编程以不同的频率，以提供脉冲。在每个主设备和从集成电路的活性定时通道被编程以提供所需的脉冲，而在主设备和从阴影定时信道与所述定时数据从其他集成电路中的活性定时通道编程，以便做每个芯片都知道当另一种是提供一个脉冲，如此做了每个芯片可以禁用它的恢复电路，以便不挫败那些脉冲。在给定电极的脉冲重叠的情况下，由每个芯片提供的电流将增加在受影响的电极。顺从电压生成是通过在算法口述即使在周期找到在最佳的顺从电压脉冲时是重叠的。

5. 发明公开

EP4218918A1 ARCHITECTURES FOR AN IMPLANTABLE STIMULATOR DEVICE HAVING A PLURALITY OF ELECTRODE DRIVER INTEGRATED CIRCUITS WITH SHORTED ELECTRODE OUTPUTS 审中-实审
公开(公告)号：EP4218918A1
公开(公告)日：2023-08-02
申请号：EP23160858.9
申请日：2013-01-16
申请人： Boston Scientific Neuromodulation Corporation
发明人： FELDMAN, Emanuel , PARRAMON, Jordi , GRIFFITH, Paul J. , SHI, Jess , TONG, Robert , MARNFELDT, Goran
IPC分类号： A61N1/36
摘要： The present invention discloses an implantable stimulator device, comprising a conductive case; a first electrode array; a second electrode array; a first integrated circuit within the conductive case, wherein the first integrated circuit is configured to provide first current pulses at a first frequency to cause a first current to flow between the first electrode array and the case; and a second integrated circuit within the conductive case, wherein the second integrated circuit is configured to provide second current pulses at a second frequency to cause a second current to flow between the second electrode array and the case, wherein the first and second current pulses can overlap in time.

6. 发明公开

EP2504058A2 AN EFFICIENT EXTERNAL CHARGER FOR CHARGING A PLURALITY OF IMPLANTABLE MEDICAL DEVICES 审中-公开
标题翻译：高效外部充电器进行充电多植入式医疗设备
公开(公告)号：EP2504058A2
公开(公告)日：2012-10-03
申请号：EP10784387.2
申请日：2010-11-18
申请人： Boston Scientific Neuromodulation Corporation
发明人： CARBUNARU, Rafael , PARRAMON, Jordi , OZAWA, Robert , SHI, Jess , CHEN, Joey , RAHMAN, Mizanur
IPC分类号： A61N1/378
CPC分类号： A61N1/3787 , A61N1/37223 , A61N1/37288
摘要： An improved external charger for a battery in an implantable medical device (implant), and technique for charging batteries in multiple implants using such improved external charger, is disclosed. During charging, values for a parameter measured in the implants are reported from the implants to the external charger. The external charger infers from the magnitudes of the parameters which of the implants has the highest and lowest coupling to the external charger, and so designates those implants as "hot" and "cold." The intensity of the magnetic charging field is optimized for the cold implant consistent with the simulation to ensure that that the cold implant is charged with a maximum (fastest) battery charging current. The duty cycle of the magnetic charging field is also optimized for the hot implant consistent with the simulation to ensure that the hot implant does not exceed the power dissipation limit. As a result, charging is optimized to be fast for all of the implants, while still safe from a tissue heating perspective.

7. 发明授权

EP2804664B1 ARCHITECTURES FOR AN IMPLANTABLE STIMULATOR DEVICE HAVING A PLURALITY OF ELECTRODE DRIVER INTEGRATED CIRCUITS WITH SHORTED ELECTRODE OUTPUTS 有权
标题翻译：具有多个电极驱动器集成电路并具有短路电极输出的植入式刺激器装置的结构
公开(公告)号：EP2804664B1
公开(公告)日：2017-10-04
申请号：EP13702540.9
申请日：2013-01-16
申请人： Boston Scientific Neuromodulation Corporation
发明人： FELDMAN, Emanuel , PARRAMON, Jordi , GRIFFITH, Paul, J. , SHI, Jess , TONG, Robert , MARNFELDT, Goran
IPC分类号： A61N1/36
CPC分类号： A61N1/36125 , A61N1/05 , A61N1/0534 , A61N1/36171 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00

8. 发明公开

EP2849842A1 PULSE-BY-PULSE COMPLIANCE VOLTAGE GENERATION FOR AN IMPLANTABLE STIMULATOR 有权
标题翻译： PULSE WAY负担功率发生器植入刺激
公开(公告)号：EP2849842A1
公开(公告)日：2015-03-25
申请号：EP13721147.0
申请日：2013-04-12
申请人： Boston Scientific Neuromodulation Corporation
发明人： MARNFELDT, Goran , SHI, Jess
IPC分类号： A61N1/37 , A61N1/378 , A61N1/08 , H03L1/00
CPC分类号： A61N1/36153 , A61N1/025 , A61N1/08 , A61N1/3605 , A61N1/36146 , A61N1/37 , A61N1/378 , H03L1/00
摘要： Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.

9. 发明公开

EP3281670A1 ARCHITECTURES FOR AN IMPLANTABLE STIMULATOR DEVICE HAVING A PLURALITY OF ELECTRODE DRIVER INTEGRATED CIRCUITS WITH SHORTED ELECTRODE OUTPUTS 有权
公开(公告)号：EP3281670A1
公开(公告)日：2018-02-14
申请号：EP17186448.1
申请日：2013-01-16
申请人： Boston Scientific Neuromodulation Corporation
发明人： FELDMAN, Emanuel , PARRAMON, Jordi , GRIFFITH, Paul, J. , SHI, Jess , TONG, Robert , MARNFELDT, Goran
IPC分类号： A61N1/36
CPC分类号： A61N1/36125 , A61N1/05 , A61N1/0534 , A61N1/36171 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： Disclosed is a new architecture for an IPG having a master and slave electrode driver integrated circuits. The electrode outputs on the integrated circuits are wired together. Each integrated circuit can be programmed to provide pulses with different frequencies. Active timing channels in each of the master and slave integrated circuits are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other integrated circuit so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

10. 发明授权

EP2849842B1 PULSE-BY-PULSE COMPLIANCE VOLTAGE GENERATION FOR AN IMPLANTABLE STIMULATOR 有权
标题翻译：植入式脉冲调制器的逐脉冲顺从电压生成
公开(公告)号：EP2849842B1
公开(公告)日：2017-05-17
申请号：EP13721147.0
申请日：2013-04-12
申请人： Boston Scientific Neuromodulation Corporation
发明人： MARNFELDT, Goran , SHI, Jess
IPC分类号： A61N1/37 , A61N1/378 , A61N1/08 , H03L1/00
CPC分类号： A61N1/36153 , A61N1/025 , A61N1/08 , A61N1/3605 , A61N1/36146 , A61N1/37 , A61N1/378 , H03L1/00
摘要： Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.
摘要翻译：所公开的用于为植入式刺激器装置中的电流源和/或汇流片生成柔性电压（V +）的电路。电路评估V +对于给定脉冲是否最佳，如果不是，则调整下一个脉冲的V +。该电路使用放大器在脉冲期间的适当时间测量活动PDAC（电流源）和NDAC（电流吸收器）两端的电压降。测量的电压被评估以确定它们相对于最优值是高还是低。如果为低电平，则控制V +调节器以增加下一个脉冲的V +电压; 如果不是，则控制V +调节器以降低下一个脉冲的V +。通过这种方法，植入环境中可能发生的逐渐变化可以被考虑，V +在逐个脉冲的基础上进行调整，以保持电压下降到或接近最佳水平以进行有效的DAC操作。

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