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1. 发明申请

US20130206757A1 STRUCTURE FOR FUEL FILLER TUBE OPENING 审中-公开
标题翻译：燃料填充管开放结构
公开(公告)号：US20130206757A1
公开(公告)日：2013-08-15
申请号：US13878660
申请日：2011-09-22
申请人： Yukihiko Nagai , Shiro Yagi , Atsushi Ohba
发明人： Yukihiko Nagai , Shiro Yagi , Atsushi Ohba
IPC分类号： B60K15/04
CPC分类号： B60K15/04 , B60K15/0406 , B60K15/05 , B60K2015/0422 , B60K2015/0454 , B60K2015/053
摘要： A structure for a fuel filler tube opening comprises: a fuel adapter (17) having a filler tube opening (15); a fuel lid (16) for closing an opening (13) formed in a vehicle body (27); and a protective cover (32) provided on an inner surface (31) of the fuel lid (16). The protective cover (32) is separated by the distance (d) from an insertion opening (24) of the filler tube opening (15) and surrounds the insertion opening (24).
摘要翻译：一种用于燃料加注管开口的结构，包括：具有加注管开口（15）的燃料适配器（17）; 用于关闭形成在车体（27）中的开口（13）的燃料盖（16）; 以及设置在燃料盖（16）的内表面（31）上的保护罩（32）。保护罩（32）与填充管开口（15）的插入开口（24）间隔开距离（d）并且包围插入开口（24）。

2. 发明授权

US06870771B2 Nonvolatile semiconductor memory device that can suppress effect of threshold voltage variation of memory cell transistor 失效
标题翻译：可以抑制存储单元晶体管的阈值电压变化的非易失性半导体存储器件
公开(公告)号：US06870771B2
公开(公告)日：2005-03-22
申请号：US10200773
申请日：2002-07-24
申请人： Mitsuhiro Tomoeda , Atsushi Ohba , Toshimasa Makino
发明人： Mitsuhiro Tomoeda , Atsushi Ohba , Toshimasa Makino
IPC分类号： G11C16/02 , G11C16/06 , G11C16/14 , G11C16/16 , G11C16/34
CPC分类号： G11C16/3445 , G11C16/14 , G11C16/16 , G11C16/344
摘要： In a memory block that is to be subjected to an erasure operation, voltage of the ground level is selectively supplied to only one word line. By applying an erasure pulse to a source line, memory cell transistors have their threshold voltages shifted. As to another word line, a pulse of a positive voltage is supplied in synchronization to the application of an erasure pulse to the source line. Another group of memory cell transistors do not have their threshold voltages shifted.
摘要翻译：在要进行擦除操作的存储器块中，选择地仅将一个字线提供接地电平的电压。通过对源极线施加擦除脉冲，存储单元晶体管的阈值电压偏移。对于另一个字线，同步地提供正电压的脉冲以向消除线施加擦除脉冲。另一组存储单元晶体管不具有偏移其阈值电压。

3. 发明授权

US06567316B1 Nonvolatile semiconductor memory device and method of erasing data of nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件和擦除非易失性半导体存储器件的数据的方法
公开(公告)号：US06567316B1
公开(公告)日：2003-05-20
申请号：US09985013
申请日：2001-11-01
申请人： Atsushi Ohba , Satoshi Shimizu , Yoshikazu Miyawaki
发明人： Atsushi Ohba , Satoshi Shimizu , Yoshikazu Miyawaki
IPC分类号： G11C1600
CPC分类号： G11C16/3409 , G11C16/3404
摘要： Operations of applying an erase pulse and further performing block program before erasure are executed in steps S2 and S3 before applying the erase pulse on a block by block basis. This narrows the distribution width of the threshold voltage, and reduces the number of the memory transistors to be subjected to over-erase verify so that a total erasing time of data of a flash memory can be reduced.
摘要翻译：在擦除脉冲之前在步骤S2和S3中执行擦除脉冲之前的施加擦除脉冲和进一步执行块程序的操作，然后逐块地应用擦除脉冲。这会使阈值电压的分布宽度变窄，并且减少要进行过擦除验证的存储晶体管的数量，从而可以减少闪速存储器的数据的总擦除时间。

4. 发明授权

US06334729B1 Cosmetic container and cartridge for cosmetic container 失效
标题翻译：用于化妆品容器的化妆品容器和药筒
公开(公告)号：US06334729B1
公开(公告)日：2002-01-01
申请号：US09701010
申请日：2000-11-22
申请人： Atsushi Ohba
发明人： Atsushi Ohba
IPC分类号： A45D4004
CPC分类号： A45D40/04 , A45D2040/204 , A45D2040/208
摘要： At least a part of a cylindrical body (20) is rotatably and unslidably housed in a front cylinder (10). A beam (30) for retaining a stick type cosmetic material (4) on the upper end side is made unrotatable and slidable to the front cylinder (10) by a sliding mechanism and made feedable by a rotation together with the cylindrical body (20) by a feeding mechanism. The beam (30) is always urged downward by a return spring (6). It is arranged such that a lower end part of the cylindrical body (20) is at the same level as that of a lower end part of the front cylinder (10) and a synchronous engagement section (26) formed on an inner circumferential surface of a lower end part of the cylindrical body (20) is synchronously engaged with a synchronous engagement shaft 43 provided at a bottom (42) of a container body (2). An O-ring (5) is installed between the front cylinder (10) and the container body (2).
摘要翻译：圆柱体（20）的至少一部分可旋转和不可靠地容纳在前汽缸（10）中。用于在上端侧保持棒状化妆料（4）的梁（30）通过滑动机构使其不能旋转并滑动到前缸（10），并与圆筒体（20）一起旋转地进给，通过送料机构。梁（30）总是被复位弹簧（6）向下推动。其特征在于，所述圆筒体（20）的下端部与所述前筒（10）的下端部的下端部相同，所述同步接合部（26）形成在所述前筒圆柱体（20）的下端部与设置在容器主体（2）的底部（42）的同步接合轴43同步地接合。 O形环（5）安装在前汽缸（10）和容器主体（2）之间。

5. 发明授权

US06270273B1 Liquid cosmetic container 失效
标题翻译：液体化妆品容器
公开(公告)号：US06270273B1
公开(公告)日：2001-08-07
申请号：US09581425
申请日：2000-06-13
申请人： Atsushi Ohba
发明人： Atsushi Ohba
IPC分类号： A46B1100
CPC分类号： A45D34/047
摘要： A liquid cosmetic container which has a secure mechanism for defining the limit of the aperture regulation of a remover 13 is provided. In addition, the degree of aperture of the remover 13 is not influenced by the operation of putting or removing a cap 3. The liquid cosmetic container is provided with the cap 3, and an aperture-regulating ring 7 engages with an upper outer face of a container main body 19. A neck 5 which has an aperture regulating section 11 on the rear end moves in an axial direction in response to rotations of the aperture-regulating ring 7, thereby varying the diameter of a central aperture 119 of the remover 13. Furthermore a rotation-limiting piece 103 extends from a lower end of the aperture-regulating ring 7 and a rotation-limiting projection 136 is provided on an outer face of the container main body 19 which is under an engaging surface of the aperture-regulating ring 7. The rotation of the aperture-regulating ring 7 is regulated by the contact of the rotation-limiting piece 103 with the rotation-limiting projection 136.
摘要翻译：提供了一种液体化妆品容器，其具有用于限定去除器13的孔径调节限制的固定机构。此外，除去器13的孔径的程度不受放置或取下盖子3的操作的影响。液体化妆品容器设置有盖3，孔径调节环7与容器主体19.在后端具有孔限制部11的颈部5响应于孔径调节环7的旋转而沿轴向移动，从而改变去除器13的中心孔119的直径此外，限位片103从孔径调节环7的下端延伸，并且在容器主体19的外表面上设置有旋转限制突起136，该容器主体19位于开口调节环7的接合表面下方孔限制环7的旋转通过旋转限制片103与旋转限制突起136的接触来调节。

6. 再颁专利

USRE36655E Semiconductor memory device and method for reading and writing data therein 失效
标题翻译：半导体存储器件及其中的数据读写方法
公开(公告)号：USRE36655E
公开(公告)日：2000-04-11
申请号：US917220
申请日：1997-08-25
申请人： Kunihiko Kozaru , Atsushi Ohba
发明人： Kunihiko Kozaru , Atsushi Ohba
IPC分类号： G11C11/417 , G11C7/10 , G11C11/407 , G11C11/409 , G11C7/00
CPC分类号： G11C7/1051
摘要： An NAND gate for outputting an output establishment detection signal in response to the fact that a complementary output of a latch type sense amplifier has been established is provided. When a tristate buffer is activated by signal, a word line which has been in a selected state is rendered non-selected state. Accordingly, current can be prevented from leaking from a power supply line to a ground line in tristate buffer. In addition, column current Ic flowing through memory cells can be minimized in response to the fact that word line has been set to a selected state.
摘要翻译：提供了一种用于响应于已经建立了锁存型读出放大器的互补输出的事实来输出输出建立检测信号的NAND门。当通过信号激活三态缓冲器时，已经处于选择状态的字线被呈现为非选择状态。因此，可以防止电流从三电平缓冲器中的电源线泄漏到接地线。此外，响应于字线被设置为选择状态的事实，流过存储器单元的列电流Ic可以最小化。

7. 发明授权

US5991197A Semiconductor memory device having data protection feature 失效
标题翻译：具有数据保护功能的半导体存储器件
公开(公告)号：US5991197A
公开(公告)日：1999-11-23
申请号：US46583
申请日：1998-03-24
申请人： Taku Ogura , Atsushi Ohba , Tsuyoshi Honma , Kazuo Kobayashi
发明人： Taku Ogura , Atsushi Ohba , Tsuyoshi Honma , Kazuo Kobayashi
IPC分类号： G11C16/02 , G11C16/22 , G11C16/04
CPC分类号： G11C16/22
摘要： A reset power down mode designating signal and first and second write protect signals are provided to a control circuit. According to the states of these external control signals, the status of unconditional inhibition, unconditional permission, and lock bit (LB) dependency for the protect status of data rewrite is set for each memory block group of a memory array. Therefore, the write protect status can be set in a flexible manner for a nonvolatile semiconductor memory device.
摘要翻译：复位停电模式指定信号和第一和第二写保护信号被提供给控制电路。根据这些外部控制信号的状态，为存储器阵列的每个存储块组设置无条件禁止，无条件许可和数据重写保护状态的锁定位（LB）依赖性的状态。因此，写保护状态可以灵活地设置为非易失性半导体存储器件。

8. 发明授权

US5884638A Cartridge type feeding container for cosmetics stick 失效
标题翻译：用于化妆品棒的墨盒式进料容器
公开(公告)号：US5884638A
公开(公告)日：1999-03-23
申请号：US97548
申请日：1998-06-15
申请人： Atsushi Ohba
发明人： Atsushi Ohba
IPC分类号： A45D40/04 , A45D40/16 , A45D40/20 , A45D40/24
CPC分类号： A45D40/04 , A45D40/16 , A45D2040/005 , A45D2040/204 , A45D2040/208
摘要： A cartridge type feeding container for a cosmetics stick has a structure such that the diameter can be easily reduced, the product can be easily assembled, and the number of parts employed therein can be reduced. A cartridge (5) in the main body (1) has a push spring (17) which urges a chuck (13) toward a retracting direction. The push spring (17) is mounted between the rear end of a bar (15) of the chuck (13) and a partition member (47) of a cartridge cylinder (11). On the cartridge cylinder (11) and on a push rod (23) are provided synchronously engageable sections (59 and 71) which are engageable with each other to render the cartridge cylinder (11) and the push rod (23) non-rotatable relative to each other.
摘要翻译：用于化妆品棒的盒型进料容器具有能够容易地减少直径的结构，可以容易地组装产品，并且可以减少其中使用的部件的数量。主体（1）中的盒（5）具有朝向缩回方向推动卡盘（13）的推动弹簧（17）。推动弹簧（17）安装在卡盘（13）的杆（15）的后端和卡盘缸（11）的分隔构件（47）之间。在盒式磁盘（11）上和推杆（23）上设置有可彼此接合以使盒式磁盘（11）和推杆（23）不可旋转相对的同步接合部分（59和71）对彼此。

9. 发明授权

US5808944A Semiconductor memory device having a defect relief arrangement 失效
标题翻译：具有缺陷排除装置的半导体存储器件
公开(公告)号：US5808944A
公开(公告)日：1998-09-15
申请号：US797654
申请日：1997-01-31
申请人： Takayuki Yoshitake , Kazuyoshi Oshima , Kazuyuki Miyazawa , Toshihiro Tanaka , Yasuhiro Nakamura , Shigeru Tanaka , Atsushi Ohba
发明人： Takayuki Yoshitake , Kazuyoshi Oshima , Kazuyuki Miyazawa , Toshihiro Tanaka , Yasuhiro Nakamura , Shigeru Tanaka , Atsushi Ohba
IPC分类号： G11C17/00 , G11C16/06 , G11C29/00 , G11C29/04 , G11C7/00
CPC分类号： G11C29/80
摘要： In a semiconductor storage device wherein data lines connected to a plurality of memory cells selected by a select operation of word lines are sequentially selected by using an address signal generated by an address counter to serially read data in individual unit of at least one word line: redundancy data lines disposed perpendicular to the word lines are provided; a column select circuit receiving a Y address signal selects one of the data lines or redundancy data lines; a redundancy memory circuit stores, in the order of the selection operation by the column select circuit, a defect address signal of a defect data line among the data lines and a redundancy address signal of a corresponding redundancy data line; an address comparator circuit compares one defect address signal read from the redundancy memory circuit with an address signal generated by the address counter; an address signal for the redundancy memory circuit is generated by performing a count operation in response to a coincidence signal generated by the address comparator circuit; and the address signal generated by the address counter is replaced by a redundancy address signal read in response to the coincidence signal from the redundancy memory circuit and used as the Y address signal. Accordingly, a redundancy circuit of simple configuration can be obtained because only a single address comparator circuit is used.
摘要翻译：在半导体存储装置中，通过使用地址计数器生成的地址信号来顺序地选择连接到通过字线的选择操作选择的多个存储单元的数据线，以至少一个字线的单独串行读取数据：提供与字线垂直设置的冗余数据线; 接收Y地址信号的列选择电路选择数据线或冗余数据线之一; 冗余存储电路按照列选择电路的选择操作的顺序存储数据线之间的缺陷数据线的缺陷地址信号和对应的冗余数据线的冗余地址信号; 地址比较器电路将从冗余存储器电路读取的一个缺陷地址信号与由地址计数器产生的地址信号进行比较; 通过响应于由地址比较器电路产生的一致信号执行计数操作来产生用于冗余存储器电路的地址信号; 并且由地址计数器产生的地址信号被响应于来自冗余存储器电路的符合信号读取并用作Y地址信号的冗余地址信号所替代。因此，由于仅使用单个地址比较器电路，所以可以获得简单配置的冗余电路。

10. 发明授权

US5521864A Non-volatile semiconductor memory device allowing fast verifying operation 失效
标题翻译：非易失性半导体存储器件允许快速验证操作
公开(公告)号：US5521864A
公开(公告)日：1996-05-28
申请号：US385866
申请日：1995-02-09
申请人： Shinichi Kobayashi , Hiroaki Nakai , Motoharu Ishii , Atsushi Ohba , Tomoshi Futatsuya , Akira Hosogane
发明人： Shinichi Kobayashi , Hiroaki Nakai , Motoharu Ishii , Atsushi Ohba , Tomoshi Futatsuya , Akira Hosogane
IPC分类号： G11C17/00 , G11C16/02 , G11C16/34 , G11C29/50 , G11C11/34
CPC分类号： G11C16/3459 , G11C16/3454 , G11C29/50 , G11C29/50004 , G06F2201/81 , G11C16/04
摘要： A bit line reset transistor resets every second bit line of a plurality of bit lines to be write-verified. At this time, a transfer gate disconnects a column latch from the unreset bit line. Then, the unreset bit line is precharged in accordance with data of the column latch, while applying a verify voltage to a word line. Then, a source line transistor grounds a source line, and the bit line is connected to the column latch, so that data corresponding to a value of a threshold voltage of the memory cell is held by the column latch, and a write verifying operation is performed.
摘要翻译：位线复位晶体管复位要被写入验证的多个位线的每一个第二位线。此时，传输门将列锁存器与未分配位线断开。然后，根据列锁存器的数据对未复位位线进行预充电，同时向字线施加验证电压。然后，源极线晶体管接地源极线，并且位线连接到列锁存器，使得与存储器单元的阈值电压值对应的数据由列锁存器保持，写入验证操作是执行。

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