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1. 发明专利

JP2003060352A Multilayer printed wiring board 审中-公开
标题翻译：多层印刷接线板
公开(公告)号：JP2003060352A
公开(公告)日：2003-02-28
申请号：JP2001241210
申请日：2001-08-08
申请人： Asahi Kasei Corp , Multi:Kk , 旭化成株式会社 , 株式会社マルチ
发明人： YAMADA TAKASHI , WATANABE MITSUHIRO
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board which is superior in mechanical strength, heat resistance, adhesion strength, durability and dimensional stability, and has high insulation reliability, even if an insulation layer is thinned and enables high density of a wiring.
SOLUTION: A both-sided wiring board B1 with a capacitor is manufactured by laminating an aramid film 20 and copper foils 22, 22 adhered to both sides thereof by means of epoxy adhesive prepreg sheets 21, 21. A two-sided wiring board B2 having an inductor is manufactured by laminating an aramid film 30 and copper foils 31, 32 adhered to both sides thereof by means of epoxy adhesive prepreg sheets 31, 31. After the two-sided wiring boards B1, B2 are laminated with a glass cloth prepreg between, copper foils 52, 52 are laminated in both sides thereof, and a multilayer printed wiring board 4 of 8 layers, which has a copper foil wherein a circuit is formed, each copper foil being connected by a through-hole, is manufactured.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：为了提供机械强度，耐热性，粘合强度，耐久性和尺寸稳定性优异的多层印刷线路板，并且即使绝缘层变薄并且能够实现高密度的布线，也具有高的绝缘可靠性。解决方案：具有电容器的双面布线板B1通过用环氧树脂粘合剂预浸料片21,21层压芳族聚酰胺膜20和粘合到其两侧的铜箔22,22来制造。具有两面布线板B2的双面布线板B2具有通过利用环氧树脂粘合剂预浸料31和31将芳族聚酰胺薄膜30和粘合到其两面的铜箔31,32层叠在一起，制成电感器。在双面布线板B1，B2与玻璃布预浸料，铜箔52,52的两面层叠，并且制造了具有铜箔的8层的多层印刷电路板4，其中形成有电路，每个铜箔通过通孔连接。

2. 发明专利

JP2003338671A Multilayer laminated plate and multilayer printed wiring board using it 审中-公开
标题翻译：多层层压板和多层印刷线路板
公开(公告)号：JP2003338671A
公开(公告)日：2003-11-28
申请号：JP2002148018
申请日：2002-05-22
申请人： Asahi Kasei Corp , Multi:Kk , 旭化成株式会社 , 株式会社マルチ
发明人： YAMADA TAKASHI , WATANABE MITSUHIRO
IPC分类号： B32B15/08 , H05K1/03 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a multilayer laminated plate of superior mechanical strength, heat resistance, adhesion strength, durability and dimensional stability, whose insulation reliability is high even when an insulating layer is made thinner so that the densification of wiring is enabled, and to provide a multilayer printed wiring board using it. SOLUTION: An insulating layer 20 is formed by laminating a heat-resistant film 21a and an adhesive resin layer 21b as a layer 21 of low permeability on both surfaces of a layer 22 of high permeability containing a filler of high permeability in this order. A conductive metal layer 10 on which a circuit is formed is laminated on both surfaces of the insulating layer 20. Thereby a multilayer printed wiring board 100A is formed. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：为了提供具有优异的机械强度，耐热性，粘合强度，耐久性和尺寸稳定性的多层层压板，其绝缘可靠性高，即使绝缘层变薄，使得布线的致密化为并且提供使用它的多层印刷线路板。解决方案：在这种情况下，通过层压耐热膜21a和粘合树脂层21b作为低渗透性的层21，形成在具有高磁导率的高透过性的层22的两面上，形成绝缘层20 订购。形成有电路的导电金属层10层叠在绝缘层20的两面上。由此形成多层印刷电路板100A。版权所有（C）2004，JPO

3. 发明专利

JP2003332751A Multilayer circuit board and board therefor 审中-公开
标题翻译：多层电路板及板
公开(公告)号：JP2003332751A
公开(公告)日：2003-11-21
申请号：JP2002137257
申请日：2002-05-13
申请人： Asahi Kasei Corp , Multi:Kk , 旭化成株式会社 , 株式会社マルチ
发明人： KOYAMA RYOHEI , WATANABE MITSUHIRO
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a multilayer circuit board and a board for multilayer circuit board which have high insulation reliability even if an insulation layer is thinned, enable high density of a wiring, and suppress an internal strain of the circuit board and the generation of a migration. SOLUTION: A board for multilayer circuit board is composed of at least two layers of conductor metal layers 3, an insulating layer 1 laminated between the conductor metal layers 3, and a metal thin film layer 2 laminated on the surface of the insulating layer 1 side of the conductor metal layers 3. A multilayer circuit board 10 is formed by forming a lamination part S of the conductor metal layers 3 and the metal thin film layers 2, and a single layer T eliminating the conductor metal layers 3 on the metal thin film layers 2. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：为了提供即使绝缘层变薄也具有高绝缘可靠性的多层电路板和多层电路板，能够实现高密度的布线，并且抑制电路板的内部应变并产生移民。解决方案：用于多层电路板的板由至少两层导体金属层3，层压在导体金属层3之间的绝缘层1和层压在绝缘层表面上的金属薄膜层2组成。通过形成导体金属层3和金属薄膜层2的层叠部分S形成多层电路板10，并且在其上形成消除导体金属层3上的导体金属层3的单层T 金属薄膜层2.版权所有（C）2004，JPO

4. 发明专利

JP2007036172A Multilayer circuit board 审中-公开
标题翻译：多层电路板
公开(公告)号：JP2007036172A
公开(公告)日：2007-02-08
申请号：JP2005342569
申请日：2005-11-28
申请人： Multi:Kk , Shin Kobe Electric Mach Co Ltd , 新神戸電機株式会社 , 株式会社マルチ
发明人： YAMANAKA HIROYUKI , TAKAHASHI YOSHITO , KANAI ATSUSHI , WATANABE MITSUHIRO
IPC分类号： H05K3/46 , H01L23/12 , H05K1/02
摘要： PROBLEM TO BE SOLVED: To obtain a highly reliable multilayer circuit board in which heat collected by a heat conduction material can be dissipated efficiently with small number of components. SOLUTION: A circuit pattern 3 is provided on one surface of an insulating substrate 1 and a heat dissipation plate 5 is provided on the other surface of the insulating substrate 1. A surface metal layer 13 for mounting a heating element 15 is provided on one surface of the insulating substrate 1. An internal metal layer 17 bonded to the surface metal layer 13 by intermetallic bonding is arranged in the insulating substrate 1 thus constituting a heat conduction material 12. Profile and dimensions of the surface metal layer 13 and the internal metal layer 17 are determined such that all or the great portion of heat generated from the heating element 15 is transmitted through the heat conduction material 12 to the heat dissipation plate 5. Consequently, the great portion of heat generated from the heating element 15 can be collected at the heat conduction material 12 thence transmitted to the heat dissipation plate 5. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了获得一种高度可靠的多层电路板，其中由导热材料收集的热量可以用少量的部件有效地散发。解决方案：电路图案3设置在绝缘基板1的一个表面上，散热板5设置在绝缘基板1的另一个表面上。设置用于安装加热元件15的表面金属层13 在绝缘基板1的一个表面上。通过金属间接合结合到表面金属层13的内部金属层17布置在绝缘基板1中，从而构成导热材料12.表面金属层13和内部金属层17被确定为使得从加热元件15产生的全部或大部分热量通过导热材料12传递到散热板5.因此，从加热元件15产生的大部分热可以被收集在导热材料12上，然后被传送到散热板5.版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2006261187A Method of manufacturing substrate with built-in component 审中-公开
标题翻译：使用内置组件制造衬底的方法
公开(公告)号：JP2006261187A
公开(公告)日：2006-09-28
申请号：JP2005072694
申请日：2005-03-15
申请人： Multi:Kk , Oki Electric Ind Co Ltd , 株式会社マルチ , 沖電気工業株式会社
发明人： KOIWA ICHIRO , WATANABE MITSUHIRO
IPC分类号： H01L23/12 , H05K1/18
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a substrate with a built-in component which can be connected to a built-in chip without conducting laser processing and via plating.
SOLUTION: A wiring pattern 11a is formed on a copper substrate (for example, clad foil) 10, and the chip 20 which is a thin electronic component is mounted on the wiring pattern 11a. Next, with the chip 20 and a thermosetting resin member (prepreg) 30 interposed between the clad foil 10 and an inner layer material 40, the clad foil 10 and the inner layer material 40 are pressurized by heating to embed and stack the chip 20 inside the prepreg 30. Thereafter, the clad foil 10 is patterned to electrically connect the chip 20 and the inner layer material 40.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种具有内置部件的基板的制造方法，所述内置部件可以连接到内置芯片而不进行激光加工和通孔电镀。解决方案：布线图案11a形成在铜基板（例如，复合箔）10上，并且作为薄电子部件的芯片20安装在布线图案11a上。接下来，利用芯片20和插入在包层箔10和内层材料40之间的热固性树脂构件（预浸料坯）30，通过加热对复合箔10和内层材料40进行加压，将芯片20嵌入并堆叠此后，将复合箔10图案化以将芯片20和内层材料40电连接。版权所有（C）2006，JPO＆NCIPI

6. 发明专利

JP2006093419A Semiconductor device and its mounting method 审中-公开
标题翻译：半导体器件及其安装方法
公开(公告)号：JP2006093419A
公开(公告)日：2006-04-06
申请号：JP2004277282
申请日：2004-09-24
申请人： Kanto Gakuin Univ Surface Engineering Research Institute , Multi:Kk , Oki Electric Ind Co Ltd , Univ Waseda , 学校法人早稲田大学 , 株式会社マルチ , 株式会社関東学院大学表面工学研究所 , 沖電気工業株式会社
发明人： KOIWA ICHIRO , ASHIKAGA KINYA , WATANABE MITSUHIRO , AISAKA TETSUYA , HONMA HIDEO
IPC分类号： H01L21/60
CPC分类号： H01L24/02 , H01L2224/48091 , H01L2224/48227 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a mounting method of a semiconductor device for inexpensively mounting a chip on a mounted substrate of a semiconductor without increasing a mounting area. SOLUTION: The mounted substrate 210 is prepared and a capacitor chip 200 where a high dielectric capacitor is formed is prepared as a semiconductor chip where two or more elements are formed. The semiconductor chip is laminated on the mounted substrate. Conductive terminals 90 formed to the semiconductor chip and the mounted substrate are connected by wire bonding. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种用于在不增加安装面积的情况下将芯片廉价地安装在半导体的安装的基板上的半导体器件的安装方法。解决方案：准备安装的基板210，并且准备形成高介电电容器的电容器芯片200作为形成两个或更多个元件的半导体芯片。将半导体芯片层叠在安装的基板上。形成于半导体芯片和安装基板的导电端子90通过引线接合连接。版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JP2007123382A Wiring board and its manufacturing method 审中-公开
标题翻译：接线板及其制造方法
公开(公告)号：JP2007123382A
公开(公告)日：2007-05-17
申请号：JP2005310821
申请日：2005-10-26
申请人： Ain:Kk , Kanto Gakuin Univ Surface Engineering Research Institute , Multi:Kk , 株式会社アイン , 株式会社マルチ , 株式会社関東学院大学表面工学研究所
发明人： ONO KAORU , WATANABE MITSUHIRO
IPC分类号： H05K1/05 , H05K3/14 , H05K3/24
摘要： PROBLEM TO BE SOLVED: To provide a wiring board which efficiently utilizes high heat dissipation of an aluminum substrate itself and can be commercially produced.
SOLUTION: An alumite layer 2 is formed on a surface of an aluminum substrate 1. The alumite layer 2 is changed into a high-insulating layer 2A with improved insulation by sealing treatment, and then a wiring 11 is arranged on the surface of the high-insulating layer 2A opposite to a surface being in contact with the aluminum substrate 1. A metal layer 12 is formed between the surface of the high-insulating layer 2A and a conductive layer 13 forming the wiring 11, by a physical vapor phase growth method such as sputtering method or the like or a chemical vapor phase growth method. The alumite layer 2 is preferably made of hard alumite.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种有效地利用铝基板本身的高散热并可以商业化生产的布线板。解决方案：在铝基板1的表面上形成耐酸铝层2.将铝酸盐层2通过密封处理改变为具有改善绝缘性的高绝缘层2A，然后将布线11布置在表面的高绝缘层2A与与铝基板1接触的表面相对。在高绝缘层2A的表面和形成布线11的导电层13之间，通过物理蒸气形成金属层12 相生长法如溅射法等或化学气相生长法。耐酸铝层2优选由硬质的耐酸铝制成。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2007036050A Process for producing multilayer circuit board 有权
标题翻译：生产多层电路板的方法
公开(公告)号：JP2007036050A
公开(公告)日：2007-02-08
申请号：JP2005219426
申请日：2005-07-28
申请人： Multi:Kk , Shin Kobe Electric Mach Co Ltd , 新神戸電機株式会社 , 株式会社マルチ
发明人： YAMANAKA HIROYUKI , TAKAHASHI YOSHITO , KANAI ATSUSHI , WATANABE MITSUHIRO
IPC分类号： H05K1/02 , H05K3/46 , H05K7/20
摘要： PROBLEM TO BE SOLVED: To obtain a highly reliable multilayer circuit board in which heat collected by a heat conduction material can be dissipated efficiently with small number of components. SOLUTION: A circuit pattern 3 is provided on one surface of an insulating substrate 1 and a heat dissipation plate 5 is provided on the other surface of the insulating substrate 1. A surface metal layer 13 for mounting a heating element 15 is provided on one surface of the insulating substrate 1. An internal metal layer 17 bonded to the surface metal layer 13 by intermetallic bonding is arranged in the insulating substrate 1 thus constituting a heat conduction material 12. Profile and dimensions of the surface metal layer 13 and the internal metal layer 17 are determined such that all or the great portion of heat generated from the heating element 15 is transmitted through the heat conduction material 12 to the heat dissipation plate 5. Consequently, the great portion of heat generated from the heating element 15 can be collected at the heat conduction material 12 thence transmitted to the heat dissipation plate 5. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了获得一种高度可靠的多层电路板，其中由导热材料收集的热量可以用少量的部件有效地散发。解决方案：电路图案3设置在绝缘基板1的一个表面上，散热板5设置在绝缘基板1的另一个表面上。设置用于安装加热元件15的表面金属层13 在绝缘基板1的一个表面上。通过金属间接合结合到表面金属层13的内部金属层17布置在绝缘基板1中，从而构成导热材料12.表面金属层13和内部金属层17被确定为使得从加热元件15产生的全部或大部分热量通过导热材料12传递到散热板5.因此，从加热元件15产生的大部分热可以被收集在导热材料12上，然后被传送到散热板5.版权所有（C）2007，JPO＆INPIT

9. 发明专利

JP2006294650A Method of mounting electronic component 审中-公开
标题翻译：安装电子元件的方法
公开(公告)号：JP2006294650A
公开(公告)日：2006-10-26
申请号：JP2005109079
申请日：2005-04-05
申请人： Multi:Kk , Oki Electric Ind Co Ltd , 株式会社マルチ , 沖電気工業株式会社
发明人： KOIWA ICHIRO , WATANABE MITSUHIRO
IPC分类号： H05K3/32 , H01L21/60 , H05K3/26 , H05K3/38
CPC分类号： C09J5/06 , C09J2203/326 , H01L21/563 , H01L21/6835 , H01L23/145 , H01L23/4922 , H01L23/49816 , H01L23/49822 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/29 , H01L24/83 , H01L24/90 , H01L2221/68345 , H01L2224/0401 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/1132 , H01L2224/1147 , H01L2224/13019 , H01L2224/13099 , H01L2224/16225 , H01L2224/2919 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/81193 , H01L2224/81345 , H01L2224/81385 , H01L2224/83192 , H01L2224/838 , H01L2224/83851 , H01L2924/01005 , H01L2924/01006 , H01L2924/01009 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/04953 , H01L2924/0665 , H01L2924/19042 , H05K1/111 , H05K3/305 , H05K3/323 , H05K3/325 , H05K3/383 , H05K2201/0373 , H05K2201/10674 , H05K2201/10977 , Y02P70/611 , H01L2924/01014 , H01L2924/00 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a mounting method for positively connecting an electronic component having a bump region to a wiring board having a pad electrode region while ensuring electric conduction between them. SOLUTION: In order to solve the problem, the mounting method positively connects the electronic component 4 with the bump region 5 to the wiring substrate 2 with the pad electrode region 3 while ensuring electric conduction is employed. In the mounting method, the surface of the pad electrode region of the wiring substrate is provided with a roughened surface of 0.1 μm or more (Rzjis), a half-cured thermoplastic adhesive resin layer 6 is provided on the roughened surface of the pad electrode region, the bump region of the electronic component and the pad electrode region thereof are superimposed so that they are oppositely arranged and are pressurized, heated and compression-bonded. The roughened surface of the pad electrode region of the wiring board can be obtained by applying etching processing or other processing to the pad electrode. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于将具有凸起区域的电子部件正确连接到具有焊盘电极区域的布线板的安装方法，同时确保它们之间的导电。解决方案：为了解决该问题，安装方法在确保导电的同时，将电子部件4与凸起区域5与焊盘电极区域3正确地连接到布线基板2。在安装方法中，布线基板的焊盘电极区域的表面设置有0.1μm以上的粗糙面（Rzjis），半固化热塑性粘合树脂层6设置在焊盘电极的粗糙面上区域，电子部件的凸起区域和焊盘电极区域被重叠，使得它们相对布置并被加压，加热和压缩粘合。可以通过对焊盘电极进行蚀刻处理或其它处理来获得布线板的焊盘电极区域的粗糙表面。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2003060354A Printed circuit board with built-in component and manufacturing method therefor 审中-公开
标题翻译：具有内置元件的印刷电路板及其制造方法
公开(公告)号：JP2003060354A
公开(公告)日：2003-02-28
申请号：JP2001245073
申请日：2001-08-10
申请人： Azuma Suzuko , Multi:Kk , Ube Electronics Ltd , 宇部エレクトロニクス株式会社 , 東すず子 , 株式会社マルチ
发明人： WATANABE MITSUHIRO , AZUMA KOJI , HASHIMOTO TOMONORI
IPC分类号： H05K3/32 , H01L23/12 , H05K1/02 , H05K1/18 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a printed circuit board having a built-in component which can correspond to high density, and is highly reliable, highly producible and applicable to an electronic equipment, and its manufacturing method, and to provide a printed circuit board with a built-in component which is applicable to a two-sided printed circuit board, a multilayer printed circuit board, a build-up substrate, a heat dissipation substrate or the like. SOLUTION: A first welding layer is formed in a desired part of a conductor circuit formed in an electronic base material. A second welding layer is formed in a connection portion of an electronic component, to be connected to the circuit. At electronic component is connected to a conductor circuit via a welding layer, and an insulation resin layer is disposed thereon for integral lamination.
摘要翻译：要解决的问题：提供一种具有能够对应于高密度，高可靠性，高可生产性和可应用于电子设备的内置部件的印刷电路板及其制造方法，并且提供印刷电路板具有适用于双面印刷电路板，多层印刷电路板，积聚基板，散热基板等的内置部件。解决方案：在电子基材中形成的导体电路的所需部分中形成第一焊接层。第二焊接层形成在与电路连接的电子部件的连接部分中。电子部件通过焊接层与导体电路连接，绝缘树脂层配置在其上用于整体层叠。

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