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1. 发明申请

US20060121869A1 Multi-element phased array transmitter with LO phase shifting and integrated power amplifier 有权
公开(公告)号：US20060121869A1
公开(公告)日：2006-06-08
申请号：US11241875
申请日：2005-09-29
申请人： Arun Natarajan , Abbas Komijani , Seyed Hajimiri
发明人： Arun Natarajan , Abbas Komijani , Seyed Hajimiri
IPC分类号： H04B1/06
CPC分类号： H01Q3/42 , H01Q3/22
摘要： A fully integrated CMOS multi-element phased-array transmitter (transmitter) includes, in part, on-chip power amplifiers (PA), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional 1-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8 GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors in each transmitter path have independent access to all the phases of the VCO. The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (I) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.

2. 发明申请

US20080058019A1 Multi-Element Phased Array Transmitter With LO Phase Shifting And Integrated Power Amplifier 有权
标题翻译：具有LO相移和集成功率放大器的多元相控阵发射器
公开(公告)号：US20080058019A1
公开(公告)日：2008-03-06
申请号：US11778419
申请日：2007-07-16
申请人： Arun Natarajan , Abbas Komijani , Seyed Hajimiri
发明人： Arun Natarajan , Abbas Komijani , Seyed Hajimiri
IPC分类号： H04M1/00
CPC分类号： H01Q3/42 , H01Q3/22
摘要： A fully integrated CMOS multi-element phased-array transmitter (transmitter) includes, in part, on-chip power amplifiers (PA), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional 1-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8 GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors in each transmitter path have independent access to all the phases of the VCO. The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (I) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.
摘要翻译：完全集成的CMOS多元件相控阵发射器（发射机）部分包括集成输出匹配的片上功率放大器（PA）。发射机适于配置为二维2×2阵列或一维1×4阵列。发射机使用中频频率为4.8 GHz的两级升压转换架构。上转换级的双正交架构衰减了图像频率处的信号。每个发射器路径中的相位选择器具有对VCO的所有相位的独立访问。双正交架构为每个路径产生两组相位选择器，一组用于同相（I），另一组用于LO信号的正交相位（Q）。相位选择分为两个阶段，第一阶段确定期望的VCO差分相位对，下一个阶段选择适当的极性。片内平衡变换器用于差分到单端转换。

3. 发明申请

US20100231452A1 MM-WAVE FULLY INTEGRATED PHASED ARRAY RECEIVER AND TRANSMITTER WITH ON-CHIP ANTENNAS 有权
标题翻译： MM-WAVE完全集成的相位阵列接收器和带芯片天线的发射机
公开(公告)号：US20100231452A1
公开(公告)日：2010-09-16
申请号：US11525757
申请日：2006-09-22
申请人： Aydin Babakhani , Xiang Guan , Seyed Ali Hajimiri , Abbas Komijani , Arun Natarajan
发明人： Aydin Babakhani , Xiang Guan , Seyed Ali Hajimiri , Abbas Komijani , Arun Natarajan
IPC分类号： H01Q3/00 , H01Q19/06
CPC分类号： H01Q9/065 , G01S7/032 , H01Q19/065
摘要： A phased array mm-wave device includes a substrate, a mm-wave transmitter integrated onto the substrate configured to transmit a mm-wave signal and/or a mm-wave receiver integrated onto the substrate and configured to receive a mm-wave signal. The mm-wave device also includes a phased array antenna system integrated onto the substrate and including two or more antenna elements. The phased array mm-wave device also includes one or more dielectric lenses. A distributed mm-wave distributed combining tree circuit includes at least two pairs of differential transconductors with regenerative degeneration and accepts at least two differential input signals. Two mm-wave loopback methods measure the phased array antenna patterns and the performance of an integrated receiver transmitter system.
摘要翻译：相控阵mm波装置包括基板，集成在基板上的毫米波发射器，该波长发射器被配置成传输一毫米波信号和/或集成在基板上的毫米波接收器，并被配置为接收毫米波信号。毫米波器件还包括集成在衬底上并包括两个或多个天线元件的相控阵天线系统。相控阵毫米波器件还包括一个或多个电介质透镜。分布式的毫米波分布式组合树电路包括具有再生退化的至少两对差分跨导体，并且接受至少两个差分输入信号。两毫米波回环方法测量相控阵天线方向图和综合接收发射机系统的性能。

4. 发明授权

US07812775B2 Mm-wave fully integrated phased array receiver and transmitter with on-chip antennas 有权
标题翻译： Mm波全集成相控阵接收机和发射机与片上天线
公开(公告)号：US07812775B2
公开(公告)日：2010-10-12
申请号：US11525757
申请日：2006-09-22
申请人： Aydin Babakhani , Xiang Guan , Seyed Ali Hajimiri , Abbas Komijani , Arun Natarajan
发明人： Aydin Babakhani , Xiang Guan , Seyed Ali Hajimiri , Abbas Komijani , Arun Natarajan
IPC分类号： H01Q19/06 , H01Q15/06
CPC分类号： H01Q9/065 , G01S7/032 , H01Q19/065
摘要： A phased array mm-wave device includes a substrate, a mm-wave transmitter integrated onto the substrate configured to transmit a mm-wave signal and/or a mm-wave receiver integrated onto the substrate and configured to receive a mm-wave signal. The mm-wave device also includes a phased array antenna system integrated onto the substrate and including two or more antenna elements. The phased array mm-wave device also includes one or more dielectric lenses. A distributed mm-wave distributed combining tree circuit includes at least two pairs of differential transconductors with regenerative degeneration and accepts at least two differential input signals. Two mm-wave loopback methods measure the phased array antenna patterns and the performance of an integrated receiver transmitter system.
摘要翻译：相控阵mm波装置包括基板，集成在基板上的毫米波发射器，该波长发射器被配置成传输一毫米波信号和/或集成在基板上的毫米波接收器，并被配置为接收毫米波信号。毫米波器件还包括集成在衬底上并包括两个或多个天线元件的相控阵天线系统。相控阵毫米波器件还包括一个或多个电介质透镜。分布式的毫米波分布式组合树电路包括具有再生退化的至少两对差分跨导体，并且接受至少两个差分输入信号。两毫米波回环方法测量相控阵天线方向图和综合接收发射机系统的性能。

5. 发明授权

US07493144B2 Multi-element phased array transmitter with LO phase shifting and integrated power amplifier 有权
标题翻译：具有LO相移和集成功率放大器的多元件相控阵发射器
公开(公告)号：US07493144B2
公开(公告)日：2009-02-17
申请号：US11778419
申请日：2007-07-16
申请人： Arun Natarajan , Abbas Komijani , Seyed Ali Hajimiri
发明人： Arun Natarajan , Abbas Komijani , Seyed Ali Hajimiri
IPC分类号： H04B1/38 , H04M1/00
CPC分类号： H01Q3/42 , H01Q3/22
摘要： A fully integrated CMOS multi-element phased-array transmitter (transmitter) includes, in part, on-chip power amplifiers (PA), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional 1-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8 GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors in each transmitter path have independent access to all the phases of the VCO. The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (I) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.
摘要翻译：完全集成的CMOS多元件相控阵发射器（发射机）部分包括集成输出匹配的片上功率放大器（PA）。发射机适于配置为二维2×2阵列或一维1×4阵列。发射机使用中频频率为4.8 GHz的两级升压转换架构。上转换级的双正交架构衰减了图像频率处的信号。每个发射器路径中的相位选择器具有对VCO的所有相位的独立访问。双正交架构为每个路径产生两组相位选择器，一组用于同相（I），另一组用于LO信号的正交相位（Q）。相位选择分为两个阶段，第一阶段确定期望的VCO差分相位对，下一个阶段选择适当的极性。片内平衡变换器用于差分到单端转换。

6. 发明授权

US07260418B2 Multi-element phased array transmitter with LO phase shifting and integrated power amplifier 有权
标题翻译：具有LO相移和集成功率放大器的多元件相控阵发射器
公开(公告)号：US07260418B2
公开(公告)日：2007-08-21
申请号：US11241875
申请日：2005-09-29
申请人： Arun Natarajan , Abbas Komijani , Seyed Ali Hajimiri
发明人： Arun Natarajan , Abbas Komijani , Seyed Ali Hajimiri
IPC分类号： H04B1/38 , H04M1/00
CPC分类号： H01Q3/42 , H01Q3/22
摘要： A fully integrated CMOS multi-element phased-array transmitter (transmitter) includes, in part, on-chip power amplifiers (PA), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional 1-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8 GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors in each transmitter path have independent access to all the phases of the VCO. The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (I) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.
摘要翻译：完全集成的CMOS多元件相控阵发射器（发射机）部分包括集成输出匹配的片上功率放大器（PA）。发射机适于配置为二维2×2阵列或一维1×4阵列。发射机使用中频频率为4.8 GHz的两级升压转换架构。上转换级的双正交架构衰减了图像频率处的信号。每个发射器路径中的相位选择器具有对VCO的所有相位的独立访问。双正交架构为每个路径产生两组相位选择器，一组用于同相（I），另一组用于LO信号的正交相位（Q）。相位选择分为两个阶段，第一阶段确定期望的VCO差分相位对，下一个阶段选择适当的极性。片内平衡变换器用于差分到单端转换。

7. 发明申请

US20120215394A1 SYSTEM AND METHOD FOR SYNCHRONIZED CONTROL OF A HARVESTER AND TRANSPORT VEHICLE 审中-公开
标题翻译：收发机和运输车辆同步控制的系统和方法
公开(公告)号：US20120215394A1
公开(公告)日：2012-08-23
申请号：US13249884
申请日：2011-09-30
申请人： Guoping Wang , Christopher A. Foster , Riccardo Morselli , Olivier Vanhercke , Todd Aznavorian , Arun Natarajan , Kousha Moaveni-Nejad
发明人： Guoping Wang , Christopher A. Foster , Riccardo Morselli , Olivier Vanhercke , Todd Aznavorian , Arun Natarajan , Kousha Moaveni-Nejad
IPC分类号： G05D1/02 , G06F19/00
CPC分类号： A01D41/1278 , A01B69/008 , A01D43/085 , G05D1/0278 , G05D1/0293 , G05D2201/0201
摘要： A control system and method is provided to control a longitudinal position of a transport vehicle relative to a harvester during an unload on the go operation and to control both the lateral position and the longitudinal position of a transport vehicle relative to a harvester during an unload on the go operation to evenly fill a receiving area of the transport vehicle with crop material from the harvester. The longitudinal position of the transport vehicle is maintained within an acceptable range by adjusting the velocity of the transport vehicle. The receiving area of the transport vehicle can be more evenly filled with crop material by adjusting the lateral position and the longitudinal position of the transport vehicle within predetermined trim distances associated with the receiving area of the transport vehicle.
摘要翻译：提供了一种控制系统和方法，用于在卸载操作期间控制运输车辆相对于收割机的纵向位置，并且在卸载期间控制运输车辆相对于收割机的横向位置和纵向位置通过收割机将作物材料均匀地填满运输车辆的接收区域。运输车辆的纵向位置通过调节运输车辆的速度而保持在可接受的范围内。运输车辆的接收区域可以通过调节运输车辆的横向位置和纵向位置在与运输车辆的接收区域相关联的预定的修剪距离内，更均匀地填充作物材料。

8. 发明申请

US20120048620A1 PRESSURE LIMITING CONTROLLER 有权
标题翻译：压力限制控制器
公开(公告)号：US20120048620A1
公开(公告)日：2012-03-01
申请号：US12868265
申请日：2010-08-25
申请人： Fergus Hopwood , Arun Natarajan
发明人： Fergus Hopwood , Arun Natarajan
IPC分类号： E21B21/08
CPC分类号： E21B21/08
摘要： A method of controlling pressure in a mud pump system includes generating a pressure limiting factor output using a pressure feedback input and a motor speed input to calculate a fluid conductance estimate, maintaining the pressure limiting factor output at a maximum value based on a pressure set-point, continuously updating a normal fluid conductance value based on the fluid conductance estimate while the pressure limiting factor output remains at the maximum value, freezing the normal fluid conductance value, if the pressure limiting factor output is less than the maximum value, calculating a change in fluid conductance based on the normal fluid conductance value and the fluid conductance estimate, generating at least one adaptive gain based on the change in fluid conductance, and controlling a motor speed of a pump in the mud pump system based on the at least one adaptive gain.
摘要翻译：一种控制泥浆泵系统中的压力的方法包括使用压力反馈输入和电动机速度输入产生压力限制因子输出，以计算流体电导估计，基于压力设定值将压力限制因子输出维持在最大值，点，当压力限制因子输出保持在最大值时，基于流体导电估计持续更新正常流体电导值，如果压力限制因子输出小于最大值，则冻结正常流体电导值，计算变化基于正常流体导电值和流体电导估计的流体传导，基于流体传导的变化产生至少一个自适应增益，以及基于所述至少一个自适应控制来控制泥浆泵系统中的泵的电动机速度获得。

9. 发明授权

US08606454B2 System and method for synchronized control of a harvester and transport vehicle 有权
标题翻译：收割机和运输车辆同步控制的系统和方法
公开(公告)号：US08606454B2
公开(公告)日：2013-12-10
申请号：US13171620
申请日：2011-06-29
申请人： Guoping Wang , Todd Aznavorian , Arun Natarajan , Kousha Moaveni Nejad
发明人： Guoping Wang , Todd Aznavorian , Arun Natarajan , Kousha Moaveni Nejad
IPC分类号： G06F7/00
CPC分类号： A01D41/1278 , A01B69/008 , A01D43/087 , G05D1/0278 , G05D1/0293 , G05D2201/0201
摘要： A control system and method is provided for synchronized control of a harvester and transport vehicle during unload on the go operation. The control system can maintain a desired lateral distance between the harvester and transport vehicle using swath information that is used to steer the harvester. In addition, the control system can also bring a transport vehicle into appropriate alignment with the harvester using the same swath information.
摘要翻译：提供一种控制系统和方法，用于在卸载操作时对收割机和运输车辆的同步控制。控制系统可以使用用于引导收割机的条线信息来保持收割机和运输车辆之间的期望的横向距离。此外，控制系统还可以使用相同的条带信息使运输车辆与收割机适当对准。

10. 发明授权

US08493113B2 PLL bandwidth correction with offset compensation 有权
标题翻译：带偏移补偿的PLL带宽校正
公开(公告)号：US08493113B2
公开(公告)日：2013-07-23
申请号：US13230371
申请日：2011-09-12
申请人： Mark A. Ferriss , Arun Natarajan , Benjamin Parker , Alexander Rylyakov , Jose A. Tierno , Soner Yaldiz
发明人： Mark A. Ferriss , Arun Natarajan , Benjamin Parker , Alexander Rylyakov , Jose A. Tierno , Soner Yaldiz
IPC分类号： H03L7/06
CPC分类号： H03L7/16 , H03L7/0891
摘要： A method and system for compensating for offsets when measuring parameters of a phase-locked loop (PLL). In one embodiment, a proportional path in the PLL is temporarily shut off, a measurement is made of a real time-to-zero crossing in the PLL to measure a defined parameter of the PLL, the proportional path is switched on, and the defined loop parameter is adjusted based on this measurement. In one embodiment, the real time-to-zero crossing is measured after introducing a phase step into the PLL between a reference signal and an output signal of the PLL. In an embodiment, two phase steps, having opposite polarities, are successively introduced into the PLL, and the time-to-crossing measurements resulting from these two phase steps may be averaged, and this average is used to determine a loop parameter.
摘要翻译：一种在测量锁相环（PLL）参数时补偿偏移的方法和系统。在一个实施例中，PLL中的比例路径被暂时关闭，测量PLL中的实时到零交叉，以测量PLL的定义参数，比例路径被接通，并且定义基于此测量调整回路参数。在一个实施例中，在参考信号和PLL的输出信号之间在PLL中引入相位阶跃之后，测量实时到零交叉。在一个实施例中，具有相反极性的两个相位步骤被连续地引入到PLL中，并且由这两个阶段步骤产生的时间到交叉测量可以被平均，并且该平均值用于确定回路参数。

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